blob: d6f8d4ddc2bca04e850ba75b10677cf8611d6619 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001 - 2012 Tensilica Inc.
7 */
8
9#ifndef _XTENSA_SYSTEM_H
10#define _XTENSA_SYSTEM_H
11
12#include <asm/core.h>
13
14#define mb() ({ __asm__ __volatile__("memw" : : : "memory"); })
15#define rmb() barrier()
16#define wmb() mb()
17
18#if XCHAL_HAVE_S32C1I
19#define __smp_mb__before_atomic() barrier()
20#define __smp_mb__after_atomic() barrier()
21#endif
22
23#include <asm-generic/barrier.h>
24
25#endif /* _XTENSA_SYSTEM_H */