b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /***********************license start************************************ |
| 2 | * Copyright (c) 2003-2017 Cavium, Inc. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * License: one of 'Cavium License' or 'GNU General Public License Version 2' |
| 6 | * |
| 7 | * This file is provided under the terms of the Cavium License (see below) |
| 8 | * or under the terms of GNU General Public License, Version 2, as |
| 9 | * published by the Free Software Foundation. When using or redistributing |
| 10 | * this file, you may do so under either license. |
| 11 | * |
| 12 | * Cavium License: Redistribution and use in source and binary forms, with |
| 13 | * or without modification, are permitted provided that the following |
| 14 | * conditions are met: |
| 15 | * |
| 16 | * * Redistributions of source code must retain the above copyright |
| 17 | * notice, this list of conditions and the following disclaimer. |
| 18 | * |
| 19 | * * Redistributions in binary form must reproduce the above |
| 20 | * copyright notice, this list of conditions and the following |
| 21 | * disclaimer in the documentation and/or other materials provided |
| 22 | * with the distribution. |
| 23 | * |
| 24 | * * Neither the name of Cavium Inc. nor the names of its contributors may be |
| 25 | * used to endorse or promote products derived from this software without |
| 26 | * specific prior written permission. |
| 27 | * |
| 28 | * This Software, including technical data, may be subject to U.S. export |
| 29 | * control laws, including the U.S. Export Administration Act and its |
| 30 | * associated regulations, and may be subject to export or import |
| 31 | * regulations in other countries. |
| 32 | * |
| 33 | * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" |
| 34 | * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS |
| 35 | * OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH |
| 36 | * RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY |
| 37 | * REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT |
| 38 | * DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) |
| 39 | * WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A |
| 40 | * PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET |
| 41 | * ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE |
| 42 | * ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES |
| 43 | * WITH YOU. |
| 44 | ***********************license end**************************************/ |
| 45 | |
| 46 | #ifndef __ZIP_MAIN_H__ |
| 47 | #define __ZIP_MAIN_H__ |
| 48 | |
| 49 | #include "zip_device.h" |
| 50 | #include "zip_regs.h" |
| 51 | |
| 52 | /* PCI device IDs */ |
| 53 | #define PCI_DEVICE_ID_THUNDERX_ZIP 0xA01A |
| 54 | |
| 55 | /* ZIP device BARs */ |
| 56 | #define PCI_CFG_ZIP_PF_BAR0 0 /* Base addr for normal regs */ |
| 57 | |
| 58 | /* Maximum available zip queues */ |
| 59 | #define ZIP_MAX_NUM_QUEUES 8 |
| 60 | |
| 61 | #define ZIP_128B_ALIGN 7 |
| 62 | |
| 63 | /* Command queue buffer size */ |
| 64 | #define ZIP_CMD_QBUF_SIZE (8064 + 8) |
| 65 | |
| 66 | struct zip_registers { |
| 67 | char *reg_name; |
| 68 | u64 reg_offset; |
| 69 | }; |
| 70 | |
| 71 | /* ZIP Compression - Decompression stats */ |
| 72 | struct zip_stats { |
| 73 | atomic64_t comp_req_submit; |
| 74 | atomic64_t comp_req_complete; |
| 75 | atomic64_t decomp_req_submit; |
| 76 | atomic64_t decomp_req_complete; |
| 77 | atomic64_t comp_in_bytes; |
| 78 | atomic64_t comp_out_bytes; |
| 79 | atomic64_t decomp_in_bytes; |
| 80 | atomic64_t decomp_out_bytes; |
| 81 | atomic64_t decomp_bad_reqs; |
| 82 | }; |
| 83 | |
| 84 | /* ZIP Instruction Queue */ |
| 85 | struct zip_iq { |
| 86 | u64 *sw_head; |
| 87 | u64 *sw_tail; |
| 88 | u64 *hw_tail; |
| 89 | u64 done_cnt; |
| 90 | u64 pend_cnt; |
| 91 | u64 free_flag; |
| 92 | |
| 93 | /* ZIP IQ lock */ |
| 94 | spinlock_t lock; |
| 95 | }; |
| 96 | |
| 97 | /* ZIP Device */ |
| 98 | struct zip_device { |
| 99 | u32 index; |
| 100 | void __iomem *reg_base; |
| 101 | struct pci_dev *pdev; |
| 102 | |
| 103 | /* Different ZIP Constants */ |
| 104 | u64 depth; |
| 105 | u64 onfsize; |
| 106 | u64 ctxsize; |
| 107 | |
| 108 | struct zip_iq iq[ZIP_MAX_NUM_QUEUES]; |
| 109 | struct zip_stats stats; |
| 110 | }; |
| 111 | |
| 112 | /* Prototypes */ |
| 113 | struct zip_device *zip_get_device(int node_id); |
| 114 | int zip_get_node_id(void); |
| 115 | void zip_reg_write(u64 val, u64 __iomem *addr); |
| 116 | u64 zip_reg_read(u64 __iomem *addr); |
| 117 | void zip_update_cmd_bufs(struct zip_device *zip_dev, u32 queue); |
| 118 | u32 zip_load_instr(union zip_inst_s *instr, struct zip_device *zip_dev); |
| 119 | |
| 120 | #endif /* ZIP_MAIN_H */ |