| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * (C) COPYRIGHT 2016 ARM Limited. All rights reserved. |
| 4 | * Author: Liviu Dudau <Liviu.Dudau@arm.com> |
| 5 | * |
| 6 | * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures |
| 7 | */ |
| 8 | |
| 9 | #ifndef __MALIDP_DRV_H__ |
| 10 | #define __MALIDP_DRV_H__ |
| 11 | |
| 12 | #include <linux/mutex.h> |
| 13 | #include <linux/wait.h> |
| 14 | #include <linux/spinlock.h> |
| 15 | |
| 16 | #include <drm/drm_writeback.h> |
| 17 | #include <drm/drm_encoder.h> |
| 18 | |
| 19 | #include "malidp_hw.h" |
| 20 | |
| 21 | #define MALIDP_CONFIG_VALID_INIT 0 |
| 22 | #define MALIDP_CONFIG_VALID_DONE 1 |
| 23 | #define MALIDP_CONFIG_START 0xd0 |
| 24 | |
| 25 | struct malidp_error_stats { |
| 26 | s32 num_errors; |
| 27 | u32 last_error_status; |
| 28 | s64 last_error_vblank; |
| 29 | }; |
| 30 | |
| 31 | struct malidp_drm { |
| 32 | struct malidp_hw_device *dev; |
| 33 | struct drm_crtc crtc; |
| 34 | struct drm_writeback_connector mw_connector; |
| 35 | wait_queue_head_t wq; |
| 36 | struct drm_pending_vblank_event *event; |
| 37 | atomic_t config_valid; |
| 38 | u32 core_id; |
| 39 | #ifdef CONFIG_DEBUG_FS |
| 40 | struct malidp_error_stats de_errors; |
| 41 | struct malidp_error_stats se_errors; |
| 42 | /* Protects errors stats */ |
| 43 | spinlock_t errors_lock; |
| 44 | #endif |
| 45 | }; |
| 46 | |
| 47 | #define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc) |
| 48 | |
| 49 | struct malidp_plane { |
| 50 | struct drm_plane base; |
| 51 | struct malidp_hw_device *hwdev; |
| 52 | const struct malidp_layer *layer; |
| 53 | }; |
| 54 | |
| 55 | enum mmu_prefetch_mode { |
| 56 | MALIDP_PREFETCH_MODE_NONE, |
| 57 | MALIDP_PREFETCH_MODE_PARTIAL, |
| 58 | MALIDP_PREFETCH_MODE_FULL, |
| 59 | }; |
| 60 | |
| 61 | struct malidp_plane_state { |
| 62 | struct drm_plane_state base; |
| 63 | |
| 64 | /* size of the required rotation memory if plane is rotated */ |
| 65 | u32 rotmem_size; |
| 66 | /* internal format ID */ |
| 67 | u8 format; |
| 68 | u8 n_planes; |
| 69 | enum mmu_prefetch_mode mmu_prefetch_mode; |
| 70 | u32 mmu_prefetch_pgsize; |
| 71 | }; |
| 72 | |
| 73 | #define to_malidp_plane(x) container_of(x, struct malidp_plane, base) |
| 74 | #define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base) |
| 75 | |
| 76 | struct malidp_crtc_state { |
| 77 | struct drm_crtc_state base; |
| 78 | u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS]; |
| 79 | u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS]; |
| 80 | struct malidp_se_config scaler_config; |
| 81 | /* Bitfield of all the planes that have requested a scaled output. */ |
| 82 | u8 scaled_planes_mask; |
| 83 | }; |
| 84 | |
| 85 | #define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base) |
| 86 | |
| 87 | int malidp_de_planes_init(struct drm_device *drm); |
| 88 | int malidp_crtc_init(struct drm_device *drm); |
| 89 | |
| 90 | bool malidp_hw_format_is_linear_only(u32 format); |
| 91 | bool malidp_hw_format_is_afbc_only(u32 format); |
| 92 | |
| 93 | bool malidp_format_mod_supported(struct drm_device *drm, |
| 94 | u32 format, u64 modifier); |
| 95 | |
| 96 | #ifdef CONFIG_DEBUG_FS |
| 97 | void malidp_error(struct malidp_drm *malidp, |
| 98 | struct malidp_error_stats *error_stats, u32 status, |
| 99 | u64 vblank); |
| 100 | #endif |
| 101 | |
| 102 | /* often used combination of rotational bits */ |
| 103 | #define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270) |
| 104 | |
| 105 | #endif /* __MALIDP_DRV_H__ */ |