b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: MIT |
| 2 | /* |
| 3 | * Copyright 2019 Intel Corporation. |
| 4 | */ |
| 5 | |
| 6 | #include "i915_drv.h" |
| 7 | #include "intel_pch.h" |
| 8 | |
| 9 | /* Map PCH device id to PCH type, or PCH_NONE if unknown. */ |
| 10 | static enum intel_pch |
| 11 | intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) |
| 12 | { |
| 13 | switch (id) { |
| 14 | case INTEL_PCH_IBX_DEVICE_ID_TYPE: |
| 15 | DRM_DEBUG_KMS("Found Ibex Peak PCH\n"); |
| 16 | WARN_ON(!IS_GEN(dev_priv, 5)); |
| 17 | return PCH_IBX; |
| 18 | case INTEL_PCH_CPT_DEVICE_ID_TYPE: |
| 19 | DRM_DEBUG_KMS("Found CougarPoint PCH\n"); |
| 20 | WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); |
| 21 | return PCH_CPT; |
| 22 | case INTEL_PCH_PPT_DEVICE_ID_TYPE: |
| 23 | DRM_DEBUG_KMS("Found PantherPoint PCH\n"); |
| 24 | WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv)); |
| 25 | /* PantherPoint is CPT compatible */ |
| 26 | return PCH_CPT; |
| 27 | case INTEL_PCH_LPT_DEVICE_ID_TYPE: |
| 28 | DRM_DEBUG_KMS("Found LynxPoint PCH\n"); |
| 29 | WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); |
| 30 | WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); |
| 31 | return PCH_LPT; |
| 32 | case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE: |
| 33 | DRM_DEBUG_KMS("Found LynxPoint LP PCH\n"); |
| 34 | WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); |
| 35 | WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); |
| 36 | return PCH_LPT; |
| 37 | case INTEL_PCH_WPT_DEVICE_ID_TYPE: |
| 38 | DRM_DEBUG_KMS("Found WildcatPoint PCH\n"); |
| 39 | WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); |
| 40 | WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)); |
| 41 | /* WildcatPoint is LPT compatible */ |
| 42 | return PCH_LPT; |
| 43 | case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE: |
| 44 | DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n"); |
| 45 | WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); |
| 46 | WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv)); |
| 47 | /* WildcatPoint is LPT compatible */ |
| 48 | return PCH_LPT; |
| 49 | case INTEL_PCH_SPT_DEVICE_ID_TYPE: |
| 50 | DRM_DEBUG_KMS("Found SunrisePoint PCH\n"); |
| 51 | WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)); |
| 52 | return PCH_SPT; |
| 53 | case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE: |
| 54 | DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n"); |
| 55 | WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv)); |
| 56 | return PCH_SPT; |
| 57 | case INTEL_PCH_KBP_DEVICE_ID_TYPE: |
| 58 | DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n"); |
| 59 | WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) && |
| 60 | !IS_COFFEELAKE(dev_priv)); |
| 61 | /* KBP is SPT compatible */ |
| 62 | return PCH_SPT; |
| 63 | case INTEL_PCH_CNP_DEVICE_ID_TYPE: |
| 64 | DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n"); |
| 65 | WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); |
| 66 | return PCH_CNP; |
| 67 | case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE: |
| 68 | DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n"); |
| 69 | WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); |
| 70 | return PCH_CNP; |
| 71 | case INTEL_PCH_CMP_DEVICE_ID_TYPE: |
| 72 | case INTEL_PCH_CMP2_DEVICE_ID_TYPE: |
| 73 | DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); |
| 74 | WARN_ON(!IS_COFFEELAKE(dev_priv)); |
| 75 | /* CometPoint is CNP Compatible */ |
| 76 | return PCH_CNP; |
| 77 | case INTEL_PCH_ICP_DEVICE_ID_TYPE: |
| 78 | DRM_DEBUG_KMS("Found Ice Lake PCH\n"); |
| 79 | WARN_ON(!IS_ICELAKE(dev_priv)); |
| 80 | return PCH_ICP; |
| 81 | case INTEL_PCH_MCC_DEVICE_ID_TYPE: |
| 82 | case INTEL_PCH_MCC2_DEVICE_ID_TYPE: |
| 83 | DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n"); |
| 84 | WARN_ON(!IS_ELKHARTLAKE(dev_priv)); |
| 85 | return PCH_MCC; |
| 86 | case INTEL_PCH_TGP_DEVICE_ID_TYPE: |
| 87 | DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n"); |
| 88 | WARN_ON(!IS_TIGERLAKE(dev_priv)); |
| 89 | return PCH_TGP; |
| 90 | default: |
| 91 | return PCH_NONE; |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | static bool intel_is_virt_pch(unsigned short id, |
| 96 | unsigned short svendor, unsigned short sdevice) |
| 97 | { |
| 98 | return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE || |
| 99 | id == INTEL_PCH_P3X_DEVICE_ID_TYPE || |
| 100 | (id == INTEL_PCH_QEMU_DEVICE_ID_TYPE && |
| 101 | svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET && |
| 102 | sdevice == PCI_SUBDEVICE_ID_QEMU)); |
| 103 | } |
| 104 | |
| 105 | static unsigned short |
| 106 | intel_virt_detect_pch(const struct drm_i915_private *dev_priv) |
| 107 | { |
| 108 | unsigned short id = 0; |
| 109 | |
| 110 | /* |
| 111 | * In a virtualized passthrough environment we can be in a |
| 112 | * setup where the ISA bridge is not able to be passed through. |
| 113 | * In this case, a south bridge can be emulated and we have to |
| 114 | * make an educated guess as to which PCH is really there. |
| 115 | */ |
| 116 | |
| 117 | if (IS_TIGERLAKE(dev_priv)) |
| 118 | id = INTEL_PCH_TGP_DEVICE_ID_TYPE; |
| 119 | else if (IS_ELKHARTLAKE(dev_priv)) |
| 120 | id = INTEL_PCH_MCC_DEVICE_ID_TYPE; |
| 121 | else if (IS_ICELAKE(dev_priv)) |
| 122 | id = INTEL_PCH_ICP_DEVICE_ID_TYPE; |
| 123 | else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) |
| 124 | id = INTEL_PCH_CNP_DEVICE_ID_TYPE; |
| 125 | else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv)) |
| 126 | id = INTEL_PCH_SPT_DEVICE_ID_TYPE; |
| 127 | else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv)) |
| 128 | id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE; |
| 129 | else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) |
| 130 | id = INTEL_PCH_LPT_DEVICE_ID_TYPE; |
| 131 | else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv)) |
| 132 | id = INTEL_PCH_CPT_DEVICE_ID_TYPE; |
| 133 | else if (IS_GEN(dev_priv, 5)) |
| 134 | id = INTEL_PCH_IBX_DEVICE_ID_TYPE; |
| 135 | |
| 136 | if (id) |
| 137 | DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id); |
| 138 | else |
| 139 | DRM_DEBUG_KMS("Assuming no PCH\n"); |
| 140 | |
| 141 | return id; |
| 142 | } |
| 143 | |
| 144 | void intel_detect_pch(struct drm_i915_private *dev_priv) |
| 145 | { |
| 146 | struct pci_dev *pch = NULL; |
| 147 | |
| 148 | /* |
| 149 | * The reason to probe ISA bridge instead of Dev31:Fun0 is to |
| 150 | * make graphics device passthrough work easy for VMM, that only |
| 151 | * need to expose ISA bridge to let driver know the real hardware |
| 152 | * underneath. This is a requirement from virtualization team. |
| 153 | * |
| 154 | * In some virtualized environments (e.g. XEN), there is irrelevant |
| 155 | * ISA bridge in the system. To work reliably, we should scan trhough |
| 156 | * all the ISA bridge devices and check for the first match, instead |
| 157 | * of only checking the first one. |
| 158 | */ |
| 159 | while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) { |
| 160 | unsigned short id; |
| 161 | enum intel_pch pch_type; |
| 162 | |
| 163 | if (pch->vendor != PCI_VENDOR_ID_INTEL) |
| 164 | continue; |
| 165 | |
| 166 | id = pch->device & INTEL_PCH_DEVICE_ID_MASK; |
| 167 | |
| 168 | pch_type = intel_pch_type(dev_priv, id); |
| 169 | if (pch_type != PCH_NONE) { |
| 170 | dev_priv->pch_type = pch_type; |
| 171 | dev_priv->pch_id = id; |
| 172 | break; |
| 173 | } else if (intel_is_virt_pch(id, pch->subsystem_vendor, |
| 174 | pch->subsystem_device)) { |
| 175 | id = intel_virt_detect_pch(dev_priv); |
| 176 | pch_type = intel_pch_type(dev_priv, id); |
| 177 | |
| 178 | /* Sanity check virtual PCH id */ |
| 179 | if (WARN_ON(id && pch_type == PCH_NONE)) |
| 180 | id = 0; |
| 181 | |
| 182 | dev_priv->pch_type = pch_type; |
| 183 | dev_priv->pch_id = id; |
| 184 | break; |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | /* |
| 189 | * Use PCH_NOP (PCH but no South Display) for PCH platforms without |
| 190 | * display. |
| 191 | */ |
| 192 | if (pch && !HAS_DISPLAY(dev_priv)) { |
| 193 | DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n"); |
| 194 | dev_priv->pch_type = PCH_NOP; |
| 195 | dev_priv->pch_id = 0; |
| 196 | } |
| 197 | |
| 198 | if (!pch) |
| 199 | DRM_DEBUG_KMS("No PCH found.\n"); |
| 200 | |
| 201 | pci_dev_put(pch); |
| 202 | } |