b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 OR MIT |
| 2 | /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */ |
| 3 | |
| 4 | #include <linux/interrupt.h> |
| 5 | #include <linux/iopoll.h> |
| 6 | #include <linux/device.h> |
| 7 | #include <linux/slab.h> |
| 8 | |
| 9 | #include <drm/lima_drm.h> |
| 10 | |
| 11 | #include "lima_device.h" |
| 12 | #include "lima_gp.h" |
| 13 | #include "lima_regs.h" |
| 14 | |
| 15 | #define gp_write(reg, data) writel(data, ip->iomem + reg) |
| 16 | #define gp_read(reg) readl(ip->iomem + reg) |
| 17 | |
| 18 | static irqreturn_t lima_gp_irq_handler(int irq, void *data) |
| 19 | { |
| 20 | struct lima_ip *ip = data; |
| 21 | struct lima_device *dev = ip->dev; |
| 22 | struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; |
| 23 | u32 state = gp_read(LIMA_GP_INT_STAT); |
| 24 | u32 status = gp_read(LIMA_GP_STATUS); |
| 25 | bool done = false; |
| 26 | |
| 27 | /* for shared irq case */ |
| 28 | if (!state) |
| 29 | return IRQ_NONE; |
| 30 | |
| 31 | if (state & LIMA_GP_IRQ_MASK_ERROR) { |
| 32 | dev_err(dev->dev, "gp error irq state=%x status=%x\n", |
| 33 | state, status); |
| 34 | |
| 35 | /* mask all interrupts before hard reset */ |
| 36 | gp_write(LIMA_GP_INT_MASK, 0); |
| 37 | |
| 38 | pipe->error = true; |
| 39 | done = true; |
| 40 | } else { |
| 41 | bool valid = state & (LIMA_GP_IRQ_VS_END_CMD_LST | |
| 42 | LIMA_GP_IRQ_PLBU_END_CMD_LST); |
| 43 | bool active = status & (LIMA_GP_STATUS_VS_ACTIVE | |
| 44 | LIMA_GP_STATUS_PLBU_ACTIVE); |
| 45 | done = valid && !active; |
| 46 | } |
| 47 | |
| 48 | gp_write(LIMA_GP_INT_CLEAR, state); |
| 49 | |
| 50 | if (done) |
| 51 | lima_sched_pipe_task_done(pipe); |
| 52 | |
| 53 | return IRQ_HANDLED; |
| 54 | } |
| 55 | |
| 56 | static void lima_gp_soft_reset_async(struct lima_ip *ip) |
| 57 | { |
| 58 | if (ip->data.async_reset) |
| 59 | return; |
| 60 | |
| 61 | gp_write(LIMA_GP_INT_MASK, 0); |
| 62 | gp_write(LIMA_GP_INT_CLEAR, LIMA_GP_IRQ_RESET_COMPLETED); |
| 63 | gp_write(LIMA_GP_CMD, LIMA_GP_CMD_SOFT_RESET); |
| 64 | ip->data.async_reset = true; |
| 65 | } |
| 66 | |
| 67 | static int lima_gp_soft_reset_async_wait(struct lima_ip *ip) |
| 68 | { |
| 69 | struct lima_device *dev = ip->dev; |
| 70 | int err; |
| 71 | u32 v; |
| 72 | |
| 73 | if (!ip->data.async_reset) |
| 74 | return 0; |
| 75 | |
| 76 | err = readl_poll_timeout(ip->iomem + LIMA_GP_INT_RAWSTAT, v, |
| 77 | v & LIMA_GP_IRQ_RESET_COMPLETED, |
| 78 | 0, 100); |
| 79 | if (err) { |
| 80 | dev_err(dev->dev, "gp soft reset time out\n"); |
| 81 | return err; |
| 82 | } |
| 83 | |
| 84 | gp_write(LIMA_GP_INT_CLEAR, LIMA_GP_IRQ_MASK_ALL); |
| 85 | gp_write(LIMA_GP_INT_MASK, LIMA_GP_IRQ_MASK_USED); |
| 86 | |
| 87 | ip->data.async_reset = false; |
| 88 | return 0; |
| 89 | } |
| 90 | |
| 91 | static int lima_gp_task_validate(struct lima_sched_pipe *pipe, |
| 92 | struct lima_sched_task *task) |
| 93 | { |
| 94 | struct drm_lima_gp_frame *frame = task->frame; |
| 95 | u32 *f = frame->frame; |
| 96 | (void)pipe; |
| 97 | |
| 98 | if (f[LIMA_GP_VSCL_START_ADDR >> 2] > |
| 99 | f[LIMA_GP_VSCL_END_ADDR >> 2] || |
| 100 | f[LIMA_GP_PLBUCL_START_ADDR >> 2] > |
| 101 | f[LIMA_GP_PLBUCL_END_ADDR >> 2] || |
| 102 | f[LIMA_GP_PLBU_ALLOC_START_ADDR >> 2] > |
| 103 | f[LIMA_GP_PLBU_ALLOC_END_ADDR >> 2]) |
| 104 | return -EINVAL; |
| 105 | |
| 106 | if (f[LIMA_GP_VSCL_START_ADDR >> 2] == |
| 107 | f[LIMA_GP_VSCL_END_ADDR >> 2] && |
| 108 | f[LIMA_GP_PLBUCL_START_ADDR >> 2] == |
| 109 | f[LIMA_GP_PLBUCL_END_ADDR >> 2]) |
| 110 | return -EINVAL; |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | static void lima_gp_task_run(struct lima_sched_pipe *pipe, |
| 116 | struct lima_sched_task *task) |
| 117 | { |
| 118 | struct lima_ip *ip = pipe->processor[0]; |
| 119 | struct drm_lima_gp_frame *frame = task->frame; |
| 120 | u32 *f = frame->frame; |
| 121 | u32 cmd = 0; |
| 122 | int i; |
| 123 | |
| 124 | if (f[LIMA_GP_VSCL_START_ADDR >> 2] != |
| 125 | f[LIMA_GP_VSCL_END_ADDR >> 2]) |
| 126 | cmd |= LIMA_GP_CMD_START_VS; |
| 127 | if (f[LIMA_GP_PLBUCL_START_ADDR >> 2] != |
| 128 | f[LIMA_GP_PLBUCL_END_ADDR >> 2]) |
| 129 | cmd |= LIMA_GP_CMD_START_PLBU; |
| 130 | |
| 131 | /* before any hw ops, wait last success task async soft reset */ |
| 132 | lima_gp_soft_reset_async_wait(ip); |
| 133 | |
| 134 | for (i = 0; i < LIMA_GP_FRAME_REG_NUM; i++) |
| 135 | writel(f[i], ip->iomem + LIMA_GP_VSCL_START_ADDR + i * 4); |
| 136 | |
| 137 | gp_write(LIMA_GP_CMD, LIMA_GP_CMD_UPDATE_PLBU_ALLOC); |
| 138 | gp_write(LIMA_GP_CMD, cmd); |
| 139 | } |
| 140 | |
| 141 | static int lima_gp_bus_stop_poll(struct lima_ip *ip) |
| 142 | { |
| 143 | return !!(gp_read(LIMA_GP_STATUS) & LIMA_GP_STATUS_BUS_STOPPED); |
| 144 | } |
| 145 | |
| 146 | static int lima_gp_hard_reset_poll(struct lima_ip *ip) |
| 147 | { |
| 148 | gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC01A0000); |
| 149 | return gp_read(LIMA_GP_PERF_CNT_0_LIMIT) == 0xC01A0000; |
| 150 | } |
| 151 | |
| 152 | static int lima_gp_hard_reset(struct lima_ip *ip) |
| 153 | { |
| 154 | struct lima_device *dev = ip->dev; |
| 155 | int ret; |
| 156 | |
| 157 | gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0xC0FFE000); |
| 158 | gp_write(LIMA_GP_INT_MASK, 0); |
| 159 | |
| 160 | gp_write(LIMA_GP_CMD, LIMA_GP_CMD_STOP_BUS); |
| 161 | ret = lima_poll_timeout(ip, lima_gp_bus_stop_poll, 10, 100); |
| 162 | if (ret) { |
| 163 | dev_err(dev->dev, "%s bus stop timeout\n", lima_ip_name(ip)); |
| 164 | return ret; |
| 165 | } |
| 166 | gp_write(LIMA_GP_CMD, LIMA_GP_CMD_RESET); |
| 167 | ret = lima_poll_timeout(ip, lima_gp_hard_reset_poll, 10, 100); |
| 168 | if (ret) { |
| 169 | dev_err(dev->dev, "gp hard reset timeout\n"); |
| 170 | return ret; |
| 171 | } |
| 172 | |
| 173 | gp_write(LIMA_GP_PERF_CNT_0_LIMIT, 0); |
| 174 | gp_write(LIMA_GP_INT_CLEAR, LIMA_GP_IRQ_MASK_ALL); |
| 175 | gp_write(LIMA_GP_INT_MASK, LIMA_GP_IRQ_MASK_USED); |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | static void lima_gp_task_fini(struct lima_sched_pipe *pipe) |
| 180 | { |
| 181 | lima_gp_soft_reset_async(pipe->processor[0]); |
| 182 | } |
| 183 | |
| 184 | static void lima_gp_task_error(struct lima_sched_pipe *pipe) |
| 185 | { |
| 186 | struct lima_ip *ip = pipe->processor[0]; |
| 187 | |
| 188 | dev_err(ip->dev->dev, "gp task error int_state=%x status=%x\n", |
| 189 | gp_read(LIMA_GP_INT_STAT), gp_read(LIMA_GP_STATUS)); |
| 190 | |
| 191 | lima_gp_hard_reset(ip); |
| 192 | } |
| 193 | |
| 194 | static void lima_gp_task_mmu_error(struct lima_sched_pipe *pipe) |
| 195 | { |
| 196 | lima_sched_pipe_task_done(pipe); |
| 197 | } |
| 198 | |
| 199 | static void lima_gp_print_version(struct lima_ip *ip) |
| 200 | { |
| 201 | u32 version, major, minor; |
| 202 | char *name; |
| 203 | |
| 204 | version = gp_read(LIMA_GP_VERSION); |
| 205 | major = (version >> 8) & 0xFF; |
| 206 | minor = version & 0xFF; |
| 207 | switch (version >> 16) { |
| 208 | case 0xA07: |
| 209 | name = "mali200"; |
| 210 | break; |
| 211 | case 0xC07: |
| 212 | name = "mali300"; |
| 213 | break; |
| 214 | case 0xB07: |
| 215 | name = "mali400"; |
| 216 | break; |
| 217 | case 0xD07: |
| 218 | name = "mali450"; |
| 219 | break; |
| 220 | default: |
| 221 | name = "unknown"; |
| 222 | break; |
| 223 | } |
| 224 | dev_info(ip->dev->dev, "%s - %s version major %d minor %d\n", |
| 225 | lima_ip_name(ip), name, major, minor); |
| 226 | } |
| 227 | |
| 228 | static struct kmem_cache *lima_gp_task_slab; |
| 229 | static int lima_gp_task_slab_refcnt; |
| 230 | |
| 231 | int lima_gp_init(struct lima_ip *ip) |
| 232 | { |
| 233 | struct lima_device *dev = ip->dev; |
| 234 | int err; |
| 235 | |
| 236 | lima_gp_print_version(ip); |
| 237 | |
| 238 | ip->data.async_reset = false; |
| 239 | lima_gp_soft_reset_async(ip); |
| 240 | err = lima_gp_soft_reset_async_wait(ip); |
| 241 | if (err) |
| 242 | return err; |
| 243 | |
| 244 | err = devm_request_irq(dev->dev, ip->irq, lima_gp_irq_handler, |
| 245 | IRQF_SHARED, lima_ip_name(ip), ip); |
| 246 | if (err) { |
| 247 | dev_err(dev->dev, "gp %s fail to request irq\n", |
| 248 | lima_ip_name(ip)); |
| 249 | return err; |
| 250 | } |
| 251 | |
| 252 | dev->gp_version = gp_read(LIMA_GP_VERSION); |
| 253 | |
| 254 | return 0; |
| 255 | } |
| 256 | |
| 257 | void lima_gp_fini(struct lima_ip *ip) |
| 258 | { |
| 259 | struct lima_device *dev = ip->dev; |
| 260 | |
| 261 | devm_free_irq(dev->dev, ip->irq, ip); |
| 262 | } |
| 263 | |
| 264 | int lima_gp_pipe_init(struct lima_device *dev) |
| 265 | { |
| 266 | int frame_size = sizeof(struct drm_lima_gp_frame); |
| 267 | struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; |
| 268 | |
| 269 | if (!lima_gp_task_slab) { |
| 270 | lima_gp_task_slab = kmem_cache_create_usercopy( |
| 271 | "lima_gp_task", sizeof(struct lima_sched_task) + frame_size, |
| 272 | 0, SLAB_HWCACHE_ALIGN, sizeof(struct lima_sched_task), |
| 273 | frame_size, NULL); |
| 274 | if (!lima_gp_task_slab) |
| 275 | return -ENOMEM; |
| 276 | } |
| 277 | lima_gp_task_slab_refcnt++; |
| 278 | |
| 279 | pipe->frame_size = frame_size; |
| 280 | pipe->task_slab = lima_gp_task_slab; |
| 281 | |
| 282 | pipe->task_validate = lima_gp_task_validate; |
| 283 | pipe->task_run = lima_gp_task_run; |
| 284 | pipe->task_fini = lima_gp_task_fini; |
| 285 | pipe->task_error = lima_gp_task_error; |
| 286 | pipe->task_mmu_error = lima_gp_task_mmu_error; |
| 287 | |
| 288 | return 0; |
| 289 | } |
| 290 | |
| 291 | void lima_gp_pipe_fini(struct lima_device *dev) |
| 292 | { |
| 293 | if (!--lima_gp_task_slab_refcnt) { |
| 294 | kmem_cache_destroy(lima_gp_task_slab); |
| 295 | lima_gp_task_slab = NULL; |
| 296 | } |
| 297 | } |