b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * RPR-0521 ROHM Ambient Light and Proximity Sensor |
| 4 | * |
| 5 | * Copyright (c) 2015, Intel Corporation. |
| 6 | * |
| 7 | * IIO driver for RPR-0521RS (7-bit I2C slave address 0x38). |
| 8 | * |
| 9 | * TODO: illuminance channel |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/i2c.h> |
| 15 | #include <linux/regmap.h> |
| 16 | #include <linux/delay.h> |
| 17 | #include <linux/acpi.h> |
| 18 | |
| 19 | #include <linux/iio/iio.h> |
| 20 | #include <linux/iio/buffer.h> |
| 21 | #include <linux/iio/trigger.h> |
| 22 | #include <linux/iio/trigger_consumer.h> |
| 23 | #include <linux/iio/triggered_buffer.h> |
| 24 | #include <linux/iio/sysfs.h> |
| 25 | #include <linux/pm_runtime.h> |
| 26 | |
| 27 | #define RPR0521_REG_SYSTEM_CTRL 0x40 |
| 28 | #define RPR0521_REG_MODE_CTRL 0x41 |
| 29 | #define RPR0521_REG_ALS_CTRL 0x42 |
| 30 | #define RPR0521_REG_PXS_CTRL 0x43 |
| 31 | #define RPR0521_REG_PXS_DATA 0x44 /* 16-bit, little endian */ |
| 32 | #define RPR0521_REG_ALS_DATA0 0x46 /* 16-bit, little endian */ |
| 33 | #define RPR0521_REG_ALS_DATA1 0x48 /* 16-bit, little endian */ |
| 34 | #define RPR0521_REG_INTERRUPT 0x4A |
| 35 | #define RPR0521_REG_PS_OFFSET_LSB 0x53 |
| 36 | #define RPR0521_REG_ID 0x92 |
| 37 | |
| 38 | #define RPR0521_MODE_ALS_MASK BIT(7) |
| 39 | #define RPR0521_MODE_PXS_MASK BIT(6) |
| 40 | #define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0) |
| 41 | #define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4) |
| 42 | #define RPR0521_ALS_DATA0_GAIN_SHIFT 4 |
| 43 | #define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2) |
| 44 | #define RPR0521_ALS_DATA1_GAIN_SHIFT 2 |
| 45 | #define RPR0521_PXS_GAIN_MASK GENMASK(5, 4) |
| 46 | #define RPR0521_PXS_GAIN_SHIFT 4 |
| 47 | #define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0) |
| 48 | #define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0) |
| 49 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1) |
| 50 | #define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3) |
| 51 | #define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6) |
| 52 | #define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7) |
| 53 | |
| 54 | #define RPR0521_MODE_ALS_ENABLE BIT(7) |
| 55 | #define RPR0521_MODE_ALS_DISABLE 0x00 |
| 56 | #define RPR0521_MODE_PXS_ENABLE BIT(6) |
| 57 | #define RPR0521_MODE_PXS_DISABLE 0x00 |
| 58 | #define RPR0521_PXS_PERSISTENCE_DRDY 0x00 |
| 59 | |
| 60 | #define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0) |
| 61 | #define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00 |
| 62 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1) |
| 63 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00 |
| 64 | #define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3) |
| 65 | #define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00 |
| 66 | |
| 67 | #define RPR0521_MANUFACT_ID 0xE0 |
| 68 | #define RPR0521_DEFAULT_MEAS_TIME 0x06 /* ALS - 100ms, PXS - 100ms */ |
| 69 | |
| 70 | #define RPR0521_DRV_NAME "RPR0521" |
| 71 | #define RPR0521_IRQ_NAME "rpr0521_event" |
| 72 | #define RPR0521_REGMAP_NAME "rpr0521_regmap" |
| 73 | |
| 74 | #define RPR0521_SLEEP_DELAY_MS 2000 |
| 75 | |
| 76 | #define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1" |
| 77 | #define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1" |
| 78 | |
| 79 | struct rpr0521_gain { |
| 80 | int scale; |
| 81 | int uscale; |
| 82 | }; |
| 83 | |
| 84 | static const struct rpr0521_gain rpr0521_als_gain[4] = { |
| 85 | {1, 0}, /* x1 */ |
| 86 | {0, 500000}, /* x2 */ |
| 87 | {0, 15625}, /* x64 */ |
| 88 | {0, 7812}, /* x128 */ |
| 89 | }; |
| 90 | |
| 91 | static const struct rpr0521_gain rpr0521_pxs_gain[3] = { |
| 92 | {1, 0}, /* x1 */ |
| 93 | {0, 500000}, /* x2 */ |
| 94 | {0, 125000}, /* x4 */ |
| 95 | }; |
| 96 | |
| 97 | enum rpr0521_channel { |
| 98 | RPR0521_CHAN_PXS, |
| 99 | RPR0521_CHAN_ALS_DATA0, |
| 100 | RPR0521_CHAN_ALS_DATA1, |
| 101 | }; |
| 102 | |
| 103 | struct rpr0521_reg_desc { |
| 104 | u8 address; |
| 105 | u8 device_mask; |
| 106 | }; |
| 107 | |
| 108 | static const struct rpr0521_reg_desc rpr0521_data_reg[] = { |
| 109 | [RPR0521_CHAN_PXS] = { |
| 110 | .address = RPR0521_REG_PXS_DATA, |
| 111 | .device_mask = RPR0521_MODE_PXS_MASK, |
| 112 | }, |
| 113 | [RPR0521_CHAN_ALS_DATA0] = { |
| 114 | .address = RPR0521_REG_ALS_DATA0, |
| 115 | .device_mask = RPR0521_MODE_ALS_MASK, |
| 116 | }, |
| 117 | [RPR0521_CHAN_ALS_DATA1] = { |
| 118 | .address = RPR0521_REG_ALS_DATA1, |
| 119 | .device_mask = RPR0521_MODE_ALS_MASK, |
| 120 | }, |
| 121 | }; |
| 122 | |
| 123 | static const struct rpr0521_gain_info { |
| 124 | u8 reg; |
| 125 | u8 mask; |
| 126 | u8 shift; |
| 127 | const struct rpr0521_gain *gain; |
| 128 | int size; |
| 129 | } rpr0521_gain[] = { |
| 130 | [RPR0521_CHAN_PXS] = { |
| 131 | .reg = RPR0521_REG_PXS_CTRL, |
| 132 | .mask = RPR0521_PXS_GAIN_MASK, |
| 133 | .shift = RPR0521_PXS_GAIN_SHIFT, |
| 134 | .gain = rpr0521_pxs_gain, |
| 135 | .size = ARRAY_SIZE(rpr0521_pxs_gain), |
| 136 | }, |
| 137 | [RPR0521_CHAN_ALS_DATA0] = { |
| 138 | .reg = RPR0521_REG_ALS_CTRL, |
| 139 | .mask = RPR0521_ALS_DATA0_GAIN_MASK, |
| 140 | .shift = RPR0521_ALS_DATA0_GAIN_SHIFT, |
| 141 | .gain = rpr0521_als_gain, |
| 142 | .size = ARRAY_SIZE(rpr0521_als_gain), |
| 143 | }, |
| 144 | [RPR0521_CHAN_ALS_DATA1] = { |
| 145 | .reg = RPR0521_REG_ALS_CTRL, |
| 146 | .mask = RPR0521_ALS_DATA1_GAIN_MASK, |
| 147 | .shift = RPR0521_ALS_DATA1_GAIN_SHIFT, |
| 148 | .gain = rpr0521_als_gain, |
| 149 | .size = ARRAY_SIZE(rpr0521_als_gain), |
| 150 | }, |
| 151 | }; |
| 152 | |
| 153 | struct rpr0521_samp_freq { |
| 154 | int als_hz; |
| 155 | int als_uhz; |
| 156 | int pxs_hz; |
| 157 | int pxs_uhz; |
| 158 | }; |
| 159 | |
| 160 | static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = { |
| 161 | /* {ALS, PXS}, W==currently writable option */ |
| 162 | {0, 0, 0, 0}, /* W0000, 0=standby */ |
| 163 | {0, 0, 100, 0}, /* 0001 */ |
| 164 | {0, 0, 25, 0}, /* 0010 */ |
| 165 | {0, 0, 10, 0}, /* 0011 */ |
| 166 | {0, 0, 2, 500000}, /* 0100 */ |
| 167 | {10, 0, 20, 0}, /* 0101 */ |
| 168 | {10, 0, 10, 0}, /* W0110 */ |
| 169 | {10, 0, 2, 500000}, /* 0111 */ |
| 170 | {2, 500000, 20, 0}, /* 1000, measurement 100ms, sleep 300ms */ |
| 171 | {2, 500000, 10, 0}, /* 1001, measurement 100ms, sleep 300ms */ |
| 172 | {2, 500000, 0, 0}, /* 1010, high sensitivity mode */ |
| 173 | {2, 500000, 2, 500000}, /* W1011, high sensitivity mode */ |
| 174 | {20, 0, 20, 0} /* 1100, ALS_data x 0.5, see specification P.18 */ |
| 175 | }; |
| 176 | |
| 177 | struct rpr0521_data { |
| 178 | struct i2c_client *client; |
| 179 | |
| 180 | /* protect device params updates (e.g state, gain) */ |
| 181 | struct mutex lock; |
| 182 | |
| 183 | /* device active status */ |
| 184 | bool als_dev_en; |
| 185 | bool pxs_dev_en; |
| 186 | |
| 187 | struct iio_trigger *drdy_trigger0; |
| 188 | s64 irq_timestamp; |
| 189 | |
| 190 | /* optimize runtime pm ops - enable/disable device only if needed */ |
| 191 | bool als_ps_need_en; |
| 192 | bool pxs_ps_need_en; |
| 193 | bool als_need_dis; |
| 194 | bool pxs_need_dis; |
| 195 | |
| 196 | struct regmap *regmap; |
| 197 | |
| 198 | /* |
| 199 | * Ensure correct naturally aligned timestamp. |
| 200 | * Note that the read will put garbage data into |
| 201 | * the padding but this should not be a problem |
| 202 | */ |
| 203 | struct { |
| 204 | __le16 channels[3]; |
| 205 | u8 garbage; |
| 206 | s64 ts __aligned(8); |
| 207 | } scan; |
| 208 | }; |
| 209 | |
| 210 | static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL); |
| 211 | static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL); |
| 212 | |
| 213 | /* |
| 214 | * Start with easy freq first, whole table of freq combinations is more |
| 215 | * complicated. |
| 216 | */ |
| 217 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10"); |
| 218 | |
| 219 | static struct attribute *rpr0521_attributes[] = { |
| 220 | &iio_const_attr_in_intensity_scale_available.dev_attr.attr, |
| 221 | &iio_const_attr_in_proximity_scale_available.dev_attr.attr, |
| 222 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
| 223 | NULL, |
| 224 | }; |
| 225 | |
| 226 | static const struct attribute_group rpr0521_attribute_group = { |
| 227 | .attrs = rpr0521_attributes, |
| 228 | }; |
| 229 | |
| 230 | /* Order of the channel data in buffer */ |
| 231 | enum rpr0521_scan_index_order { |
| 232 | RPR0521_CHAN_INDEX_PXS, |
| 233 | RPR0521_CHAN_INDEX_BOTH, |
| 234 | RPR0521_CHAN_INDEX_IR, |
| 235 | }; |
| 236 | |
| 237 | static const unsigned long rpr0521_available_scan_masks[] = { |
| 238 | BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) | |
| 239 | BIT(RPR0521_CHAN_INDEX_IR), |
| 240 | 0 |
| 241 | }; |
| 242 | |
| 243 | static const struct iio_chan_spec rpr0521_channels[] = { |
| 244 | { |
| 245 | .type = IIO_PROXIMITY, |
| 246 | .address = RPR0521_CHAN_PXS, |
| 247 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 248 | BIT(IIO_CHAN_INFO_OFFSET) | |
| 249 | BIT(IIO_CHAN_INFO_SCALE), |
| 250 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), |
| 251 | .scan_index = RPR0521_CHAN_INDEX_PXS, |
| 252 | .scan_type = { |
| 253 | .sign = 'u', |
| 254 | .realbits = 16, |
| 255 | .storagebits = 16, |
| 256 | .endianness = IIO_LE, |
| 257 | }, |
| 258 | }, |
| 259 | { |
| 260 | .type = IIO_INTENSITY, |
| 261 | .modified = 1, |
| 262 | .address = RPR0521_CHAN_ALS_DATA0, |
| 263 | .channel2 = IIO_MOD_LIGHT_BOTH, |
| 264 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 265 | BIT(IIO_CHAN_INFO_SCALE), |
| 266 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), |
| 267 | .scan_index = RPR0521_CHAN_INDEX_BOTH, |
| 268 | .scan_type = { |
| 269 | .sign = 'u', |
| 270 | .realbits = 16, |
| 271 | .storagebits = 16, |
| 272 | .endianness = IIO_LE, |
| 273 | }, |
| 274 | }, |
| 275 | { |
| 276 | .type = IIO_INTENSITY, |
| 277 | .modified = 1, |
| 278 | .address = RPR0521_CHAN_ALS_DATA1, |
| 279 | .channel2 = IIO_MOD_LIGHT_IR, |
| 280 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | |
| 281 | BIT(IIO_CHAN_INFO_SCALE), |
| 282 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), |
| 283 | .scan_index = RPR0521_CHAN_INDEX_IR, |
| 284 | .scan_type = { |
| 285 | .sign = 'u', |
| 286 | .realbits = 16, |
| 287 | .storagebits = 16, |
| 288 | .endianness = IIO_LE, |
| 289 | }, |
| 290 | }, |
| 291 | }; |
| 292 | |
| 293 | static int rpr0521_als_enable(struct rpr0521_data *data, u8 status) |
| 294 | { |
| 295 | int ret; |
| 296 | |
| 297 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, |
| 298 | RPR0521_MODE_ALS_MASK, |
| 299 | status); |
| 300 | if (ret < 0) |
| 301 | return ret; |
| 302 | |
| 303 | if (status & RPR0521_MODE_ALS_MASK) |
| 304 | data->als_dev_en = true; |
| 305 | else |
| 306 | data->als_dev_en = false; |
| 307 | |
| 308 | return 0; |
| 309 | } |
| 310 | |
| 311 | static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status) |
| 312 | { |
| 313 | int ret; |
| 314 | |
| 315 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, |
| 316 | RPR0521_MODE_PXS_MASK, |
| 317 | status); |
| 318 | if (ret < 0) |
| 319 | return ret; |
| 320 | |
| 321 | if (status & RPR0521_MODE_PXS_MASK) |
| 322 | data->pxs_dev_en = true; |
| 323 | else |
| 324 | data->pxs_dev_en = false; |
| 325 | |
| 326 | return 0; |
| 327 | } |
| 328 | |
| 329 | /** |
| 330 | * rpr0521_set_power_state - handles runtime PM state and sensors enabled status |
| 331 | * |
| 332 | * @data: rpr0521 device private data |
| 333 | * @on: state to be set for devices in @device_mask |
| 334 | * @device_mask: bitmask specifying for which device we need to update @on state |
| 335 | * |
| 336 | * Calls for this function must be balanced so that each ON should have matching |
| 337 | * OFF. Otherwise pm usage_count gets out of sync. |
| 338 | */ |
| 339 | static int rpr0521_set_power_state(struct rpr0521_data *data, bool on, |
| 340 | u8 device_mask) |
| 341 | { |
| 342 | #ifdef CONFIG_PM |
| 343 | int ret; |
| 344 | |
| 345 | if (device_mask & RPR0521_MODE_ALS_MASK) { |
| 346 | data->als_ps_need_en = on; |
| 347 | data->als_need_dis = !on; |
| 348 | } |
| 349 | |
| 350 | if (device_mask & RPR0521_MODE_PXS_MASK) { |
| 351 | data->pxs_ps_need_en = on; |
| 352 | data->pxs_need_dis = !on; |
| 353 | } |
| 354 | |
| 355 | /* |
| 356 | * On: _resume() is called only when we are suspended |
| 357 | * Off: _suspend() is called after delay if _resume() is not |
| 358 | * called before that. |
| 359 | * Note: If either measurement is re-enabled before _suspend(), |
| 360 | * both stay enabled until _suspend(). |
| 361 | */ |
| 362 | if (on) { |
| 363 | ret = pm_runtime_get_sync(&data->client->dev); |
| 364 | } else { |
| 365 | pm_runtime_mark_last_busy(&data->client->dev); |
| 366 | ret = pm_runtime_put_autosuspend(&data->client->dev); |
| 367 | } |
| 368 | if (ret < 0) { |
| 369 | dev_err(&data->client->dev, |
| 370 | "Failed: rpr0521_set_power_state for %d, ret %d\n", |
| 371 | on, ret); |
| 372 | if (on) |
| 373 | pm_runtime_put_noidle(&data->client->dev); |
| 374 | |
| 375 | return ret; |
| 376 | } |
| 377 | |
| 378 | if (on) { |
| 379 | /* If _resume() was not called, enable measurement now. */ |
| 380 | if (data->als_ps_need_en) { |
| 381 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); |
| 382 | if (ret) |
| 383 | return ret; |
| 384 | data->als_ps_need_en = false; |
| 385 | } |
| 386 | |
| 387 | if (data->pxs_ps_need_en) { |
| 388 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); |
| 389 | if (ret) |
| 390 | return ret; |
| 391 | data->pxs_ps_need_en = false; |
| 392 | } |
| 393 | } |
| 394 | #endif |
| 395 | return 0; |
| 396 | } |
| 397 | |
| 398 | /* Interrupt register tells if this sensor caused the interrupt or not. */ |
| 399 | static inline bool rpr0521_is_triggered(struct rpr0521_data *data) |
| 400 | { |
| 401 | int ret; |
| 402 | int reg; |
| 403 | |
| 404 | ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®); |
| 405 | if (ret < 0) |
| 406 | return false; /* Reg read failed. */ |
| 407 | if (reg & |
| 408 | (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK | |
| 409 | RPR0521_INTERRUPT_PS_INT_STATUS_MASK)) |
| 410 | return true; |
| 411 | else |
| 412 | return false; /* Int not from this sensor. */ |
| 413 | } |
| 414 | |
| 415 | /* IRQ to trigger handler */ |
| 416 | static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private) |
| 417 | { |
| 418 | struct iio_dev *indio_dev = private; |
| 419 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 420 | |
| 421 | data->irq_timestamp = iio_get_time_ns(indio_dev); |
| 422 | /* |
| 423 | * We need to wake the thread to read the interrupt reg. It |
| 424 | * is not possible to do that here because regmap_read takes a |
| 425 | * mutex. |
| 426 | */ |
| 427 | |
| 428 | return IRQ_WAKE_THREAD; |
| 429 | } |
| 430 | |
| 431 | static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private) |
| 432 | { |
| 433 | struct iio_dev *indio_dev = private; |
| 434 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 435 | |
| 436 | if (rpr0521_is_triggered(data)) { |
| 437 | iio_trigger_poll_chained(data->drdy_trigger0); |
| 438 | return IRQ_HANDLED; |
| 439 | } |
| 440 | |
| 441 | return IRQ_NONE; |
| 442 | } |
| 443 | |
| 444 | static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p) |
| 445 | { |
| 446 | struct iio_poll_func *pf = p; |
| 447 | struct iio_dev *indio_dev = pf->indio_dev; |
| 448 | |
| 449 | /* Other trigger polls store time here. */ |
| 450 | if (!iio_trigger_using_own(indio_dev)) |
| 451 | pf->timestamp = iio_get_time_ns(indio_dev); |
| 452 | |
| 453 | return IRQ_WAKE_THREAD; |
| 454 | } |
| 455 | |
| 456 | static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p) |
| 457 | { |
| 458 | struct iio_poll_func *pf = p; |
| 459 | struct iio_dev *indio_dev = pf->indio_dev; |
| 460 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 461 | int err; |
| 462 | |
| 463 | /* Use irq timestamp when reasonable. */ |
| 464 | if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) { |
| 465 | pf->timestamp = data->irq_timestamp; |
| 466 | data->irq_timestamp = 0; |
| 467 | } |
| 468 | /* Other chained trigger polls get timestamp only here. */ |
| 469 | if (!pf->timestamp) |
| 470 | pf->timestamp = iio_get_time_ns(indio_dev); |
| 471 | |
| 472 | err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA, |
| 473 | data->scan.channels, |
| 474 | (3 * 2) + 1); /* 3 * 16-bit + (discarded) int clear reg. */ |
| 475 | if (!err) |
| 476 | iio_push_to_buffers_with_timestamp(indio_dev, |
| 477 | &data->scan, pf->timestamp); |
| 478 | else |
| 479 | dev_err(&data->client->dev, |
| 480 | "Trigger consumer can't read from sensor.\n"); |
| 481 | pf->timestamp = 0; |
| 482 | |
| 483 | iio_trigger_notify_done(indio_dev->trig); |
| 484 | |
| 485 | return IRQ_HANDLED; |
| 486 | } |
| 487 | |
| 488 | static int rpr0521_write_int_enable(struct rpr0521_data *data) |
| 489 | { |
| 490 | int err; |
| 491 | |
| 492 | /* Interrupt after each measurement */ |
| 493 | err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL, |
| 494 | RPR0521_PXS_PERSISTENCE_MASK, |
| 495 | RPR0521_PXS_PERSISTENCE_DRDY); |
| 496 | if (err) { |
| 497 | dev_err(&data->client->dev, "PS control reg write fail.\n"); |
| 498 | return -EBUSY; |
| 499 | } |
| 500 | |
| 501 | /* Ignore latch and mode because of drdy */ |
| 502 | err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT, |
| 503 | RPR0521_INTERRUPT_INT_REASSERT_DISABLE | |
| 504 | RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE | |
| 505 | RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE |
| 506 | ); |
| 507 | if (err) { |
| 508 | dev_err(&data->client->dev, "Interrupt setup write fail.\n"); |
| 509 | return -EBUSY; |
| 510 | } |
| 511 | |
| 512 | return 0; |
| 513 | } |
| 514 | |
| 515 | static int rpr0521_write_int_disable(struct rpr0521_data *data) |
| 516 | { |
| 517 | /* Don't care of clearing mode, assert and latch. */ |
| 518 | return regmap_write(data->regmap, RPR0521_REG_INTERRUPT, |
| 519 | RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE | |
| 520 | RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE |
| 521 | ); |
| 522 | } |
| 523 | |
| 524 | /* |
| 525 | * Trigger producer enable / disable. Note that there will be trigs only when |
| 526 | * measurement data is ready to be read. |
| 527 | */ |
| 528 | static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger, |
| 529 | bool enable_drdy) |
| 530 | { |
| 531 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger); |
| 532 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 533 | int err; |
| 534 | |
| 535 | if (enable_drdy) |
| 536 | err = rpr0521_write_int_enable(data); |
| 537 | else |
| 538 | err = rpr0521_write_int_disable(data); |
| 539 | if (err) |
| 540 | dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n"); |
| 541 | |
| 542 | return err; |
| 543 | } |
| 544 | |
| 545 | static const struct iio_trigger_ops rpr0521_trigger_ops = { |
| 546 | .set_trigger_state = rpr0521_pxs_drdy_set_state, |
| 547 | }; |
| 548 | |
| 549 | |
| 550 | static int rpr0521_buffer_preenable(struct iio_dev *indio_dev) |
| 551 | { |
| 552 | int err; |
| 553 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 554 | |
| 555 | mutex_lock(&data->lock); |
| 556 | err = rpr0521_set_power_state(data, true, |
| 557 | (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK)); |
| 558 | mutex_unlock(&data->lock); |
| 559 | if (err) |
| 560 | dev_err(&data->client->dev, "_buffer_preenable fail\n"); |
| 561 | |
| 562 | return err; |
| 563 | } |
| 564 | |
| 565 | static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev) |
| 566 | { |
| 567 | int err; |
| 568 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 569 | |
| 570 | mutex_lock(&data->lock); |
| 571 | err = rpr0521_set_power_state(data, false, |
| 572 | (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK)); |
| 573 | mutex_unlock(&data->lock); |
| 574 | if (err) |
| 575 | dev_err(&data->client->dev, "_buffer_postdisable fail\n"); |
| 576 | |
| 577 | return err; |
| 578 | } |
| 579 | |
| 580 | static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = { |
| 581 | .preenable = rpr0521_buffer_preenable, |
| 582 | .postenable = iio_triggered_buffer_postenable, |
| 583 | .predisable = iio_triggered_buffer_predisable, |
| 584 | .postdisable = rpr0521_buffer_postdisable, |
| 585 | }; |
| 586 | |
| 587 | static int rpr0521_get_gain(struct rpr0521_data *data, int chan, |
| 588 | int *val, int *val2) |
| 589 | { |
| 590 | int ret, reg, idx; |
| 591 | |
| 592 | ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®); |
| 593 | if (ret < 0) |
| 594 | return ret; |
| 595 | |
| 596 | idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift; |
| 597 | *val = rpr0521_gain[chan].gain[idx].scale; |
| 598 | *val2 = rpr0521_gain[chan].gain[idx].uscale; |
| 599 | |
| 600 | return 0; |
| 601 | } |
| 602 | |
| 603 | static int rpr0521_set_gain(struct rpr0521_data *data, int chan, |
| 604 | int val, int val2) |
| 605 | { |
| 606 | int i, idx = -EINVAL; |
| 607 | |
| 608 | /* get gain index */ |
| 609 | for (i = 0; i < rpr0521_gain[chan].size; i++) |
| 610 | if (val == rpr0521_gain[chan].gain[i].scale && |
| 611 | val2 == rpr0521_gain[chan].gain[i].uscale) { |
| 612 | idx = i; |
| 613 | break; |
| 614 | } |
| 615 | |
| 616 | if (idx < 0) |
| 617 | return idx; |
| 618 | |
| 619 | return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg, |
| 620 | rpr0521_gain[chan].mask, |
| 621 | idx << rpr0521_gain[chan].shift); |
| 622 | } |
| 623 | |
| 624 | static int rpr0521_read_samp_freq(struct rpr0521_data *data, |
| 625 | enum iio_chan_type chan_type, |
| 626 | int *val, int *val2) |
| 627 | { |
| 628 | int reg, ret; |
| 629 | |
| 630 | ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®); |
| 631 | if (ret < 0) |
| 632 | return ret; |
| 633 | |
| 634 | reg &= RPR0521_MODE_MEAS_TIME_MASK; |
| 635 | if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i)) |
| 636 | return -EINVAL; |
| 637 | |
| 638 | switch (chan_type) { |
| 639 | case IIO_INTENSITY: |
| 640 | *val = rpr0521_samp_freq_i[reg].als_hz; |
| 641 | *val2 = rpr0521_samp_freq_i[reg].als_uhz; |
| 642 | return 0; |
| 643 | |
| 644 | case IIO_PROXIMITY: |
| 645 | *val = rpr0521_samp_freq_i[reg].pxs_hz; |
| 646 | *val2 = rpr0521_samp_freq_i[reg].pxs_uhz; |
| 647 | return 0; |
| 648 | |
| 649 | default: |
| 650 | return -EINVAL; |
| 651 | } |
| 652 | } |
| 653 | |
| 654 | static int rpr0521_write_samp_freq_common(struct rpr0521_data *data, |
| 655 | enum iio_chan_type chan_type, |
| 656 | int val, int val2) |
| 657 | { |
| 658 | int i; |
| 659 | |
| 660 | /* |
| 661 | * Ignore channel |
| 662 | * both pxs and als are setup only to same freq because of simplicity |
| 663 | */ |
| 664 | switch (val) { |
| 665 | case 0: |
| 666 | i = 0; |
| 667 | break; |
| 668 | |
| 669 | case 2: |
| 670 | if (val2 != 500000) |
| 671 | return -EINVAL; |
| 672 | |
| 673 | i = 11; |
| 674 | break; |
| 675 | |
| 676 | case 10: |
| 677 | i = 6; |
| 678 | break; |
| 679 | |
| 680 | default: |
| 681 | return -EINVAL; |
| 682 | } |
| 683 | |
| 684 | return regmap_update_bits(data->regmap, |
| 685 | RPR0521_REG_MODE_CTRL, |
| 686 | RPR0521_MODE_MEAS_TIME_MASK, |
| 687 | i); |
| 688 | } |
| 689 | |
| 690 | static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset) |
| 691 | { |
| 692 | int ret; |
| 693 | __le16 buffer; |
| 694 | |
| 695 | ret = regmap_bulk_read(data->regmap, |
| 696 | RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer)); |
| 697 | |
| 698 | if (ret < 0) { |
| 699 | dev_err(&data->client->dev, "Failed to read PS OFFSET register\n"); |
| 700 | return ret; |
| 701 | } |
| 702 | *offset = le16_to_cpu(buffer); |
| 703 | |
| 704 | return ret; |
| 705 | } |
| 706 | |
| 707 | static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset) |
| 708 | { |
| 709 | int ret; |
| 710 | __le16 buffer; |
| 711 | |
| 712 | buffer = cpu_to_le16(offset & 0x3ff); |
| 713 | ret = regmap_raw_write(data->regmap, |
| 714 | RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer)); |
| 715 | |
| 716 | if (ret < 0) { |
| 717 | dev_err(&data->client->dev, "Failed to write PS OFFSET register\n"); |
| 718 | return ret; |
| 719 | } |
| 720 | |
| 721 | return ret; |
| 722 | } |
| 723 | |
| 724 | static int rpr0521_read_raw(struct iio_dev *indio_dev, |
| 725 | struct iio_chan_spec const *chan, int *val, |
| 726 | int *val2, long mask) |
| 727 | { |
| 728 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 729 | int ret; |
| 730 | int busy; |
| 731 | u8 device_mask; |
| 732 | __le16 raw_data; |
| 733 | |
| 734 | switch (mask) { |
| 735 | case IIO_CHAN_INFO_RAW: |
| 736 | if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY) |
| 737 | return -EINVAL; |
| 738 | |
| 739 | busy = iio_device_claim_direct_mode(indio_dev); |
| 740 | if (busy) |
| 741 | return -EBUSY; |
| 742 | |
| 743 | device_mask = rpr0521_data_reg[chan->address].device_mask; |
| 744 | |
| 745 | mutex_lock(&data->lock); |
| 746 | ret = rpr0521_set_power_state(data, true, device_mask); |
| 747 | if (ret < 0) |
| 748 | goto rpr0521_read_raw_out; |
| 749 | |
| 750 | ret = regmap_bulk_read(data->regmap, |
| 751 | rpr0521_data_reg[chan->address].address, |
| 752 | &raw_data, sizeof(raw_data)); |
| 753 | if (ret < 0) { |
| 754 | rpr0521_set_power_state(data, false, device_mask); |
| 755 | goto rpr0521_read_raw_out; |
| 756 | } |
| 757 | |
| 758 | ret = rpr0521_set_power_state(data, false, device_mask); |
| 759 | |
| 760 | rpr0521_read_raw_out: |
| 761 | mutex_unlock(&data->lock); |
| 762 | iio_device_release_direct_mode(indio_dev); |
| 763 | if (ret < 0) |
| 764 | return ret; |
| 765 | |
| 766 | *val = le16_to_cpu(raw_data); |
| 767 | |
| 768 | return IIO_VAL_INT; |
| 769 | |
| 770 | case IIO_CHAN_INFO_SCALE: |
| 771 | mutex_lock(&data->lock); |
| 772 | ret = rpr0521_get_gain(data, chan->address, val, val2); |
| 773 | mutex_unlock(&data->lock); |
| 774 | if (ret < 0) |
| 775 | return ret; |
| 776 | |
| 777 | return IIO_VAL_INT_PLUS_MICRO; |
| 778 | |
| 779 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 780 | mutex_lock(&data->lock); |
| 781 | ret = rpr0521_read_samp_freq(data, chan->type, val, val2); |
| 782 | mutex_unlock(&data->lock); |
| 783 | if (ret < 0) |
| 784 | return ret; |
| 785 | |
| 786 | return IIO_VAL_INT_PLUS_MICRO; |
| 787 | |
| 788 | case IIO_CHAN_INFO_OFFSET: |
| 789 | mutex_lock(&data->lock); |
| 790 | ret = rpr0521_read_ps_offset(data, val); |
| 791 | mutex_unlock(&data->lock); |
| 792 | if (ret < 0) |
| 793 | return ret; |
| 794 | |
| 795 | return IIO_VAL_INT; |
| 796 | |
| 797 | default: |
| 798 | return -EINVAL; |
| 799 | } |
| 800 | } |
| 801 | |
| 802 | static int rpr0521_write_raw(struct iio_dev *indio_dev, |
| 803 | struct iio_chan_spec const *chan, int val, |
| 804 | int val2, long mask) |
| 805 | { |
| 806 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 807 | int ret; |
| 808 | |
| 809 | switch (mask) { |
| 810 | case IIO_CHAN_INFO_SCALE: |
| 811 | mutex_lock(&data->lock); |
| 812 | ret = rpr0521_set_gain(data, chan->address, val, val2); |
| 813 | mutex_unlock(&data->lock); |
| 814 | |
| 815 | return ret; |
| 816 | |
| 817 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 818 | mutex_lock(&data->lock); |
| 819 | ret = rpr0521_write_samp_freq_common(data, chan->type, |
| 820 | val, val2); |
| 821 | mutex_unlock(&data->lock); |
| 822 | |
| 823 | return ret; |
| 824 | |
| 825 | case IIO_CHAN_INFO_OFFSET: |
| 826 | mutex_lock(&data->lock); |
| 827 | ret = rpr0521_write_ps_offset(data, val); |
| 828 | mutex_unlock(&data->lock); |
| 829 | |
| 830 | return ret; |
| 831 | |
| 832 | default: |
| 833 | return -EINVAL; |
| 834 | } |
| 835 | } |
| 836 | |
| 837 | static const struct iio_info rpr0521_info = { |
| 838 | .read_raw = rpr0521_read_raw, |
| 839 | .write_raw = rpr0521_write_raw, |
| 840 | .attrs = &rpr0521_attribute_group, |
| 841 | }; |
| 842 | |
| 843 | static int rpr0521_init(struct rpr0521_data *data) |
| 844 | { |
| 845 | int ret; |
| 846 | int id; |
| 847 | |
| 848 | ret = regmap_read(data->regmap, RPR0521_REG_ID, &id); |
| 849 | if (ret < 0) { |
| 850 | dev_err(&data->client->dev, "Failed to read REG_ID register\n"); |
| 851 | return ret; |
| 852 | } |
| 853 | |
| 854 | if (id != RPR0521_MANUFACT_ID) { |
| 855 | dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n", |
| 856 | id, RPR0521_MANUFACT_ID); |
| 857 | return -ENODEV; |
| 858 | } |
| 859 | |
| 860 | /* set default measurement time - 100 ms for both ALS and PS */ |
| 861 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, |
| 862 | RPR0521_MODE_MEAS_TIME_MASK, |
| 863 | RPR0521_DEFAULT_MEAS_TIME); |
| 864 | if (ret) { |
| 865 | pr_err("regmap_update_bits returned %d\n", ret); |
| 866 | return ret; |
| 867 | } |
| 868 | |
| 869 | #ifndef CONFIG_PM |
| 870 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); |
| 871 | if (ret < 0) |
| 872 | return ret; |
| 873 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); |
| 874 | if (ret < 0) |
| 875 | return ret; |
| 876 | #endif |
| 877 | |
| 878 | data->irq_timestamp = 0; |
| 879 | |
| 880 | return 0; |
| 881 | } |
| 882 | |
| 883 | static int rpr0521_poweroff(struct rpr0521_data *data) |
| 884 | { |
| 885 | int ret; |
| 886 | int tmp; |
| 887 | |
| 888 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, |
| 889 | RPR0521_MODE_ALS_MASK | |
| 890 | RPR0521_MODE_PXS_MASK, |
| 891 | RPR0521_MODE_ALS_DISABLE | |
| 892 | RPR0521_MODE_PXS_DISABLE); |
| 893 | if (ret < 0) |
| 894 | return ret; |
| 895 | |
| 896 | data->als_dev_en = false; |
| 897 | data->pxs_dev_en = false; |
| 898 | |
| 899 | /* |
| 900 | * Int pin keeps state after power off. Set pin to high impedance |
| 901 | * mode to prevent power drain. |
| 902 | */ |
| 903 | ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp); |
| 904 | if (ret) { |
| 905 | dev_err(&data->client->dev, "Failed to reset int pin.\n"); |
| 906 | return ret; |
| 907 | } |
| 908 | |
| 909 | return 0; |
| 910 | } |
| 911 | |
| 912 | static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg) |
| 913 | { |
| 914 | switch (reg) { |
| 915 | case RPR0521_REG_MODE_CTRL: |
| 916 | case RPR0521_REG_ALS_CTRL: |
| 917 | case RPR0521_REG_PXS_CTRL: |
| 918 | return false; |
| 919 | default: |
| 920 | return true; |
| 921 | } |
| 922 | } |
| 923 | |
| 924 | static const struct regmap_config rpr0521_regmap_config = { |
| 925 | .name = RPR0521_REGMAP_NAME, |
| 926 | |
| 927 | .reg_bits = 8, |
| 928 | .val_bits = 8, |
| 929 | |
| 930 | .max_register = RPR0521_REG_ID, |
| 931 | .cache_type = REGCACHE_RBTREE, |
| 932 | .volatile_reg = rpr0521_is_volatile_reg, |
| 933 | }; |
| 934 | |
| 935 | static int rpr0521_probe(struct i2c_client *client, |
| 936 | const struct i2c_device_id *id) |
| 937 | { |
| 938 | struct rpr0521_data *data; |
| 939 | struct iio_dev *indio_dev; |
| 940 | struct regmap *regmap; |
| 941 | int ret; |
| 942 | |
| 943 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); |
| 944 | if (!indio_dev) |
| 945 | return -ENOMEM; |
| 946 | |
| 947 | regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config); |
| 948 | if (IS_ERR(regmap)) { |
| 949 | dev_err(&client->dev, "regmap_init failed!\n"); |
| 950 | return PTR_ERR(regmap); |
| 951 | } |
| 952 | |
| 953 | data = iio_priv(indio_dev); |
| 954 | i2c_set_clientdata(client, indio_dev); |
| 955 | data->client = client; |
| 956 | data->regmap = regmap; |
| 957 | |
| 958 | mutex_init(&data->lock); |
| 959 | |
| 960 | indio_dev->dev.parent = &client->dev; |
| 961 | indio_dev->info = &rpr0521_info; |
| 962 | indio_dev->name = RPR0521_DRV_NAME; |
| 963 | indio_dev->channels = rpr0521_channels; |
| 964 | indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels); |
| 965 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 966 | |
| 967 | ret = rpr0521_init(data); |
| 968 | if (ret < 0) { |
| 969 | dev_err(&client->dev, "rpr0521 chip init failed\n"); |
| 970 | return ret; |
| 971 | } |
| 972 | |
| 973 | ret = pm_runtime_set_active(&client->dev); |
| 974 | if (ret < 0) |
| 975 | goto err_poweroff; |
| 976 | |
| 977 | pm_runtime_enable(&client->dev); |
| 978 | pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS); |
| 979 | pm_runtime_use_autosuspend(&client->dev); |
| 980 | |
| 981 | /* |
| 982 | * If sensor write/read is needed in _probe after _use_autosuspend, |
| 983 | * sensor needs to be _resumed first using rpr0521_set_power_state(). |
| 984 | */ |
| 985 | |
| 986 | /* IRQ to trigger setup */ |
| 987 | if (client->irq) { |
| 988 | /* Trigger0 producer setup */ |
| 989 | data->drdy_trigger0 = devm_iio_trigger_alloc( |
| 990 | indio_dev->dev.parent, |
| 991 | "%s-dev%d", indio_dev->name, indio_dev->id); |
| 992 | if (!data->drdy_trigger0) { |
| 993 | ret = -ENOMEM; |
| 994 | goto err_pm_disable; |
| 995 | } |
| 996 | data->drdy_trigger0->dev.parent = indio_dev->dev.parent; |
| 997 | data->drdy_trigger0->ops = &rpr0521_trigger_ops; |
| 998 | indio_dev->available_scan_masks = rpr0521_available_scan_masks; |
| 999 | iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev); |
| 1000 | |
| 1001 | /* Ties irq to trigger producer handler. */ |
| 1002 | ret = devm_request_threaded_irq(&client->dev, client->irq, |
| 1003 | rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread, |
| 1004 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
| 1005 | RPR0521_IRQ_NAME, indio_dev); |
| 1006 | if (ret < 0) { |
| 1007 | dev_err(&client->dev, "request irq %d for trigger0 failed\n", |
| 1008 | client->irq); |
| 1009 | goto err_pm_disable; |
| 1010 | } |
| 1011 | |
| 1012 | ret = devm_iio_trigger_register(indio_dev->dev.parent, |
| 1013 | data->drdy_trigger0); |
| 1014 | if (ret) { |
| 1015 | dev_err(&client->dev, "iio trigger register failed\n"); |
| 1016 | goto err_pm_disable; |
| 1017 | } |
| 1018 | |
| 1019 | /* |
| 1020 | * Now whole pipe from physical interrupt (irq defined by |
| 1021 | * devicetree to device) to trigger0 output is set up. |
| 1022 | */ |
| 1023 | |
| 1024 | /* Trigger consumer setup */ |
| 1025 | ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent, |
| 1026 | indio_dev, |
| 1027 | rpr0521_trigger_consumer_store_time, |
| 1028 | rpr0521_trigger_consumer_handler, |
| 1029 | &rpr0521_buffer_setup_ops); |
| 1030 | if (ret < 0) { |
| 1031 | dev_err(&client->dev, "iio triggered buffer setup failed\n"); |
| 1032 | goto err_pm_disable; |
| 1033 | } |
| 1034 | } |
| 1035 | |
| 1036 | ret = iio_device_register(indio_dev); |
| 1037 | if (ret) |
| 1038 | goto err_pm_disable; |
| 1039 | |
| 1040 | return 0; |
| 1041 | |
| 1042 | err_pm_disable: |
| 1043 | pm_runtime_disable(&client->dev); |
| 1044 | pm_runtime_set_suspended(&client->dev); |
| 1045 | pm_runtime_put_noidle(&client->dev); |
| 1046 | err_poweroff: |
| 1047 | rpr0521_poweroff(data); |
| 1048 | |
| 1049 | return ret; |
| 1050 | } |
| 1051 | |
| 1052 | static int rpr0521_remove(struct i2c_client *client) |
| 1053 | { |
| 1054 | struct iio_dev *indio_dev = i2c_get_clientdata(client); |
| 1055 | |
| 1056 | iio_device_unregister(indio_dev); |
| 1057 | |
| 1058 | pm_runtime_disable(&client->dev); |
| 1059 | pm_runtime_set_suspended(&client->dev); |
| 1060 | pm_runtime_put_noidle(&client->dev); |
| 1061 | |
| 1062 | rpr0521_poweroff(iio_priv(indio_dev)); |
| 1063 | |
| 1064 | return 0; |
| 1065 | } |
| 1066 | |
| 1067 | #ifdef CONFIG_PM |
| 1068 | static int rpr0521_runtime_suspend(struct device *dev) |
| 1069 | { |
| 1070 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); |
| 1071 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 1072 | int ret; |
| 1073 | |
| 1074 | mutex_lock(&data->lock); |
| 1075 | /* If measurements are enabled, enable them on resume */ |
| 1076 | if (!data->als_need_dis) |
| 1077 | data->als_ps_need_en = data->als_dev_en; |
| 1078 | if (!data->pxs_need_dis) |
| 1079 | data->pxs_ps_need_en = data->pxs_dev_en; |
| 1080 | |
| 1081 | /* disable channels and sets {als,pxs}_dev_en to false */ |
| 1082 | ret = rpr0521_poweroff(data); |
| 1083 | regcache_mark_dirty(data->regmap); |
| 1084 | mutex_unlock(&data->lock); |
| 1085 | |
| 1086 | return ret; |
| 1087 | } |
| 1088 | |
| 1089 | static int rpr0521_runtime_resume(struct device *dev) |
| 1090 | { |
| 1091 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); |
| 1092 | struct rpr0521_data *data = iio_priv(indio_dev); |
| 1093 | int ret; |
| 1094 | |
| 1095 | regcache_sync(data->regmap); |
| 1096 | if (data->als_ps_need_en) { |
| 1097 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); |
| 1098 | if (ret < 0) |
| 1099 | return ret; |
| 1100 | data->als_ps_need_en = false; |
| 1101 | } |
| 1102 | |
| 1103 | if (data->pxs_ps_need_en) { |
| 1104 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); |
| 1105 | if (ret < 0) |
| 1106 | return ret; |
| 1107 | data->pxs_ps_need_en = false; |
| 1108 | } |
| 1109 | msleep(100); //wait for first measurement result |
| 1110 | |
| 1111 | return 0; |
| 1112 | } |
| 1113 | #endif |
| 1114 | |
| 1115 | static const struct dev_pm_ops rpr0521_pm_ops = { |
| 1116 | SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend, |
| 1117 | rpr0521_runtime_resume, NULL) |
| 1118 | }; |
| 1119 | |
| 1120 | static const struct acpi_device_id rpr0521_acpi_match[] = { |
| 1121 | {"RPR0521", 0}, |
| 1122 | { } |
| 1123 | }; |
| 1124 | MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match); |
| 1125 | |
| 1126 | static const struct i2c_device_id rpr0521_id[] = { |
| 1127 | {"rpr0521", 0}, |
| 1128 | { } |
| 1129 | }; |
| 1130 | |
| 1131 | MODULE_DEVICE_TABLE(i2c, rpr0521_id); |
| 1132 | |
| 1133 | static struct i2c_driver rpr0521_driver = { |
| 1134 | .driver = { |
| 1135 | .name = RPR0521_DRV_NAME, |
| 1136 | .pm = &rpr0521_pm_ops, |
| 1137 | .acpi_match_table = ACPI_PTR(rpr0521_acpi_match), |
| 1138 | }, |
| 1139 | .probe = rpr0521_probe, |
| 1140 | .remove = rpr0521_remove, |
| 1141 | .id_table = rpr0521_id, |
| 1142 | }; |
| 1143 | |
| 1144 | module_i2c_driver(rpr0521_driver); |
| 1145 | |
| 1146 | MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>"); |
| 1147 | MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver"); |
| 1148 | MODULE_LICENSE("GPL v2"); |