b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Driver for STM32 Digital Camera Memory Interface |
| 4 | * |
| 5 | * Copyright (C) STMicroelectronics SA 2017 |
| 6 | * Authors: Yannick Fertre <yannick.fertre@st.com> |
| 7 | * Hugues Fruchet <hugues.fruchet@st.com> |
| 8 | * for STMicroelectronics. |
| 9 | * |
| 10 | * This driver is based on atmel_isi.c |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/clk.h> |
| 15 | #include <linux/completion.h> |
| 16 | #include <linux/delay.h> |
| 17 | #include <linux/dmaengine.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/module.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/of_device.h> |
| 24 | #include <linux/of_graph.h> |
| 25 | #include <linux/pinctrl/consumer.h> |
| 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/pm_runtime.h> |
| 28 | #include <linux/reset.h> |
| 29 | #include <linux/videodev2.h> |
| 30 | |
| 31 | #include <media/v4l2-ctrls.h> |
| 32 | #include <media/v4l2-dev.h> |
| 33 | #include <media/v4l2-device.h> |
| 34 | #include <media/v4l2-event.h> |
| 35 | #include <media/v4l2-fwnode.h> |
| 36 | #include <media/v4l2-image-sizes.h> |
| 37 | #include <media/v4l2-ioctl.h> |
| 38 | #include <media/v4l2-rect.h> |
| 39 | #include <media/videobuf2-dma-contig.h> |
| 40 | |
| 41 | #define DRV_NAME "stm32-dcmi" |
| 42 | |
| 43 | /* Registers offset for DCMI */ |
| 44 | #define DCMI_CR 0x00 /* Control Register */ |
| 45 | #define DCMI_SR 0x04 /* Status Register */ |
| 46 | #define DCMI_RIS 0x08 /* Raw Interrupt Status register */ |
| 47 | #define DCMI_IER 0x0C /* Interrupt Enable Register */ |
| 48 | #define DCMI_MIS 0x10 /* Masked Interrupt Status register */ |
| 49 | #define DCMI_ICR 0x14 /* Interrupt Clear Register */ |
| 50 | #define DCMI_ESCR 0x18 /* Embedded Synchronization Code Register */ |
| 51 | #define DCMI_ESUR 0x1C /* Embedded Synchronization Unmask Register */ |
| 52 | #define DCMI_CWSTRT 0x20 /* Crop Window STaRT */ |
| 53 | #define DCMI_CWSIZE 0x24 /* Crop Window SIZE */ |
| 54 | #define DCMI_DR 0x28 /* Data Register */ |
| 55 | #define DCMI_IDR 0x2C /* IDentifier Register */ |
| 56 | |
| 57 | /* Bits definition for control register (DCMI_CR) */ |
| 58 | #define CR_CAPTURE BIT(0) |
| 59 | #define CR_CM BIT(1) |
| 60 | #define CR_CROP BIT(2) |
| 61 | #define CR_JPEG BIT(3) |
| 62 | #define CR_ESS BIT(4) |
| 63 | #define CR_PCKPOL BIT(5) |
| 64 | #define CR_HSPOL BIT(6) |
| 65 | #define CR_VSPOL BIT(7) |
| 66 | #define CR_FCRC_0 BIT(8) |
| 67 | #define CR_FCRC_1 BIT(9) |
| 68 | #define CR_EDM_0 BIT(10) |
| 69 | #define CR_EDM_1 BIT(11) |
| 70 | #define CR_ENABLE BIT(14) |
| 71 | |
| 72 | /* Bits definition for status register (DCMI_SR) */ |
| 73 | #define SR_HSYNC BIT(0) |
| 74 | #define SR_VSYNC BIT(1) |
| 75 | #define SR_FNE BIT(2) |
| 76 | |
| 77 | /* |
| 78 | * Bits definition for interrupt registers |
| 79 | * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR) |
| 80 | */ |
| 81 | #define IT_FRAME BIT(0) |
| 82 | #define IT_OVR BIT(1) |
| 83 | #define IT_ERR BIT(2) |
| 84 | #define IT_VSYNC BIT(3) |
| 85 | #define IT_LINE BIT(4) |
| 86 | |
| 87 | enum state { |
| 88 | STOPPED = 0, |
| 89 | WAIT_FOR_BUFFER, |
| 90 | RUNNING, |
| 91 | }; |
| 92 | |
| 93 | #define MIN_WIDTH 16U |
| 94 | #define MAX_WIDTH 2592U |
| 95 | #define MIN_HEIGHT 16U |
| 96 | #define MAX_HEIGHT 2592U |
| 97 | |
| 98 | #define TIMEOUT_MS 1000 |
| 99 | |
| 100 | #define OVERRUN_ERROR_THRESHOLD 3 |
| 101 | |
| 102 | struct dcmi_graph_entity { |
| 103 | struct v4l2_async_subdev asd; |
| 104 | |
| 105 | struct device_node *remote_node; |
| 106 | struct v4l2_subdev *source; |
| 107 | }; |
| 108 | |
| 109 | struct dcmi_format { |
| 110 | u32 fourcc; |
| 111 | u32 mbus_code; |
| 112 | u8 bpp; |
| 113 | }; |
| 114 | |
| 115 | struct dcmi_framesize { |
| 116 | u32 width; |
| 117 | u32 height; |
| 118 | }; |
| 119 | |
| 120 | struct dcmi_buf { |
| 121 | struct vb2_v4l2_buffer vb; |
| 122 | bool prepared; |
| 123 | dma_addr_t paddr; |
| 124 | size_t size; |
| 125 | struct list_head list; |
| 126 | }; |
| 127 | |
| 128 | struct stm32_dcmi { |
| 129 | /* Protects the access of variables shared within the interrupt */ |
| 130 | spinlock_t irqlock; |
| 131 | struct device *dev; |
| 132 | void __iomem *regs; |
| 133 | struct resource *res; |
| 134 | struct reset_control *rstc; |
| 135 | int sequence; |
| 136 | struct list_head buffers; |
| 137 | struct dcmi_buf *active; |
| 138 | int irq; |
| 139 | |
| 140 | struct v4l2_device v4l2_dev; |
| 141 | struct video_device *vdev; |
| 142 | struct v4l2_async_notifier notifier; |
| 143 | struct dcmi_graph_entity entity; |
| 144 | struct v4l2_format fmt; |
| 145 | struct v4l2_rect crop; |
| 146 | bool do_crop; |
| 147 | |
| 148 | const struct dcmi_format **sd_formats; |
| 149 | unsigned int num_of_sd_formats; |
| 150 | const struct dcmi_format *sd_format; |
| 151 | struct dcmi_framesize *sd_framesizes; |
| 152 | unsigned int num_of_sd_framesizes; |
| 153 | struct dcmi_framesize sd_framesize; |
| 154 | struct v4l2_rect sd_bounds; |
| 155 | |
| 156 | /* Protect this data structure */ |
| 157 | struct mutex lock; |
| 158 | struct vb2_queue queue; |
| 159 | |
| 160 | struct v4l2_fwnode_bus_parallel bus; |
| 161 | struct completion complete; |
| 162 | struct clk *mclk; |
| 163 | enum state state; |
| 164 | struct dma_chan *dma_chan; |
| 165 | dma_cookie_t dma_cookie; |
| 166 | u32 misr; |
| 167 | int errors_count; |
| 168 | int overrun_count; |
| 169 | int buffers_count; |
| 170 | |
| 171 | /* Ensure DMA operations atomicity */ |
| 172 | struct mutex dma_lock; |
| 173 | |
| 174 | struct media_device mdev; |
| 175 | struct media_pad vid_cap_pad; |
| 176 | struct media_pipeline pipeline; |
| 177 | }; |
| 178 | |
| 179 | static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n) |
| 180 | { |
| 181 | return container_of(n, struct stm32_dcmi, notifier); |
| 182 | } |
| 183 | |
| 184 | static inline u32 reg_read(void __iomem *base, u32 reg) |
| 185 | { |
| 186 | return readl_relaxed(base + reg); |
| 187 | } |
| 188 | |
| 189 | static inline void reg_write(void __iomem *base, u32 reg, u32 val) |
| 190 | { |
| 191 | writel_relaxed(val, base + reg); |
| 192 | } |
| 193 | |
| 194 | static inline void reg_set(void __iomem *base, u32 reg, u32 mask) |
| 195 | { |
| 196 | reg_write(base, reg, reg_read(base, reg) | mask); |
| 197 | } |
| 198 | |
| 199 | static inline void reg_clear(void __iomem *base, u32 reg, u32 mask) |
| 200 | { |
| 201 | reg_write(base, reg, reg_read(base, reg) & ~mask); |
| 202 | } |
| 203 | |
| 204 | static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf); |
| 205 | |
| 206 | static void dcmi_buffer_done(struct stm32_dcmi *dcmi, |
| 207 | struct dcmi_buf *buf, |
| 208 | size_t bytesused, |
| 209 | int err) |
| 210 | { |
| 211 | struct vb2_v4l2_buffer *vbuf; |
| 212 | |
| 213 | if (!buf) |
| 214 | return; |
| 215 | |
| 216 | list_del_init(&buf->list); |
| 217 | |
| 218 | vbuf = &buf->vb; |
| 219 | |
| 220 | vbuf->sequence = dcmi->sequence++; |
| 221 | vbuf->field = V4L2_FIELD_NONE; |
| 222 | vbuf->vb2_buf.timestamp = ktime_get_ns(); |
| 223 | vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused); |
| 224 | vb2_buffer_done(&vbuf->vb2_buf, |
| 225 | err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE); |
| 226 | dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n", |
| 227 | vbuf->vb2_buf.index, vbuf->sequence, bytesused); |
| 228 | |
| 229 | dcmi->buffers_count++; |
| 230 | dcmi->active = NULL; |
| 231 | } |
| 232 | |
| 233 | static int dcmi_restart_capture(struct stm32_dcmi *dcmi) |
| 234 | { |
| 235 | struct dcmi_buf *buf; |
| 236 | |
| 237 | spin_lock_irq(&dcmi->irqlock); |
| 238 | |
| 239 | if (dcmi->state != RUNNING) { |
| 240 | spin_unlock_irq(&dcmi->irqlock); |
| 241 | return -EINVAL; |
| 242 | } |
| 243 | |
| 244 | /* Restart a new DMA transfer with next buffer */ |
| 245 | if (list_empty(&dcmi->buffers)) { |
| 246 | dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n"); |
| 247 | dcmi->state = WAIT_FOR_BUFFER; |
| 248 | spin_unlock_irq(&dcmi->irqlock); |
| 249 | return 0; |
| 250 | } |
| 251 | buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list); |
| 252 | dcmi->active = buf; |
| 253 | |
| 254 | spin_unlock_irq(&dcmi->irqlock); |
| 255 | |
| 256 | return dcmi_start_capture(dcmi, buf); |
| 257 | } |
| 258 | |
| 259 | static void dcmi_dma_callback(void *param) |
| 260 | { |
| 261 | struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param; |
| 262 | struct dma_tx_state state; |
| 263 | enum dma_status status; |
| 264 | struct dcmi_buf *buf = dcmi->active; |
| 265 | |
| 266 | spin_lock_irq(&dcmi->irqlock); |
| 267 | |
| 268 | /* Check DMA status */ |
| 269 | status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state); |
| 270 | |
| 271 | switch (status) { |
| 272 | case DMA_IN_PROGRESS: |
| 273 | dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__); |
| 274 | break; |
| 275 | case DMA_PAUSED: |
| 276 | dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__); |
| 277 | break; |
| 278 | case DMA_ERROR: |
| 279 | dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__); |
| 280 | |
| 281 | /* Return buffer to V4L2 in error state */ |
| 282 | dcmi_buffer_done(dcmi, buf, 0, -EIO); |
| 283 | break; |
| 284 | case DMA_COMPLETE: |
| 285 | dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__); |
| 286 | |
| 287 | /* Return buffer to V4L2 */ |
| 288 | dcmi_buffer_done(dcmi, buf, buf->size, 0); |
| 289 | |
| 290 | spin_unlock_irq(&dcmi->irqlock); |
| 291 | |
| 292 | /* Restart capture */ |
| 293 | if (dcmi_restart_capture(dcmi)) |
| 294 | dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n", |
| 295 | __func__); |
| 296 | return; |
| 297 | default: |
| 298 | dev_err(dcmi->dev, "%s: Received unknown status\n", __func__); |
| 299 | break; |
| 300 | } |
| 301 | |
| 302 | spin_unlock_irq(&dcmi->irqlock); |
| 303 | } |
| 304 | |
| 305 | static int dcmi_start_dma(struct stm32_dcmi *dcmi, |
| 306 | struct dcmi_buf *buf) |
| 307 | { |
| 308 | struct dma_async_tx_descriptor *desc = NULL; |
| 309 | struct dma_slave_config config; |
| 310 | int ret; |
| 311 | |
| 312 | memset(&config, 0, sizeof(config)); |
| 313 | |
| 314 | config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR; |
| 315 | config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 316 | config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 317 | config.dst_maxburst = 4; |
| 318 | |
| 319 | /* Configure DMA channel */ |
| 320 | ret = dmaengine_slave_config(dcmi->dma_chan, &config); |
| 321 | if (ret < 0) { |
| 322 | dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n", |
| 323 | __func__, ret); |
| 324 | return ret; |
| 325 | } |
| 326 | |
| 327 | /* |
| 328 | * Avoid call of dmaengine_terminate_all() between |
| 329 | * dmaengine_prep_slave_single() and dmaengine_submit() |
| 330 | * by locking the whole DMA submission sequence |
| 331 | */ |
| 332 | mutex_lock(&dcmi->dma_lock); |
| 333 | |
| 334 | /* Prepare a DMA transaction */ |
| 335 | desc = dmaengine_prep_slave_single(dcmi->dma_chan, buf->paddr, |
| 336 | buf->size, |
| 337 | DMA_DEV_TO_MEM, |
| 338 | DMA_PREP_INTERRUPT); |
| 339 | if (!desc) { |
| 340 | dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_single failed for buffer phy=%pad size=%zu\n", |
| 341 | __func__, &buf->paddr, buf->size); |
| 342 | mutex_unlock(&dcmi->dma_lock); |
| 343 | return -EINVAL; |
| 344 | } |
| 345 | |
| 346 | /* Set completion callback routine for notification */ |
| 347 | desc->callback = dcmi_dma_callback; |
| 348 | desc->callback_param = dcmi; |
| 349 | |
| 350 | /* Push current DMA transaction in the pending queue */ |
| 351 | dcmi->dma_cookie = dmaengine_submit(desc); |
| 352 | if (dma_submit_error(dcmi->dma_cookie)) { |
| 353 | dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__); |
| 354 | mutex_unlock(&dcmi->dma_lock); |
| 355 | return -ENXIO; |
| 356 | } |
| 357 | |
| 358 | mutex_unlock(&dcmi->dma_lock); |
| 359 | |
| 360 | dma_async_issue_pending(dcmi->dma_chan); |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf) |
| 366 | { |
| 367 | int ret; |
| 368 | |
| 369 | if (!buf) |
| 370 | return -EINVAL; |
| 371 | |
| 372 | ret = dcmi_start_dma(dcmi, buf); |
| 373 | if (ret) { |
| 374 | dcmi->errors_count++; |
| 375 | return ret; |
| 376 | } |
| 377 | |
| 378 | /* Enable capture */ |
| 379 | reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE); |
| 380 | |
| 381 | return 0; |
| 382 | } |
| 383 | |
| 384 | static void dcmi_set_crop(struct stm32_dcmi *dcmi) |
| 385 | { |
| 386 | u32 size, start; |
| 387 | |
| 388 | /* Crop resolution */ |
| 389 | size = ((dcmi->crop.height - 1) << 16) | |
| 390 | ((dcmi->crop.width << 1) - 1); |
| 391 | reg_write(dcmi->regs, DCMI_CWSIZE, size); |
| 392 | |
| 393 | /* Crop start point */ |
| 394 | start = ((dcmi->crop.top) << 16) | |
| 395 | ((dcmi->crop.left << 1)); |
| 396 | reg_write(dcmi->regs, DCMI_CWSTRT, start); |
| 397 | |
| 398 | dev_dbg(dcmi->dev, "Cropping to %ux%u@%u:%u\n", |
| 399 | dcmi->crop.width, dcmi->crop.height, |
| 400 | dcmi->crop.left, dcmi->crop.top); |
| 401 | |
| 402 | /* Enable crop */ |
| 403 | reg_set(dcmi->regs, DCMI_CR, CR_CROP); |
| 404 | } |
| 405 | |
| 406 | static void dcmi_process_jpeg(struct stm32_dcmi *dcmi) |
| 407 | { |
| 408 | struct dma_tx_state state; |
| 409 | enum dma_status status; |
| 410 | struct dcmi_buf *buf = dcmi->active; |
| 411 | |
| 412 | if (!buf) |
| 413 | return; |
| 414 | |
| 415 | /* |
| 416 | * Because of variable JPEG buffer size sent by sensor, |
| 417 | * DMA transfer never completes due to transfer size never reached. |
| 418 | * In order to ensure that all the JPEG data are transferred |
| 419 | * in active buffer memory, DMA is drained. |
| 420 | * Then DMA tx status gives the amount of data transferred |
| 421 | * to memory, which is then returned to V4L2 through the active |
| 422 | * buffer payload. |
| 423 | */ |
| 424 | |
| 425 | /* Drain DMA */ |
| 426 | dmaengine_synchronize(dcmi->dma_chan); |
| 427 | |
| 428 | /* Get DMA residue to get JPEG size */ |
| 429 | status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state); |
| 430 | if (status != DMA_ERROR && state.residue < buf->size) { |
| 431 | /* Return JPEG buffer to V4L2 with received JPEG buffer size */ |
| 432 | dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0); |
| 433 | } else { |
| 434 | dcmi->errors_count++; |
| 435 | dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n", |
| 436 | __func__); |
| 437 | /* Return JPEG buffer to V4L2 in ERROR state */ |
| 438 | dcmi_buffer_done(dcmi, buf, 0, -EIO); |
| 439 | } |
| 440 | |
| 441 | /* Abort DMA operation */ |
| 442 | dmaengine_terminate_all(dcmi->dma_chan); |
| 443 | |
| 444 | /* Restart capture */ |
| 445 | if (dcmi_restart_capture(dcmi)) |
| 446 | dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n", |
| 447 | __func__); |
| 448 | } |
| 449 | |
| 450 | static irqreturn_t dcmi_irq_thread(int irq, void *arg) |
| 451 | { |
| 452 | struct stm32_dcmi *dcmi = arg; |
| 453 | |
| 454 | spin_lock_irq(&dcmi->irqlock); |
| 455 | |
| 456 | if (dcmi->misr & IT_OVR) { |
| 457 | dcmi->overrun_count++; |
| 458 | if (dcmi->overrun_count > OVERRUN_ERROR_THRESHOLD) |
| 459 | dcmi->errors_count++; |
| 460 | } |
| 461 | if (dcmi->misr & IT_ERR) |
| 462 | dcmi->errors_count++; |
| 463 | |
| 464 | if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG && |
| 465 | dcmi->misr & IT_FRAME) { |
| 466 | /* JPEG received */ |
| 467 | spin_unlock_irq(&dcmi->irqlock); |
| 468 | dcmi_process_jpeg(dcmi); |
| 469 | return IRQ_HANDLED; |
| 470 | } |
| 471 | |
| 472 | spin_unlock_irq(&dcmi->irqlock); |
| 473 | return IRQ_HANDLED; |
| 474 | } |
| 475 | |
| 476 | static irqreturn_t dcmi_irq_callback(int irq, void *arg) |
| 477 | { |
| 478 | struct stm32_dcmi *dcmi = arg; |
| 479 | unsigned long flags; |
| 480 | |
| 481 | spin_lock_irqsave(&dcmi->irqlock, flags); |
| 482 | |
| 483 | dcmi->misr = reg_read(dcmi->regs, DCMI_MIS); |
| 484 | |
| 485 | /* Clear interrupt */ |
| 486 | reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR); |
| 487 | |
| 488 | spin_unlock_irqrestore(&dcmi->irqlock, flags); |
| 489 | |
| 490 | return IRQ_WAKE_THREAD; |
| 491 | } |
| 492 | |
| 493 | static int dcmi_queue_setup(struct vb2_queue *vq, |
| 494 | unsigned int *nbuffers, |
| 495 | unsigned int *nplanes, |
| 496 | unsigned int sizes[], |
| 497 | struct device *alloc_devs[]) |
| 498 | { |
| 499 | struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq); |
| 500 | unsigned int size; |
| 501 | |
| 502 | size = dcmi->fmt.fmt.pix.sizeimage; |
| 503 | |
| 504 | /* Make sure the image size is large enough */ |
| 505 | if (*nplanes) |
| 506 | return sizes[0] < size ? -EINVAL : 0; |
| 507 | |
| 508 | *nplanes = 1; |
| 509 | sizes[0] = size; |
| 510 | |
| 511 | dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n", |
| 512 | *nbuffers, size); |
| 513 | |
| 514 | return 0; |
| 515 | } |
| 516 | |
| 517 | static int dcmi_buf_init(struct vb2_buffer *vb) |
| 518 | { |
| 519 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 520 | struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb); |
| 521 | |
| 522 | INIT_LIST_HEAD(&buf->list); |
| 523 | |
| 524 | return 0; |
| 525 | } |
| 526 | |
| 527 | static int dcmi_buf_prepare(struct vb2_buffer *vb) |
| 528 | { |
| 529 | struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue); |
| 530 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 531 | struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb); |
| 532 | unsigned long size; |
| 533 | |
| 534 | size = dcmi->fmt.fmt.pix.sizeimage; |
| 535 | |
| 536 | if (vb2_plane_size(vb, 0) < size) { |
| 537 | dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n", |
| 538 | __func__, vb2_plane_size(vb, 0), size); |
| 539 | return -EINVAL; |
| 540 | } |
| 541 | |
| 542 | vb2_set_plane_payload(vb, 0, size); |
| 543 | |
| 544 | if (!buf->prepared) { |
| 545 | /* Get memory addresses */ |
| 546 | buf->paddr = |
| 547 | vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0); |
| 548 | buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0); |
| 549 | buf->prepared = true; |
| 550 | |
| 551 | vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size); |
| 552 | |
| 553 | dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n", |
| 554 | vb->index, &buf->paddr, buf->size); |
| 555 | } |
| 556 | |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | static void dcmi_buf_queue(struct vb2_buffer *vb) |
| 561 | { |
| 562 | struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue); |
| 563 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
| 564 | struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb); |
| 565 | |
| 566 | spin_lock_irq(&dcmi->irqlock); |
| 567 | |
| 568 | /* Enqueue to video buffers list */ |
| 569 | list_add_tail(&buf->list, &dcmi->buffers); |
| 570 | |
| 571 | if (dcmi->state == WAIT_FOR_BUFFER) { |
| 572 | dcmi->state = RUNNING; |
| 573 | dcmi->active = buf; |
| 574 | |
| 575 | dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n", |
| 576 | buf->vb.vb2_buf.index); |
| 577 | |
| 578 | spin_unlock_irq(&dcmi->irqlock); |
| 579 | if (dcmi_start_capture(dcmi, buf)) |
| 580 | dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n", |
| 581 | __func__); |
| 582 | return; |
| 583 | } |
| 584 | |
| 585 | spin_unlock_irq(&dcmi->irqlock); |
| 586 | } |
| 587 | |
| 588 | static struct media_entity *dcmi_find_source(struct stm32_dcmi *dcmi) |
| 589 | { |
| 590 | struct media_entity *entity = &dcmi->vdev->entity; |
| 591 | struct media_pad *pad; |
| 592 | |
| 593 | /* Walk searching for entity having no sink */ |
| 594 | while (1) { |
| 595 | pad = &entity->pads[0]; |
| 596 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) |
| 597 | break; |
| 598 | |
| 599 | pad = media_entity_remote_pad(pad); |
| 600 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
| 601 | break; |
| 602 | |
| 603 | entity = pad->entity; |
| 604 | } |
| 605 | |
| 606 | return entity; |
| 607 | } |
| 608 | |
| 609 | static int dcmi_pipeline_s_fmt(struct stm32_dcmi *dcmi, |
| 610 | struct v4l2_subdev_pad_config *pad_cfg, |
| 611 | struct v4l2_subdev_format *format) |
| 612 | { |
| 613 | struct media_entity *entity = &dcmi->entity.source->entity; |
| 614 | struct v4l2_subdev *subdev; |
| 615 | struct media_pad *sink_pad = NULL; |
| 616 | struct media_pad *src_pad = NULL; |
| 617 | struct media_pad *pad = NULL; |
| 618 | struct v4l2_subdev_format fmt = *format; |
| 619 | bool found = false; |
| 620 | int ret; |
| 621 | |
| 622 | /* |
| 623 | * Starting from sensor subdevice, walk within |
| 624 | * pipeline and set format on each subdevice |
| 625 | */ |
| 626 | while (1) { |
| 627 | unsigned int i; |
| 628 | |
| 629 | /* Search if current entity has a source pad */ |
| 630 | for (i = 0; i < entity->num_pads; i++) { |
| 631 | pad = &entity->pads[i]; |
| 632 | if (pad->flags & MEDIA_PAD_FL_SOURCE) { |
| 633 | src_pad = pad; |
| 634 | found = true; |
| 635 | break; |
| 636 | } |
| 637 | } |
| 638 | if (!found) |
| 639 | break; |
| 640 | |
| 641 | subdev = media_entity_to_v4l2_subdev(entity); |
| 642 | |
| 643 | /* Propagate format on sink pad if any, otherwise source pad */ |
| 644 | if (sink_pad) |
| 645 | pad = sink_pad; |
| 646 | |
| 647 | dev_dbg(dcmi->dev, "\"%s\":%d pad format set to 0x%x %ux%u\n", |
| 648 | subdev->name, pad->index, format->format.code, |
| 649 | format->format.width, format->format.height); |
| 650 | |
| 651 | fmt.pad = pad->index; |
| 652 | ret = v4l2_subdev_call(subdev, pad, set_fmt, pad_cfg, &fmt); |
| 653 | if (ret < 0) { |
| 654 | dev_err(dcmi->dev, "%s: Failed to set format 0x%x %ux%u on \"%s\":%d pad (%d)\n", |
| 655 | __func__, format->format.code, |
| 656 | format->format.width, format->format.height, |
| 657 | subdev->name, pad->index, ret); |
| 658 | return ret; |
| 659 | } |
| 660 | |
| 661 | if (fmt.format.code != format->format.code || |
| 662 | fmt.format.width != format->format.width || |
| 663 | fmt.format.height != format->format.height) { |
| 664 | dev_dbg(dcmi->dev, "\"%s\":%d pad format has been changed to 0x%x %ux%u\n", |
| 665 | subdev->name, pad->index, fmt.format.code, |
| 666 | fmt.format.width, fmt.format.height); |
| 667 | } |
| 668 | |
| 669 | /* Walk to next entity */ |
| 670 | sink_pad = media_entity_remote_pad(src_pad); |
| 671 | if (!sink_pad || !is_media_entity_v4l2_subdev(sink_pad->entity)) |
| 672 | break; |
| 673 | |
| 674 | entity = sink_pad->entity; |
| 675 | } |
| 676 | *format = fmt; |
| 677 | |
| 678 | return 0; |
| 679 | } |
| 680 | |
| 681 | static int dcmi_pipeline_s_stream(struct stm32_dcmi *dcmi, int state) |
| 682 | { |
| 683 | struct media_entity *entity = &dcmi->vdev->entity; |
| 684 | struct v4l2_subdev *subdev; |
| 685 | struct media_pad *pad; |
| 686 | int ret; |
| 687 | |
| 688 | /* Start/stop all entities within pipeline */ |
| 689 | while (1) { |
| 690 | pad = &entity->pads[0]; |
| 691 | if (!(pad->flags & MEDIA_PAD_FL_SINK)) |
| 692 | break; |
| 693 | |
| 694 | pad = media_entity_remote_pad(pad); |
| 695 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
| 696 | break; |
| 697 | |
| 698 | entity = pad->entity; |
| 699 | subdev = media_entity_to_v4l2_subdev(entity); |
| 700 | |
| 701 | ret = v4l2_subdev_call(subdev, video, s_stream, state); |
| 702 | if (ret < 0 && ret != -ENOIOCTLCMD) { |
| 703 | dev_err(dcmi->dev, "%s: \"%s\" failed to %s streaming (%d)\n", |
| 704 | __func__, subdev->name, |
| 705 | state ? "start" : "stop", ret); |
| 706 | return ret; |
| 707 | } |
| 708 | |
| 709 | dev_dbg(dcmi->dev, "\"%s\" is %s\n", |
| 710 | subdev->name, state ? "started" : "stopped"); |
| 711 | } |
| 712 | |
| 713 | return 0; |
| 714 | } |
| 715 | |
| 716 | static int dcmi_pipeline_start(struct stm32_dcmi *dcmi) |
| 717 | { |
| 718 | return dcmi_pipeline_s_stream(dcmi, 1); |
| 719 | } |
| 720 | |
| 721 | static void dcmi_pipeline_stop(struct stm32_dcmi *dcmi) |
| 722 | { |
| 723 | dcmi_pipeline_s_stream(dcmi, 0); |
| 724 | } |
| 725 | |
| 726 | static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count) |
| 727 | { |
| 728 | struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq); |
| 729 | struct dcmi_buf *buf, *node; |
| 730 | u32 val = 0; |
| 731 | int ret; |
| 732 | |
| 733 | ret = pm_runtime_get_sync(dcmi->dev); |
| 734 | if (ret < 0) { |
| 735 | dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n", |
| 736 | __func__, ret); |
| 737 | goto err_pm_put; |
| 738 | } |
| 739 | |
| 740 | ret = media_pipeline_start(&dcmi->vdev->entity, &dcmi->pipeline); |
| 741 | if (ret < 0) { |
| 742 | dev_err(dcmi->dev, "%s: Failed to start streaming, media pipeline start error (%d)\n", |
| 743 | __func__, ret); |
| 744 | goto err_pm_put; |
| 745 | } |
| 746 | |
| 747 | ret = dcmi_pipeline_start(dcmi); |
| 748 | if (ret) |
| 749 | goto err_media_pipeline_stop; |
| 750 | |
| 751 | spin_lock_irq(&dcmi->irqlock); |
| 752 | |
| 753 | /* Set bus width */ |
| 754 | switch (dcmi->bus.bus_width) { |
| 755 | case 14: |
| 756 | val |= CR_EDM_0 | CR_EDM_1; |
| 757 | break; |
| 758 | case 12: |
| 759 | val |= CR_EDM_1; |
| 760 | break; |
| 761 | case 10: |
| 762 | val |= CR_EDM_0; |
| 763 | break; |
| 764 | default: |
| 765 | /* Set bus width to 8 bits by default */ |
| 766 | break; |
| 767 | } |
| 768 | |
| 769 | /* Set vertical synchronization polarity */ |
| 770 | if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) |
| 771 | val |= CR_VSPOL; |
| 772 | |
| 773 | /* Set horizontal synchronization polarity */ |
| 774 | if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) |
| 775 | val |= CR_HSPOL; |
| 776 | |
| 777 | /* Set pixel clock polarity */ |
| 778 | if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) |
| 779 | val |= CR_PCKPOL; |
| 780 | |
| 781 | reg_write(dcmi->regs, DCMI_CR, val); |
| 782 | |
| 783 | /* Set crop */ |
| 784 | if (dcmi->do_crop) |
| 785 | dcmi_set_crop(dcmi); |
| 786 | |
| 787 | /* Enable jpeg capture */ |
| 788 | if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG) |
| 789 | reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */ |
| 790 | |
| 791 | /* Enable dcmi */ |
| 792 | reg_set(dcmi->regs, DCMI_CR, CR_ENABLE); |
| 793 | |
| 794 | dcmi->sequence = 0; |
| 795 | dcmi->errors_count = 0; |
| 796 | dcmi->overrun_count = 0; |
| 797 | dcmi->buffers_count = 0; |
| 798 | |
| 799 | /* |
| 800 | * Start transfer if at least one buffer has been queued, |
| 801 | * otherwise transfer is deferred at buffer queueing |
| 802 | */ |
| 803 | if (list_empty(&dcmi->buffers)) { |
| 804 | dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n"); |
| 805 | dcmi->state = WAIT_FOR_BUFFER; |
| 806 | spin_unlock_irq(&dcmi->irqlock); |
| 807 | return 0; |
| 808 | } |
| 809 | |
| 810 | buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list); |
| 811 | dcmi->active = buf; |
| 812 | |
| 813 | dcmi->state = RUNNING; |
| 814 | |
| 815 | dev_dbg(dcmi->dev, "Start streaming, starting capture\n"); |
| 816 | |
| 817 | spin_unlock_irq(&dcmi->irqlock); |
| 818 | ret = dcmi_start_capture(dcmi, buf); |
| 819 | if (ret) { |
| 820 | dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n", |
| 821 | __func__); |
| 822 | goto err_pipeline_stop; |
| 823 | } |
| 824 | |
| 825 | /* Enable interruptions */ |
| 826 | if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG) |
| 827 | reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR); |
| 828 | else |
| 829 | reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR); |
| 830 | |
| 831 | return 0; |
| 832 | |
| 833 | err_pipeline_stop: |
| 834 | dcmi_pipeline_stop(dcmi); |
| 835 | |
| 836 | err_media_pipeline_stop: |
| 837 | media_pipeline_stop(&dcmi->vdev->entity); |
| 838 | |
| 839 | err_pm_put: |
| 840 | pm_runtime_put(dcmi->dev); |
| 841 | spin_lock_irq(&dcmi->irqlock); |
| 842 | /* |
| 843 | * Return all buffers to vb2 in QUEUED state. |
| 844 | * This will give ownership back to userspace |
| 845 | */ |
| 846 | list_for_each_entry_safe(buf, node, &dcmi->buffers, list) { |
| 847 | list_del_init(&buf->list); |
| 848 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED); |
| 849 | } |
| 850 | dcmi->active = NULL; |
| 851 | spin_unlock_irq(&dcmi->irqlock); |
| 852 | |
| 853 | return ret; |
| 854 | } |
| 855 | |
| 856 | static void dcmi_stop_streaming(struct vb2_queue *vq) |
| 857 | { |
| 858 | struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq); |
| 859 | struct dcmi_buf *buf, *node; |
| 860 | |
| 861 | dcmi_pipeline_stop(dcmi); |
| 862 | |
| 863 | media_pipeline_stop(&dcmi->vdev->entity); |
| 864 | |
| 865 | spin_lock_irq(&dcmi->irqlock); |
| 866 | |
| 867 | /* Disable interruptions */ |
| 868 | reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR); |
| 869 | |
| 870 | /* Disable DCMI */ |
| 871 | reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE); |
| 872 | |
| 873 | /* Return all queued buffers to vb2 in ERROR state */ |
| 874 | list_for_each_entry_safe(buf, node, &dcmi->buffers, list) { |
| 875 | list_del_init(&buf->list); |
| 876 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
| 877 | } |
| 878 | |
| 879 | dcmi->active = NULL; |
| 880 | dcmi->state = STOPPED; |
| 881 | |
| 882 | spin_unlock_irq(&dcmi->irqlock); |
| 883 | |
| 884 | /* Stop all pending DMA operations */ |
| 885 | mutex_lock(&dcmi->dma_lock); |
| 886 | dmaengine_terminate_all(dcmi->dma_chan); |
| 887 | mutex_unlock(&dcmi->dma_lock); |
| 888 | |
| 889 | pm_runtime_put(dcmi->dev); |
| 890 | |
| 891 | if (dcmi->errors_count) |
| 892 | dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n", |
| 893 | dcmi->errors_count, dcmi->overrun_count, |
| 894 | dcmi->buffers_count); |
| 895 | dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n", |
| 896 | dcmi->errors_count, dcmi->overrun_count, |
| 897 | dcmi->buffers_count); |
| 898 | } |
| 899 | |
| 900 | static const struct vb2_ops dcmi_video_qops = { |
| 901 | .queue_setup = dcmi_queue_setup, |
| 902 | .buf_init = dcmi_buf_init, |
| 903 | .buf_prepare = dcmi_buf_prepare, |
| 904 | .buf_queue = dcmi_buf_queue, |
| 905 | .start_streaming = dcmi_start_streaming, |
| 906 | .stop_streaming = dcmi_stop_streaming, |
| 907 | .wait_prepare = vb2_ops_wait_prepare, |
| 908 | .wait_finish = vb2_ops_wait_finish, |
| 909 | }; |
| 910 | |
| 911 | static int dcmi_g_fmt_vid_cap(struct file *file, void *priv, |
| 912 | struct v4l2_format *fmt) |
| 913 | { |
| 914 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 915 | |
| 916 | *fmt = dcmi->fmt; |
| 917 | |
| 918 | return 0; |
| 919 | } |
| 920 | |
| 921 | static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi, |
| 922 | unsigned int fourcc) |
| 923 | { |
| 924 | unsigned int num_formats = dcmi->num_of_sd_formats; |
| 925 | const struct dcmi_format *fmt; |
| 926 | unsigned int i; |
| 927 | |
| 928 | for (i = 0; i < num_formats; i++) { |
| 929 | fmt = dcmi->sd_formats[i]; |
| 930 | if (fmt->fourcc == fourcc) |
| 931 | return fmt; |
| 932 | } |
| 933 | |
| 934 | return NULL; |
| 935 | } |
| 936 | |
| 937 | static void __find_outer_frame_size(struct stm32_dcmi *dcmi, |
| 938 | struct v4l2_pix_format *pix, |
| 939 | struct dcmi_framesize *framesize) |
| 940 | { |
| 941 | struct dcmi_framesize *match = NULL; |
| 942 | unsigned int i; |
| 943 | unsigned int min_err = UINT_MAX; |
| 944 | |
| 945 | for (i = 0; i < dcmi->num_of_sd_framesizes; i++) { |
| 946 | struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i]; |
| 947 | int w_err = (fsize->width - pix->width); |
| 948 | int h_err = (fsize->height - pix->height); |
| 949 | int err = w_err + h_err; |
| 950 | |
| 951 | if (w_err >= 0 && h_err >= 0 && err < min_err) { |
| 952 | min_err = err; |
| 953 | match = fsize; |
| 954 | } |
| 955 | } |
| 956 | if (!match) |
| 957 | match = &dcmi->sd_framesizes[0]; |
| 958 | |
| 959 | *framesize = *match; |
| 960 | } |
| 961 | |
| 962 | static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f, |
| 963 | const struct dcmi_format **sd_format, |
| 964 | struct dcmi_framesize *sd_framesize) |
| 965 | { |
| 966 | const struct dcmi_format *sd_fmt; |
| 967 | struct dcmi_framesize sd_fsize; |
| 968 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 969 | struct v4l2_subdev_pad_config pad_cfg; |
| 970 | struct v4l2_subdev_format format = { |
| 971 | .which = V4L2_SUBDEV_FORMAT_TRY, |
| 972 | }; |
| 973 | bool do_crop; |
| 974 | int ret; |
| 975 | |
| 976 | sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat); |
| 977 | if (!sd_fmt) { |
| 978 | if (!dcmi->num_of_sd_formats) |
| 979 | return -ENODATA; |
| 980 | |
| 981 | sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1]; |
| 982 | pix->pixelformat = sd_fmt->fourcc; |
| 983 | } |
| 984 | |
| 985 | /* Limit to hardware capabilities */ |
| 986 | pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH); |
| 987 | pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT); |
| 988 | |
| 989 | /* No crop if JPEG is requested */ |
| 990 | do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG); |
| 991 | |
| 992 | if (do_crop && dcmi->num_of_sd_framesizes) { |
| 993 | struct dcmi_framesize outer_sd_fsize; |
| 994 | /* |
| 995 | * If crop is requested and sensor have discrete frame sizes, |
| 996 | * select the frame size that is just larger than request |
| 997 | */ |
| 998 | __find_outer_frame_size(dcmi, pix, &outer_sd_fsize); |
| 999 | pix->width = outer_sd_fsize.width; |
| 1000 | pix->height = outer_sd_fsize.height; |
| 1001 | } |
| 1002 | |
| 1003 | v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code); |
| 1004 | ret = v4l2_subdev_call(dcmi->entity.source, pad, set_fmt, |
| 1005 | &pad_cfg, &format); |
| 1006 | if (ret < 0) |
| 1007 | return ret; |
| 1008 | |
| 1009 | /* Update pix regarding to what sensor can do */ |
| 1010 | v4l2_fill_pix_format(pix, &format.format); |
| 1011 | |
| 1012 | /* Save resolution that sensor can actually do */ |
| 1013 | sd_fsize.width = pix->width; |
| 1014 | sd_fsize.height = pix->height; |
| 1015 | |
| 1016 | if (do_crop) { |
| 1017 | struct v4l2_rect c = dcmi->crop; |
| 1018 | struct v4l2_rect max_rect; |
| 1019 | |
| 1020 | /* |
| 1021 | * Adjust crop by making the intersection between |
| 1022 | * format resolution request and crop request |
| 1023 | */ |
| 1024 | max_rect.top = 0; |
| 1025 | max_rect.left = 0; |
| 1026 | max_rect.width = pix->width; |
| 1027 | max_rect.height = pix->height; |
| 1028 | v4l2_rect_map_inside(&c, &max_rect); |
| 1029 | c.top = clamp_t(s32, c.top, 0, pix->height - c.height); |
| 1030 | c.left = clamp_t(s32, c.left, 0, pix->width - c.width); |
| 1031 | dcmi->crop = c; |
| 1032 | |
| 1033 | /* Adjust format resolution request to crop */ |
| 1034 | pix->width = dcmi->crop.width; |
| 1035 | pix->height = dcmi->crop.height; |
| 1036 | } |
| 1037 | |
| 1038 | pix->field = V4L2_FIELD_NONE; |
| 1039 | pix->bytesperline = pix->width * sd_fmt->bpp; |
| 1040 | pix->sizeimage = pix->bytesperline * pix->height; |
| 1041 | |
| 1042 | if (sd_format) |
| 1043 | *sd_format = sd_fmt; |
| 1044 | if (sd_framesize) |
| 1045 | *sd_framesize = sd_fsize; |
| 1046 | |
| 1047 | return 0; |
| 1048 | } |
| 1049 | |
| 1050 | static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f) |
| 1051 | { |
| 1052 | struct v4l2_subdev_format format = { |
| 1053 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1054 | }; |
| 1055 | const struct dcmi_format *sd_format; |
| 1056 | struct dcmi_framesize sd_framesize; |
| 1057 | struct v4l2_mbus_framefmt *mf = &format.format; |
| 1058 | struct v4l2_pix_format *pix = &f->fmt.pix; |
| 1059 | int ret; |
| 1060 | |
| 1061 | /* |
| 1062 | * Try format, fmt.width/height could have been changed |
| 1063 | * to match sensor capability or crop request |
| 1064 | * sd_format & sd_framesize will contain what subdev |
| 1065 | * can do for this request. |
| 1066 | */ |
| 1067 | ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize); |
| 1068 | if (ret) |
| 1069 | return ret; |
| 1070 | |
| 1071 | /* Disable crop if JPEG is requested */ |
| 1072 | if (pix->pixelformat == V4L2_PIX_FMT_JPEG) |
| 1073 | dcmi->do_crop = false; |
| 1074 | |
| 1075 | /* pix to mbus format */ |
| 1076 | v4l2_fill_mbus_format(mf, pix, |
| 1077 | sd_format->mbus_code); |
| 1078 | mf->width = sd_framesize.width; |
| 1079 | mf->height = sd_framesize.height; |
| 1080 | |
| 1081 | ret = dcmi_pipeline_s_fmt(dcmi, NULL, &format); |
| 1082 | if (ret < 0) |
| 1083 | return ret; |
| 1084 | |
| 1085 | dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n", |
| 1086 | mf->code, mf->width, mf->height); |
| 1087 | dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n", |
| 1088 | (char *)&pix->pixelformat, |
| 1089 | pix->width, pix->height); |
| 1090 | |
| 1091 | dcmi->fmt = *f; |
| 1092 | dcmi->sd_format = sd_format; |
| 1093 | dcmi->sd_framesize = sd_framesize; |
| 1094 | |
| 1095 | return 0; |
| 1096 | } |
| 1097 | |
| 1098 | static int dcmi_s_fmt_vid_cap(struct file *file, void *priv, |
| 1099 | struct v4l2_format *f) |
| 1100 | { |
| 1101 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1102 | |
| 1103 | if (vb2_is_streaming(&dcmi->queue)) |
| 1104 | return -EBUSY; |
| 1105 | |
| 1106 | return dcmi_set_fmt(dcmi, f); |
| 1107 | } |
| 1108 | |
| 1109 | static int dcmi_try_fmt_vid_cap(struct file *file, void *priv, |
| 1110 | struct v4l2_format *f) |
| 1111 | { |
| 1112 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1113 | |
| 1114 | return dcmi_try_fmt(dcmi, f, NULL, NULL); |
| 1115 | } |
| 1116 | |
| 1117 | static int dcmi_enum_fmt_vid_cap(struct file *file, void *priv, |
| 1118 | struct v4l2_fmtdesc *f) |
| 1119 | { |
| 1120 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1121 | |
| 1122 | if (f->index >= dcmi->num_of_sd_formats) |
| 1123 | return -EINVAL; |
| 1124 | |
| 1125 | f->pixelformat = dcmi->sd_formats[f->index]->fourcc; |
| 1126 | return 0; |
| 1127 | } |
| 1128 | |
| 1129 | static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi, |
| 1130 | struct v4l2_pix_format *pix) |
| 1131 | { |
| 1132 | struct v4l2_subdev_format fmt = { |
| 1133 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1134 | }; |
| 1135 | int ret; |
| 1136 | |
| 1137 | ret = v4l2_subdev_call(dcmi->entity.source, pad, get_fmt, NULL, &fmt); |
| 1138 | if (ret) |
| 1139 | return ret; |
| 1140 | |
| 1141 | v4l2_fill_pix_format(pix, &fmt.format); |
| 1142 | |
| 1143 | return 0; |
| 1144 | } |
| 1145 | |
| 1146 | static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi, |
| 1147 | struct v4l2_pix_format *pix) |
| 1148 | { |
| 1149 | const struct dcmi_format *sd_fmt; |
| 1150 | struct v4l2_subdev_format format = { |
| 1151 | .which = V4L2_SUBDEV_FORMAT_TRY, |
| 1152 | }; |
| 1153 | struct v4l2_subdev_pad_config pad_cfg; |
| 1154 | int ret; |
| 1155 | |
| 1156 | sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat); |
| 1157 | if (!sd_fmt) { |
| 1158 | if (!dcmi->num_of_sd_formats) |
| 1159 | return -ENODATA; |
| 1160 | |
| 1161 | sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1]; |
| 1162 | pix->pixelformat = sd_fmt->fourcc; |
| 1163 | } |
| 1164 | |
| 1165 | v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code); |
| 1166 | ret = v4l2_subdev_call(dcmi->entity.source, pad, set_fmt, |
| 1167 | &pad_cfg, &format); |
| 1168 | if (ret < 0) |
| 1169 | return ret; |
| 1170 | |
| 1171 | return 0; |
| 1172 | } |
| 1173 | |
| 1174 | static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi, |
| 1175 | struct v4l2_rect *r) |
| 1176 | { |
| 1177 | struct v4l2_subdev_selection bounds = { |
| 1178 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1179 | .target = V4L2_SEL_TGT_CROP_BOUNDS, |
| 1180 | }; |
| 1181 | unsigned int max_width, max_height, max_pixsize; |
| 1182 | struct v4l2_pix_format pix; |
| 1183 | unsigned int i; |
| 1184 | int ret; |
| 1185 | |
| 1186 | /* |
| 1187 | * Get sensor bounds first |
| 1188 | */ |
| 1189 | ret = v4l2_subdev_call(dcmi->entity.source, pad, get_selection, |
| 1190 | NULL, &bounds); |
| 1191 | if (!ret) |
| 1192 | *r = bounds.r; |
| 1193 | if (ret != -ENOIOCTLCMD) |
| 1194 | return ret; |
| 1195 | |
| 1196 | /* |
| 1197 | * If selection is not implemented, |
| 1198 | * fallback by enumerating sensor frame sizes |
| 1199 | * and take the largest one |
| 1200 | */ |
| 1201 | max_width = 0; |
| 1202 | max_height = 0; |
| 1203 | max_pixsize = 0; |
| 1204 | for (i = 0; i < dcmi->num_of_sd_framesizes; i++) { |
| 1205 | struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i]; |
| 1206 | unsigned int pixsize = fsize->width * fsize->height; |
| 1207 | |
| 1208 | if (pixsize > max_pixsize) { |
| 1209 | max_pixsize = pixsize; |
| 1210 | max_width = fsize->width; |
| 1211 | max_height = fsize->height; |
| 1212 | } |
| 1213 | } |
| 1214 | if (max_pixsize > 0) { |
| 1215 | r->top = 0; |
| 1216 | r->left = 0; |
| 1217 | r->width = max_width; |
| 1218 | r->height = max_height; |
| 1219 | return 0; |
| 1220 | } |
| 1221 | |
| 1222 | /* |
| 1223 | * If frame sizes enumeration is not implemented, |
| 1224 | * fallback by getting current sensor frame size |
| 1225 | */ |
| 1226 | ret = dcmi_get_sensor_format(dcmi, &pix); |
| 1227 | if (ret) |
| 1228 | return ret; |
| 1229 | |
| 1230 | r->top = 0; |
| 1231 | r->left = 0; |
| 1232 | r->width = pix.width; |
| 1233 | r->height = pix.height; |
| 1234 | |
| 1235 | return 0; |
| 1236 | } |
| 1237 | |
| 1238 | static int dcmi_g_selection(struct file *file, void *fh, |
| 1239 | struct v4l2_selection *s) |
| 1240 | { |
| 1241 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1242 | |
| 1243 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) |
| 1244 | return -EINVAL; |
| 1245 | |
| 1246 | switch (s->target) { |
| 1247 | case V4L2_SEL_TGT_CROP_DEFAULT: |
| 1248 | case V4L2_SEL_TGT_CROP_BOUNDS: |
| 1249 | s->r = dcmi->sd_bounds; |
| 1250 | return 0; |
| 1251 | case V4L2_SEL_TGT_CROP: |
| 1252 | if (dcmi->do_crop) { |
| 1253 | s->r = dcmi->crop; |
| 1254 | } else { |
| 1255 | s->r.top = 0; |
| 1256 | s->r.left = 0; |
| 1257 | s->r.width = dcmi->fmt.fmt.pix.width; |
| 1258 | s->r.height = dcmi->fmt.fmt.pix.height; |
| 1259 | } |
| 1260 | break; |
| 1261 | default: |
| 1262 | return -EINVAL; |
| 1263 | } |
| 1264 | |
| 1265 | return 0; |
| 1266 | } |
| 1267 | |
| 1268 | static int dcmi_s_selection(struct file *file, void *priv, |
| 1269 | struct v4l2_selection *s) |
| 1270 | { |
| 1271 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1272 | struct v4l2_rect r = s->r; |
| 1273 | struct v4l2_rect max_rect; |
| 1274 | struct v4l2_pix_format pix; |
| 1275 | |
| 1276 | if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || |
| 1277 | s->target != V4L2_SEL_TGT_CROP) |
| 1278 | return -EINVAL; |
| 1279 | |
| 1280 | /* Reset sensor resolution to max resolution */ |
| 1281 | pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat; |
| 1282 | pix.width = dcmi->sd_bounds.width; |
| 1283 | pix.height = dcmi->sd_bounds.height; |
| 1284 | dcmi_set_sensor_format(dcmi, &pix); |
| 1285 | |
| 1286 | /* |
| 1287 | * Make the intersection between |
| 1288 | * sensor resolution |
| 1289 | * and crop request |
| 1290 | */ |
| 1291 | max_rect.top = 0; |
| 1292 | max_rect.left = 0; |
| 1293 | max_rect.width = pix.width; |
| 1294 | max_rect.height = pix.height; |
| 1295 | v4l2_rect_map_inside(&r, &max_rect); |
| 1296 | r.top = clamp_t(s32, r.top, 0, pix.height - r.height); |
| 1297 | r.left = clamp_t(s32, r.left, 0, pix.width - r.width); |
| 1298 | |
| 1299 | if (!(r.top == dcmi->sd_bounds.top && |
| 1300 | r.left == dcmi->sd_bounds.left && |
| 1301 | r.width == dcmi->sd_bounds.width && |
| 1302 | r.height == dcmi->sd_bounds.height)) { |
| 1303 | /* Crop if request is different than sensor resolution */ |
| 1304 | dcmi->do_crop = true; |
| 1305 | dcmi->crop = r; |
| 1306 | dev_dbg(dcmi->dev, "s_selection: crop %ux%u@(%u,%u) from %ux%u\n", |
| 1307 | r.width, r.height, r.left, r.top, |
| 1308 | pix.width, pix.height); |
| 1309 | } else { |
| 1310 | /* Disable crop */ |
| 1311 | dcmi->do_crop = false; |
| 1312 | dev_dbg(dcmi->dev, "s_selection: crop is disabled\n"); |
| 1313 | } |
| 1314 | |
| 1315 | s->r = r; |
| 1316 | return 0; |
| 1317 | } |
| 1318 | |
| 1319 | static int dcmi_querycap(struct file *file, void *priv, |
| 1320 | struct v4l2_capability *cap) |
| 1321 | { |
| 1322 | strscpy(cap->driver, DRV_NAME, sizeof(cap->driver)); |
| 1323 | strscpy(cap->card, "STM32 Camera Memory Interface", |
| 1324 | sizeof(cap->card)); |
| 1325 | strscpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info)); |
| 1326 | return 0; |
| 1327 | } |
| 1328 | |
| 1329 | static int dcmi_enum_input(struct file *file, void *priv, |
| 1330 | struct v4l2_input *i) |
| 1331 | { |
| 1332 | if (i->index != 0) |
| 1333 | return -EINVAL; |
| 1334 | |
| 1335 | i->type = V4L2_INPUT_TYPE_CAMERA; |
| 1336 | strscpy(i->name, "Camera", sizeof(i->name)); |
| 1337 | return 0; |
| 1338 | } |
| 1339 | |
| 1340 | static int dcmi_g_input(struct file *file, void *priv, unsigned int *i) |
| 1341 | { |
| 1342 | *i = 0; |
| 1343 | return 0; |
| 1344 | } |
| 1345 | |
| 1346 | static int dcmi_s_input(struct file *file, void *priv, unsigned int i) |
| 1347 | { |
| 1348 | if (i > 0) |
| 1349 | return -EINVAL; |
| 1350 | return 0; |
| 1351 | } |
| 1352 | |
| 1353 | static int dcmi_enum_framesizes(struct file *file, void *fh, |
| 1354 | struct v4l2_frmsizeenum *fsize) |
| 1355 | { |
| 1356 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1357 | const struct dcmi_format *sd_fmt; |
| 1358 | struct v4l2_subdev_frame_size_enum fse = { |
| 1359 | .index = fsize->index, |
| 1360 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1361 | }; |
| 1362 | int ret; |
| 1363 | |
| 1364 | sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format); |
| 1365 | if (!sd_fmt) |
| 1366 | return -EINVAL; |
| 1367 | |
| 1368 | fse.code = sd_fmt->mbus_code; |
| 1369 | |
| 1370 | ret = v4l2_subdev_call(dcmi->entity.source, pad, enum_frame_size, |
| 1371 | NULL, &fse); |
| 1372 | if (ret) |
| 1373 | return ret; |
| 1374 | |
| 1375 | fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; |
| 1376 | fsize->discrete.width = fse.max_width; |
| 1377 | fsize->discrete.height = fse.max_height; |
| 1378 | |
| 1379 | return 0; |
| 1380 | } |
| 1381 | |
| 1382 | static int dcmi_g_parm(struct file *file, void *priv, |
| 1383 | struct v4l2_streamparm *p) |
| 1384 | { |
| 1385 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1386 | |
| 1387 | return v4l2_g_parm_cap(video_devdata(file), dcmi->entity.source, p); |
| 1388 | } |
| 1389 | |
| 1390 | static int dcmi_s_parm(struct file *file, void *priv, |
| 1391 | struct v4l2_streamparm *p) |
| 1392 | { |
| 1393 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1394 | |
| 1395 | return v4l2_s_parm_cap(video_devdata(file), dcmi->entity.source, p); |
| 1396 | } |
| 1397 | |
| 1398 | static int dcmi_enum_frameintervals(struct file *file, void *fh, |
| 1399 | struct v4l2_frmivalenum *fival) |
| 1400 | { |
| 1401 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1402 | const struct dcmi_format *sd_fmt; |
| 1403 | struct v4l2_subdev_frame_interval_enum fie = { |
| 1404 | .index = fival->index, |
| 1405 | .width = fival->width, |
| 1406 | .height = fival->height, |
| 1407 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1408 | }; |
| 1409 | int ret; |
| 1410 | |
| 1411 | sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format); |
| 1412 | if (!sd_fmt) |
| 1413 | return -EINVAL; |
| 1414 | |
| 1415 | fie.code = sd_fmt->mbus_code; |
| 1416 | |
| 1417 | ret = v4l2_subdev_call(dcmi->entity.source, pad, |
| 1418 | enum_frame_interval, NULL, &fie); |
| 1419 | if (ret) |
| 1420 | return ret; |
| 1421 | |
| 1422 | fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; |
| 1423 | fival->discrete = fie.interval; |
| 1424 | |
| 1425 | return 0; |
| 1426 | } |
| 1427 | |
| 1428 | static const struct of_device_id stm32_dcmi_of_match[] = { |
| 1429 | { .compatible = "st,stm32-dcmi"}, |
| 1430 | { /* end node */ }, |
| 1431 | }; |
| 1432 | MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match); |
| 1433 | |
| 1434 | static int dcmi_open(struct file *file) |
| 1435 | { |
| 1436 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1437 | struct v4l2_subdev *sd = dcmi->entity.source; |
| 1438 | int ret; |
| 1439 | |
| 1440 | if (mutex_lock_interruptible(&dcmi->lock)) |
| 1441 | return -ERESTARTSYS; |
| 1442 | |
| 1443 | ret = v4l2_fh_open(file); |
| 1444 | if (ret < 0) |
| 1445 | goto unlock; |
| 1446 | |
| 1447 | if (!v4l2_fh_is_singular_file(file)) |
| 1448 | goto fh_rel; |
| 1449 | |
| 1450 | ret = v4l2_subdev_call(sd, core, s_power, 1); |
| 1451 | if (ret < 0 && ret != -ENOIOCTLCMD) |
| 1452 | goto fh_rel; |
| 1453 | |
| 1454 | ret = dcmi_set_fmt(dcmi, &dcmi->fmt); |
| 1455 | if (ret) |
| 1456 | v4l2_subdev_call(sd, core, s_power, 0); |
| 1457 | fh_rel: |
| 1458 | if (ret) |
| 1459 | v4l2_fh_release(file); |
| 1460 | unlock: |
| 1461 | mutex_unlock(&dcmi->lock); |
| 1462 | return ret; |
| 1463 | } |
| 1464 | |
| 1465 | static int dcmi_release(struct file *file) |
| 1466 | { |
| 1467 | struct stm32_dcmi *dcmi = video_drvdata(file); |
| 1468 | struct v4l2_subdev *sd = dcmi->entity.source; |
| 1469 | bool fh_singular; |
| 1470 | int ret; |
| 1471 | |
| 1472 | mutex_lock(&dcmi->lock); |
| 1473 | |
| 1474 | fh_singular = v4l2_fh_is_singular_file(file); |
| 1475 | |
| 1476 | ret = _vb2_fop_release(file, NULL); |
| 1477 | |
| 1478 | if (fh_singular) |
| 1479 | v4l2_subdev_call(sd, core, s_power, 0); |
| 1480 | |
| 1481 | mutex_unlock(&dcmi->lock); |
| 1482 | |
| 1483 | return ret; |
| 1484 | } |
| 1485 | |
| 1486 | static const struct v4l2_ioctl_ops dcmi_ioctl_ops = { |
| 1487 | .vidioc_querycap = dcmi_querycap, |
| 1488 | |
| 1489 | .vidioc_try_fmt_vid_cap = dcmi_try_fmt_vid_cap, |
| 1490 | .vidioc_g_fmt_vid_cap = dcmi_g_fmt_vid_cap, |
| 1491 | .vidioc_s_fmt_vid_cap = dcmi_s_fmt_vid_cap, |
| 1492 | .vidioc_enum_fmt_vid_cap = dcmi_enum_fmt_vid_cap, |
| 1493 | .vidioc_g_selection = dcmi_g_selection, |
| 1494 | .vidioc_s_selection = dcmi_s_selection, |
| 1495 | |
| 1496 | .vidioc_enum_input = dcmi_enum_input, |
| 1497 | .vidioc_g_input = dcmi_g_input, |
| 1498 | .vidioc_s_input = dcmi_s_input, |
| 1499 | |
| 1500 | .vidioc_g_parm = dcmi_g_parm, |
| 1501 | .vidioc_s_parm = dcmi_s_parm, |
| 1502 | |
| 1503 | .vidioc_enum_framesizes = dcmi_enum_framesizes, |
| 1504 | .vidioc_enum_frameintervals = dcmi_enum_frameintervals, |
| 1505 | |
| 1506 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
| 1507 | .vidioc_create_bufs = vb2_ioctl_create_bufs, |
| 1508 | .vidioc_querybuf = vb2_ioctl_querybuf, |
| 1509 | .vidioc_qbuf = vb2_ioctl_qbuf, |
| 1510 | .vidioc_dqbuf = vb2_ioctl_dqbuf, |
| 1511 | .vidioc_expbuf = vb2_ioctl_expbuf, |
| 1512 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, |
| 1513 | .vidioc_streamon = vb2_ioctl_streamon, |
| 1514 | .vidioc_streamoff = vb2_ioctl_streamoff, |
| 1515 | |
| 1516 | .vidioc_log_status = v4l2_ctrl_log_status, |
| 1517 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, |
| 1518 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, |
| 1519 | }; |
| 1520 | |
| 1521 | static const struct v4l2_file_operations dcmi_fops = { |
| 1522 | .owner = THIS_MODULE, |
| 1523 | .unlocked_ioctl = video_ioctl2, |
| 1524 | .open = dcmi_open, |
| 1525 | .release = dcmi_release, |
| 1526 | .poll = vb2_fop_poll, |
| 1527 | .mmap = vb2_fop_mmap, |
| 1528 | #ifndef CONFIG_MMU |
| 1529 | .get_unmapped_area = vb2_fop_get_unmapped_area, |
| 1530 | #endif |
| 1531 | .read = vb2_fop_read, |
| 1532 | }; |
| 1533 | |
| 1534 | static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi) |
| 1535 | { |
| 1536 | struct v4l2_format f = { |
| 1537 | .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, |
| 1538 | .fmt.pix = { |
| 1539 | .width = CIF_WIDTH, |
| 1540 | .height = CIF_HEIGHT, |
| 1541 | .field = V4L2_FIELD_NONE, |
| 1542 | .pixelformat = dcmi->sd_formats[0]->fourcc, |
| 1543 | }, |
| 1544 | }; |
| 1545 | int ret; |
| 1546 | |
| 1547 | ret = dcmi_try_fmt(dcmi, &f, NULL, NULL); |
| 1548 | if (ret) |
| 1549 | return ret; |
| 1550 | dcmi->sd_format = dcmi->sd_formats[0]; |
| 1551 | dcmi->fmt = f; |
| 1552 | return 0; |
| 1553 | } |
| 1554 | |
| 1555 | /* |
| 1556 | * FIXME: For the time being we only support subdevices |
| 1557 | * which expose RGB & YUV "parallel form" mbus code (_2X8). |
| 1558 | * Nevertheless, this allows to support serial source subdevices |
| 1559 | * and serial to parallel bridges which conform to this. |
| 1560 | */ |
| 1561 | static const struct dcmi_format dcmi_formats[] = { |
| 1562 | { |
| 1563 | .fourcc = V4L2_PIX_FMT_RGB565, |
| 1564 | .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE, |
| 1565 | .bpp = 2, |
| 1566 | }, { |
| 1567 | .fourcc = V4L2_PIX_FMT_YUYV, |
| 1568 | .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, |
| 1569 | .bpp = 2, |
| 1570 | }, { |
| 1571 | .fourcc = V4L2_PIX_FMT_UYVY, |
| 1572 | .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, |
| 1573 | .bpp = 2, |
| 1574 | }, { |
| 1575 | .fourcc = V4L2_PIX_FMT_JPEG, |
| 1576 | .mbus_code = MEDIA_BUS_FMT_JPEG_1X8, |
| 1577 | .bpp = 1, |
| 1578 | }, |
| 1579 | }; |
| 1580 | |
| 1581 | static int dcmi_formats_init(struct stm32_dcmi *dcmi) |
| 1582 | { |
| 1583 | const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)]; |
| 1584 | unsigned int num_fmts = 0, i, j; |
| 1585 | struct v4l2_subdev *subdev = dcmi->entity.source; |
| 1586 | struct v4l2_subdev_mbus_code_enum mbus_code = { |
| 1587 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1588 | }; |
| 1589 | |
| 1590 | while (!v4l2_subdev_call(subdev, pad, enum_mbus_code, |
| 1591 | NULL, &mbus_code)) { |
| 1592 | for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) { |
| 1593 | if (dcmi_formats[i].mbus_code != mbus_code.code) |
| 1594 | continue; |
| 1595 | |
| 1596 | /* Code supported, have we got this fourcc yet? */ |
| 1597 | for (j = 0; j < num_fmts; j++) |
| 1598 | if (sd_fmts[j]->fourcc == |
| 1599 | dcmi_formats[i].fourcc) { |
| 1600 | /* Already available */ |
| 1601 | dev_dbg(dcmi->dev, "Skipping fourcc/code: %4.4s/0x%x\n", |
| 1602 | (char *)&sd_fmts[j]->fourcc, |
| 1603 | mbus_code.code); |
| 1604 | break; |
| 1605 | } |
| 1606 | if (j == num_fmts) { |
| 1607 | /* New */ |
| 1608 | sd_fmts[num_fmts++] = dcmi_formats + i; |
| 1609 | dev_dbg(dcmi->dev, "Supported fourcc/code: %4.4s/0x%x\n", |
| 1610 | (char *)&sd_fmts[num_fmts - 1]->fourcc, |
| 1611 | sd_fmts[num_fmts - 1]->mbus_code); |
| 1612 | } |
| 1613 | } |
| 1614 | mbus_code.index++; |
| 1615 | } |
| 1616 | |
| 1617 | if (!num_fmts) |
| 1618 | return -ENXIO; |
| 1619 | |
| 1620 | dcmi->num_of_sd_formats = num_fmts; |
| 1621 | dcmi->sd_formats = devm_kcalloc(dcmi->dev, |
| 1622 | num_fmts, sizeof(struct dcmi_format *), |
| 1623 | GFP_KERNEL); |
| 1624 | if (!dcmi->sd_formats) { |
| 1625 | dev_err(dcmi->dev, "Could not allocate memory\n"); |
| 1626 | return -ENOMEM; |
| 1627 | } |
| 1628 | |
| 1629 | memcpy(dcmi->sd_formats, sd_fmts, |
| 1630 | num_fmts * sizeof(struct dcmi_format *)); |
| 1631 | dcmi->sd_format = dcmi->sd_formats[0]; |
| 1632 | |
| 1633 | return 0; |
| 1634 | } |
| 1635 | |
| 1636 | static int dcmi_framesizes_init(struct stm32_dcmi *dcmi) |
| 1637 | { |
| 1638 | unsigned int num_fsize = 0; |
| 1639 | struct v4l2_subdev *subdev = dcmi->entity.source; |
| 1640 | struct v4l2_subdev_frame_size_enum fse = { |
| 1641 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, |
| 1642 | .code = dcmi->sd_format->mbus_code, |
| 1643 | }; |
| 1644 | unsigned int ret; |
| 1645 | unsigned int i; |
| 1646 | |
| 1647 | /* Allocate discrete framesizes array */ |
| 1648 | while (!v4l2_subdev_call(subdev, pad, enum_frame_size, |
| 1649 | NULL, &fse)) |
| 1650 | fse.index++; |
| 1651 | |
| 1652 | num_fsize = fse.index; |
| 1653 | if (!num_fsize) |
| 1654 | return 0; |
| 1655 | |
| 1656 | dcmi->num_of_sd_framesizes = num_fsize; |
| 1657 | dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize, |
| 1658 | sizeof(struct dcmi_framesize), |
| 1659 | GFP_KERNEL); |
| 1660 | if (!dcmi->sd_framesizes) { |
| 1661 | dev_err(dcmi->dev, "Could not allocate memory\n"); |
| 1662 | return -ENOMEM; |
| 1663 | } |
| 1664 | |
| 1665 | /* Fill array with sensor supported framesizes */ |
| 1666 | dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize); |
| 1667 | for (i = 0; i < dcmi->num_of_sd_framesizes; i++) { |
| 1668 | fse.index = i; |
| 1669 | ret = v4l2_subdev_call(subdev, pad, enum_frame_size, |
| 1670 | NULL, &fse); |
| 1671 | if (ret) |
| 1672 | return ret; |
| 1673 | dcmi->sd_framesizes[fse.index].width = fse.max_width; |
| 1674 | dcmi->sd_framesizes[fse.index].height = fse.max_height; |
| 1675 | dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height); |
| 1676 | } |
| 1677 | |
| 1678 | return 0; |
| 1679 | } |
| 1680 | |
| 1681 | static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier) |
| 1682 | { |
| 1683 | struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier); |
| 1684 | int ret; |
| 1685 | |
| 1686 | /* |
| 1687 | * Now that the graph is complete, |
| 1688 | * we search for the source subdevice |
| 1689 | * in order to expose it through V4L2 interface |
| 1690 | */ |
| 1691 | dcmi->entity.source = |
| 1692 | media_entity_to_v4l2_subdev(dcmi_find_source(dcmi)); |
| 1693 | if (!dcmi->entity.source) { |
| 1694 | dev_err(dcmi->dev, "Source subdevice not found\n"); |
| 1695 | return -ENODEV; |
| 1696 | } |
| 1697 | |
| 1698 | dcmi->vdev->ctrl_handler = dcmi->entity.source->ctrl_handler; |
| 1699 | |
| 1700 | ret = dcmi_formats_init(dcmi); |
| 1701 | if (ret) { |
| 1702 | dev_err(dcmi->dev, "No supported mediabus format found\n"); |
| 1703 | return ret; |
| 1704 | } |
| 1705 | |
| 1706 | ret = dcmi_framesizes_init(dcmi); |
| 1707 | if (ret) { |
| 1708 | dev_err(dcmi->dev, "Could not initialize framesizes\n"); |
| 1709 | return ret; |
| 1710 | } |
| 1711 | |
| 1712 | ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds); |
| 1713 | if (ret) { |
| 1714 | dev_err(dcmi->dev, "Could not get sensor bounds\n"); |
| 1715 | return ret; |
| 1716 | } |
| 1717 | |
| 1718 | ret = dcmi_set_default_fmt(dcmi); |
| 1719 | if (ret) { |
| 1720 | dev_err(dcmi->dev, "Could not set default format\n"); |
| 1721 | return ret; |
| 1722 | } |
| 1723 | |
| 1724 | ret = devm_request_threaded_irq(dcmi->dev, dcmi->irq, dcmi_irq_callback, |
| 1725 | dcmi_irq_thread, IRQF_ONESHOT, |
| 1726 | dev_name(dcmi->dev), dcmi); |
| 1727 | if (ret) { |
| 1728 | dev_err(dcmi->dev, "Unable to request irq %d\n", dcmi->irq); |
| 1729 | return ret; |
| 1730 | } |
| 1731 | |
| 1732 | return 0; |
| 1733 | } |
| 1734 | |
| 1735 | static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier, |
| 1736 | struct v4l2_subdev *sd, |
| 1737 | struct v4l2_async_subdev *asd) |
| 1738 | { |
| 1739 | struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier); |
| 1740 | |
| 1741 | dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev)); |
| 1742 | |
| 1743 | /* Checks internally if vdev has been init or not */ |
| 1744 | video_unregister_device(dcmi->vdev); |
| 1745 | } |
| 1746 | |
| 1747 | static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier, |
| 1748 | struct v4l2_subdev *subdev, |
| 1749 | struct v4l2_async_subdev *asd) |
| 1750 | { |
| 1751 | struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier); |
| 1752 | unsigned int ret; |
| 1753 | int src_pad; |
| 1754 | |
| 1755 | dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name); |
| 1756 | |
| 1757 | /* |
| 1758 | * Link this sub-device to DCMI, it could be |
| 1759 | * a parallel camera sensor or a bridge |
| 1760 | */ |
| 1761 | src_pad = media_entity_get_fwnode_pad(&subdev->entity, |
| 1762 | subdev->fwnode, |
| 1763 | MEDIA_PAD_FL_SOURCE); |
| 1764 | |
| 1765 | ret = media_create_pad_link(&subdev->entity, src_pad, |
| 1766 | &dcmi->vdev->entity, 0, |
| 1767 | MEDIA_LNK_FL_IMMUTABLE | |
| 1768 | MEDIA_LNK_FL_ENABLED); |
| 1769 | if (ret) |
| 1770 | dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n", |
| 1771 | subdev->name); |
| 1772 | else |
| 1773 | dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n", |
| 1774 | subdev->name); |
| 1775 | |
| 1776 | return ret; |
| 1777 | } |
| 1778 | |
| 1779 | static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = { |
| 1780 | .bound = dcmi_graph_notify_bound, |
| 1781 | .unbind = dcmi_graph_notify_unbind, |
| 1782 | .complete = dcmi_graph_notify_complete, |
| 1783 | }; |
| 1784 | |
| 1785 | static int dcmi_graph_parse(struct stm32_dcmi *dcmi, struct device_node *node) |
| 1786 | { |
| 1787 | struct device_node *ep = NULL; |
| 1788 | struct device_node *remote; |
| 1789 | |
| 1790 | ep = of_graph_get_next_endpoint(node, ep); |
| 1791 | if (!ep) |
| 1792 | return -EINVAL; |
| 1793 | |
| 1794 | remote = of_graph_get_remote_port_parent(ep); |
| 1795 | of_node_put(ep); |
| 1796 | if (!remote) |
| 1797 | return -EINVAL; |
| 1798 | |
| 1799 | /* Remote node to connect */ |
| 1800 | dcmi->entity.remote_node = remote; |
| 1801 | dcmi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE; |
| 1802 | dcmi->entity.asd.match.fwnode = of_fwnode_handle(remote); |
| 1803 | return 0; |
| 1804 | } |
| 1805 | |
| 1806 | static int dcmi_graph_init(struct stm32_dcmi *dcmi) |
| 1807 | { |
| 1808 | int ret; |
| 1809 | |
| 1810 | /* Parse the graph to extract a list of subdevice DT nodes. */ |
| 1811 | ret = dcmi_graph_parse(dcmi, dcmi->dev->of_node); |
| 1812 | if (ret < 0) { |
| 1813 | dev_err(dcmi->dev, "Failed to parse graph\n"); |
| 1814 | return ret; |
| 1815 | } |
| 1816 | |
| 1817 | v4l2_async_notifier_init(&dcmi->notifier); |
| 1818 | |
| 1819 | ret = v4l2_async_notifier_add_subdev(&dcmi->notifier, |
| 1820 | &dcmi->entity.asd); |
| 1821 | if (ret) { |
| 1822 | dev_err(dcmi->dev, "Failed to add subdev notifier\n"); |
| 1823 | of_node_put(dcmi->entity.remote_node); |
| 1824 | return ret; |
| 1825 | } |
| 1826 | |
| 1827 | dcmi->notifier.ops = &dcmi_graph_notify_ops; |
| 1828 | |
| 1829 | ret = v4l2_async_notifier_register(&dcmi->v4l2_dev, &dcmi->notifier); |
| 1830 | if (ret < 0) { |
| 1831 | dev_err(dcmi->dev, "Failed to register notifier\n"); |
| 1832 | v4l2_async_notifier_cleanup(&dcmi->notifier); |
| 1833 | return ret; |
| 1834 | } |
| 1835 | |
| 1836 | return 0; |
| 1837 | } |
| 1838 | |
| 1839 | static int dcmi_probe(struct platform_device *pdev) |
| 1840 | { |
| 1841 | struct device_node *np = pdev->dev.of_node; |
| 1842 | const struct of_device_id *match = NULL; |
| 1843 | struct v4l2_fwnode_endpoint ep = { .bus_type = 0 }; |
| 1844 | struct stm32_dcmi *dcmi; |
| 1845 | struct vb2_queue *q; |
| 1846 | struct dma_chan *chan; |
| 1847 | struct clk *mclk; |
| 1848 | int irq; |
| 1849 | int ret = 0; |
| 1850 | |
| 1851 | match = of_match_device(of_match_ptr(stm32_dcmi_of_match), &pdev->dev); |
| 1852 | if (!match) { |
| 1853 | dev_err(&pdev->dev, "Could not find a match in devicetree\n"); |
| 1854 | return -ENODEV; |
| 1855 | } |
| 1856 | |
| 1857 | dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL); |
| 1858 | if (!dcmi) |
| 1859 | return -ENOMEM; |
| 1860 | |
| 1861 | dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL); |
| 1862 | if (IS_ERR(dcmi->rstc)) { |
| 1863 | dev_err(&pdev->dev, "Could not get reset control\n"); |
| 1864 | return PTR_ERR(dcmi->rstc); |
| 1865 | } |
| 1866 | |
| 1867 | /* Get bus characteristics from devicetree */ |
| 1868 | np = of_graph_get_next_endpoint(np, NULL); |
| 1869 | if (!np) { |
| 1870 | dev_err(&pdev->dev, "Could not find the endpoint\n"); |
| 1871 | return -ENODEV; |
| 1872 | } |
| 1873 | |
| 1874 | ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep); |
| 1875 | of_node_put(np); |
| 1876 | if (ret) { |
| 1877 | dev_err(&pdev->dev, "Could not parse the endpoint\n"); |
| 1878 | return ret; |
| 1879 | } |
| 1880 | |
| 1881 | if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) { |
| 1882 | dev_err(&pdev->dev, "CSI bus not supported\n"); |
| 1883 | return -ENODEV; |
| 1884 | } |
| 1885 | dcmi->bus.flags = ep.bus.parallel.flags; |
| 1886 | dcmi->bus.bus_width = ep.bus.parallel.bus_width; |
| 1887 | dcmi->bus.data_shift = ep.bus.parallel.data_shift; |
| 1888 | |
| 1889 | irq = platform_get_irq(pdev, 0); |
| 1890 | if (irq <= 0) |
| 1891 | return irq ? irq : -ENXIO; |
| 1892 | |
| 1893 | dcmi->irq = irq; |
| 1894 | |
| 1895 | dcmi->res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1896 | if (!dcmi->res) { |
| 1897 | dev_err(&pdev->dev, "Could not get resource\n"); |
| 1898 | return -ENODEV; |
| 1899 | } |
| 1900 | |
| 1901 | dcmi->regs = devm_ioremap_resource(&pdev->dev, dcmi->res); |
| 1902 | if (IS_ERR(dcmi->regs)) { |
| 1903 | dev_err(&pdev->dev, "Could not map registers\n"); |
| 1904 | return PTR_ERR(dcmi->regs); |
| 1905 | } |
| 1906 | |
| 1907 | mclk = devm_clk_get(&pdev->dev, "mclk"); |
| 1908 | if (IS_ERR(mclk)) { |
| 1909 | if (PTR_ERR(mclk) != -EPROBE_DEFER) |
| 1910 | dev_err(&pdev->dev, "Unable to get mclk\n"); |
| 1911 | return PTR_ERR(mclk); |
| 1912 | } |
| 1913 | |
| 1914 | chan = dma_request_slave_channel(&pdev->dev, "tx"); |
| 1915 | if (!chan) { |
| 1916 | dev_info(&pdev->dev, "Unable to request DMA channel, defer probing\n"); |
| 1917 | return -EPROBE_DEFER; |
| 1918 | } |
| 1919 | |
| 1920 | spin_lock_init(&dcmi->irqlock); |
| 1921 | mutex_init(&dcmi->lock); |
| 1922 | mutex_init(&dcmi->dma_lock); |
| 1923 | init_completion(&dcmi->complete); |
| 1924 | INIT_LIST_HEAD(&dcmi->buffers); |
| 1925 | |
| 1926 | dcmi->dev = &pdev->dev; |
| 1927 | dcmi->mclk = mclk; |
| 1928 | dcmi->state = STOPPED; |
| 1929 | dcmi->dma_chan = chan; |
| 1930 | |
| 1931 | q = &dcmi->queue; |
| 1932 | |
| 1933 | dcmi->v4l2_dev.mdev = &dcmi->mdev; |
| 1934 | |
| 1935 | /* Initialize media device */ |
| 1936 | strscpy(dcmi->mdev.model, DRV_NAME, sizeof(dcmi->mdev.model)); |
| 1937 | snprintf(dcmi->mdev.bus_info, sizeof(dcmi->mdev.bus_info), |
| 1938 | "platform:%s", DRV_NAME); |
| 1939 | dcmi->mdev.dev = &pdev->dev; |
| 1940 | media_device_init(&dcmi->mdev); |
| 1941 | |
| 1942 | /* Initialize the top-level structure */ |
| 1943 | ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev); |
| 1944 | if (ret) |
| 1945 | goto err_media_device_cleanup; |
| 1946 | |
| 1947 | dcmi->vdev = video_device_alloc(); |
| 1948 | if (!dcmi->vdev) { |
| 1949 | ret = -ENOMEM; |
| 1950 | goto err_device_unregister; |
| 1951 | } |
| 1952 | |
| 1953 | /* Video node */ |
| 1954 | dcmi->vdev->fops = &dcmi_fops; |
| 1955 | dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev; |
| 1956 | dcmi->vdev->queue = &dcmi->queue; |
| 1957 | strscpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name)); |
| 1958 | dcmi->vdev->release = video_device_release; |
| 1959 | dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops; |
| 1960 | dcmi->vdev->lock = &dcmi->lock; |
| 1961 | dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING | |
| 1962 | V4L2_CAP_READWRITE; |
| 1963 | video_set_drvdata(dcmi->vdev, dcmi); |
| 1964 | |
| 1965 | /* Media entity pads */ |
| 1966 | dcmi->vid_cap_pad.flags = MEDIA_PAD_FL_SINK; |
| 1967 | ret = media_entity_pads_init(&dcmi->vdev->entity, |
| 1968 | 1, &dcmi->vid_cap_pad); |
| 1969 | if (ret) { |
| 1970 | dev_err(dcmi->dev, "Failed to init media entity pad\n"); |
| 1971 | goto err_device_release; |
| 1972 | } |
| 1973 | dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT; |
| 1974 | |
| 1975 | ret = video_register_device(dcmi->vdev, VFL_TYPE_GRABBER, -1); |
| 1976 | if (ret) { |
| 1977 | dev_err(dcmi->dev, "Failed to register video device\n"); |
| 1978 | goto err_media_entity_cleanup; |
| 1979 | } |
| 1980 | |
| 1981 | dev_dbg(dcmi->dev, "Device registered as %s\n", |
| 1982 | video_device_node_name(dcmi->vdev)); |
| 1983 | |
| 1984 | /* Buffer queue */ |
| 1985 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 1986 | q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF; |
| 1987 | q->lock = &dcmi->lock; |
| 1988 | q->drv_priv = dcmi; |
| 1989 | q->buf_struct_size = sizeof(struct dcmi_buf); |
| 1990 | q->ops = &dcmi_video_qops; |
| 1991 | q->mem_ops = &vb2_dma_contig_memops; |
| 1992 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; |
| 1993 | q->min_buffers_needed = 2; |
| 1994 | q->dev = &pdev->dev; |
| 1995 | |
| 1996 | ret = vb2_queue_init(q); |
| 1997 | if (ret < 0) { |
| 1998 | dev_err(&pdev->dev, "Failed to initialize vb2 queue\n"); |
| 1999 | goto err_media_entity_cleanup; |
| 2000 | } |
| 2001 | |
| 2002 | ret = dcmi_graph_init(dcmi); |
| 2003 | if (ret < 0) |
| 2004 | goto err_media_entity_cleanup; |
| 2005 | |
| 2006 | /* Reset device */ |
| 2007 | ret = reset_control_assert(dcmi->rstc); |
| 2008 | if (ret) { |
| 2009 | dev_err(&pdev->dev, "Failed to assert the reset line\n"); |
| 2010 | goto err_cleanup; |
| 2011 | } |
| 2012 | |
| 2013 | usleep_range(3000, 5000); |
| 2014 | |
| 2015 | ret = reset_control_deassert(dcmi->rstc); |
| 2016 | if (ret) { |
| 2017 | dev_err(&pdev->dev, "Failed to deassert the reset line\n"); |
| 2018 | goto err_cleanup; |
| 2019 | } |
| 2020 | |
| 2021 | dev_info(&pdev->dev, "Probe done\n"); |
| 2022 | |
| 2023 | platform_set_drvdata(pdev, dcmi); |
| 2024 | |
| 2025 | pm_runtime_enable(&pdev->dev); |
| 2026 | |
| 2027 | return 0; |
| 2028 | |
| 2029 | err_cleanup: |
| 2030 | v4l2_async_notifier_cleanup(&dcmi->notifier); |
| 2031 | err_media_entity_cleanup: |
| 2032 | media_entity_cleanup(&dcmi->vdev->entity); |
| 2033 | err_device_release: |
| 2034 | video_device_release(dcmi->vdev); |
| 2035 | err_device_unregister: |
| 2036 | v4l2_device_unregister(&dcmi->v4l2_dev); |
| 2037 | err_media_device_cleanup: |
| 2038 | media_device_cleanup(&dcmi->mdev); |
| 2039 | dma_release_channel(dcmi->dma_chan); |
| 2040 | |
| 2041 | return ret; |
| 2042 | } |
| 2043 | |
| 2044 | static int dcmi_remove(struct platform_device *pdev) |
| 2045 | { |
| 2046 | struct stm32_dcmi *dcmi = platform_get_drvdata(pdev); |
| 2047 | |
| 2048 | pm_runtime_disable(&pdev->dev); |
| 2049 | |
| 2050 | v4l2_async_notifier_unregister(&dcmi->notifier); |
| 2051 | v4l2_async_notifier_cleanup(&dcmi->notifier); |
| 2052 | media_entity_cleanup(&dcmi->vdev->entity); |
| 2053 | v4l2_device_unregister(&dcmi->v4l2_dev); |
| 2054 | media_device_cleanup(&dcmi->mdev); |
| 2055 | |
| 2056 | dma_release_channel(dcmi->dma_chan); |
| 2057 | |
| 2058 | return 0; |
| 2059 | } |
| 2060 | |
| 2061 | static __maybe_unused int dcmi_runtime_suspend(struct device *dev) |
| 2062 | { |
| 2063 | struct stm32_dcmi *dcmi = dev_get_drvdata(dev); |
| 2064 | |
| 2065 | clk_disable_unprepare(dcmi->mclk); |
| 2066 | |
| 2067 | return 0; |
| 2068 | } |
| 2069 | |
| 2070 | static __maybe_unused int dcmi_runtime_resume(struct device *dev) |
| 2071 | { |
| 2072 | struct stm32_dcmi *dcmi = dev_get_drvdata(dev); |
| 2073 | int ret; |
| 2074 | |
| 2075 | ret = clk_prepare_enable(dcmi->mclk); |
| 2076 | if (ret) |
| 2077 | dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__); |
| 2078 | |
| 2079 | return ret; |
| 2080 | } |
| 2081 | |
| 2082 | static __maybe_unused int dcmi_suspend(struct device *dev) |
| 2083 | { |
| 2084 | /* disable clock */ |
| 2085 | pm_runtime_force_suspend(dev); |
| 2086 | |
| 2087 | /* change pinctrl state */ |
| 2088 | pinctrl_pm_select_sleep_state(dev); |
| 2089 | |
| 2090 | return 0; |
| 2091 | } |
| 2092 | |
| 2093 | static __maybe_unused int dcmi_resume(struct device *dev) |
| 2094 | { |
| 2095 | /* restore pinctl default state */ |
| 2096 | pinctrl_pm_select_default_state(dev); |
| 2097 | |
| 2098 | /* clock enable */ |
| 2099 | pm_runtime_force_resume(dev); |
| 2100 | |
| 2101 | return 0; |
| 2102 | } |
| 2103 | |
| 2104 | static const struct dev_pm_ops dcmi_pm_ops = { |
| 2105 | SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume) |
| 2106 | SET_RUNTIME_PM_OPS(dcmi_runtime_suspend, |
| 2107 | dcmi_runtime_resume, NULL) |
| 2108 | }; |
| 2109 | |
| 2110 | static struct platform_driver stm32_dcmi_driver = { |
| 2111 | .probe = dcmi_probe, |
| 2112 | .remove = dcmi_remove, |
| 2113 | .driver = { |
| 2114 | .name = DRV_NAME, |
| 2115 | .of_match_table = of_match_ptr(stm32_dcmi_of_match), |
| 2116 | .pm = &dcmi_pm_ops, |
| 2117 | }, |
| 2118 | }; |
| 2119 | |
| 2120 | module_platform_driver(stm32_dcmi_driver); |
| 2121 | |
| 2122 | MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>"); |
| 2123 | MODULE_AUTHOR("Hugues Fruchet <hugues.fruchet@st.com>"); |
| 2124 | MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver"); |
| 2125 | MODULE_LICENSE("GPL"); |
| 2126 | MODULE_SUPPORTED_DEVICE("video"); |