blob: 245d27d695c29b588b6b2c6fcb830d86af18cd6b [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*
2 * Base driver for ASR PM813
3 *
4 * Copyright 2021 ASR Microelectronics (Shanghai) Co., Ltd.
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file "COPYING" in the main directory of this
8 * archive for more details.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/i2c.h>
23#include <linux/mfd/core.h>
24#include <linux/mfd/88pm80x.h>
25#include <linux/mfd/pm813.h>
26#include <linux/slab.h>
27#include <linux/of_device.h>
28#include <linux/reboot.h>
29#include <soc/asr/addr-map.h>
30#include <linux/cputype.h>
31
32/* Interrupt Registers */
33#define PM813_INT_STATUS1 (0x05)
34#define PM813_ONKEY_INT_STS1 (1 << 0)
35#define PM813_EXTON1_INT_STS1 (1 << 1)
36#define PM813_CHG_INT_STS1 (1 << 2)
37#define PM813_BAT_INT_STS1 (1 << 3)
38
39#define PM813_INT_STATUS2 (0x06)
40#define PM813_TINT_INT_STS2 (1 << 0)
41#define PM813_GP0_INT_STS2 (1 << 1)
42#define PM813_GP1_INT_STS2 (1 << 2)
43#define PM813_VINLDO_INT_STS2 (1 << 3)
44#define PM813_VINLDO_SLP_INT_STS2 (1 << 4)
45#define PM813_RTC_INT_STS2 (1 << 7)
46
47#define PM813_INT_ENA_1 (0x09)
48#define PM813_ONKEY_INT_ENA1 (1 << 0)
49#define PM813_EXTON_INT_ENA1 (1 << 1)
50#define PM813_VCHG_INT_ENA1 (1 << 2)
51#define PM813_BAT_INT_ENA1 (1 << 3)
52
53#define PM813_INT_ENA_2 (0x0A)
54#define PM813_TINT_INT_EN2 (1 << 0)
55#define PM813_GP0_INT_EN2 (1 << 1)
56#define PM813_GP1_INT_EN2 (1 << 2)
57#define PM813_VINLDO_INT_EN2 (1 << 3)
58#define PM813_VINLDO_SLP_INT_EN2 (1 << 4)
59#define PM813_RTC_INT_ENA1 (1 << 7)
60
61/* number of INT_ENA & INT_STATUS regs */
62#define PM813_INT_REG_NUM (2)
63#define PM813_BUCK1_REG_15_8 (0x24)
64
65/* Interrupt Number in 88PM813 */
66enum {
67 PM813_IRQ_ONKEY, /*EN1b0 *//*0 */
68 PM813_IRQ_EXTON1, /*EN1b1 */
69 PM813_IRQ_EXTON2, /*EN1b2 */
70 PM813_IRQ_BAT, /*EN1b3 */
71 PM813_IRQ_CHG, /*EN1b4 */
72 PM813_IRQ_VBUS_OVUV, /*EN1b5 */
73 PM813_IRQ_VBUS_DET, /*EN1b6 */
74 PM813_IRQ_CP_ST_DONE_DET, /*EN1b7 */
75 PM813_IRQ_TINT, /*EN2b0 */
76 PM813_IRQ_GPADC0, /*EN2b1 */
77 PM813_IRQ_GPADC1, /*EN2b2 */
78 PM813_IRQ_VINLDO, /*EN2b3 */
79 PM813_IRQ_BAT_TEMP, /*EN2b4 */
80 PM813_IRQ_CP_ST_ERR, /*EN2b5 */
81 PM813_IRQ_CLASSD_OCP, /*EN2b6 */
82 PM813_IRQ_RTC, /*EN2b7 */
83 PM813_MAX_IRQ,
84};
85
86#define SCS_SYNC_RTC_CNRL (0x1 << 0 | 0x1 << 4)
87#define SCS_CLEAR_SYNC_DONE (0x1 << 0 | 0x1 << 6)
88#define SCR_RTC_SYNC_UDELAY (130)
89#define SCS_RTC_ACTIVE_LOW (0x1 << 2)
90#define SCS_RTC_CNTL (0x0c)
91#define SCS_RTC_SYNC_CFG (0x14)
92#define SCS_DCS_MODE (0x1c)
93
94#define SCS_RTC_VIRT_BASE (APB_VIRT_BASE + 0x03E000)
95#define ASR1903_SCS_RTC_VIRT_BASE (APB_VIRT_BASE + 0x0C0000)
96
97/* PM813: generation identification number */
98#define PM813_CHIP_GEN_ID_NUM 0x3
99extern struct pm80x_chip *pm80x_chip_g;
100
101static const struct i2c_device_id pm80x_id_table[] = {
102 {"pm813", 0},
103 {} /* NULL terminated */
104};
105MODULE_DEVICE_TABLE(i2c, pm80x_id_table);
106
107static const struct of_device_id pm80x_dt_ids[] = {
108 { .compatible = "asr,pm813", },
109 {},
110};
111MODULE_DEVICE_TABLE(of, pm80x_dt_ids);
112
113static struct resource rtc_resources[] = {
114 {
115 .name = "88pm80x-rtc",
116 .start = PM813_IRQ_RTC,
117 .end = PM813_IRQ_RTC,
118 .flags = IORESOURCE_IRQ,
119 },
120};
121
122static struct mfd_cell rtc_devs[] = {
123 {
124 .name = "88pm80x-rtc",
125 .of_compatible = "marvell,88pm80x-rtc",
126 .num_resources = ARRAY_SIZE(rtc_resources),
127 .resources = &rtc_resources[0],
128 .id = -1,
129 },
130};
131
132static struct resource scs_rtc_resources[] = {
133 {
134 .name = "scs-rtc",
135 .start = PM813_IRQ_EXTON1,
136 .end = PM813_IRQ_EXTON1,
137 .flags = IORESOURCE_IRQ,
138 },
139};
140
141static struct mfd_cell scs_rtc_devs[] = {
142 {
143 .name = "scs-rtc",
144 .of_compatible = "asr,scs-rtc",
145 .num_resources = ARRAY_SIZE(scs_rtc_resources),
146 .resources = &scs_rtc_resources[0],
147 .id = -1,
148 },
149};
150
151static struct resource onkey_resources[] = {
152 {
153 .name = "88pm80x-onkey",
154 .start = PM813_IRQ_ONKEY,
155 .end = PM813_IRQ_ONKEY,
156 .flags = IORESOURCE_IRQ,
157 },
158};
159
160static struct mfd_cell onkey_devs[] = {
161 {
162 .name = "88pm80x-onkey",
163 .of_compatible = "marvell,88pm80x-onkey",
164 .num_resources = 1,
165 .resources = &onkey_resources[0],
166 .id = -1,
167 },
168};
169
170static struct mfd_cell regulator_devs[] = {
171 {
172 .name = "pm813-regulator",
173 .of_compatible = "asr,pm813-regulator",
174 .id = -1,
175 },
176};
177
178static struct resource bat_resources[] = {
179 {
180 .name = "pm813-bat",
181 .start = PM813_IRQ_VINLDO,
182 .end = PM813_IRQ_VINLDO,
183 .flags = IORESOURCE_IRQ,
184 },
185};
186
187static struct mfd_cell bat_devs[] = {
188 {
189 .name = "pm813-bat",
190 .of_compatible = "asr,pm813-bat",
191 .num_resources = 1,
192 .resources = &bat_resources[0],
193 .id = -1,
194 },
195};
196
197#ifdef CONFIG_PAPI_88PM80X
198static struct mfd_cell papi_devs[] = {
199 {
200 .name = "88pm80x-papi",
201 .of_compatible = "marvell,88pm80x-papi",
202 .id = -1,
203 },
204};
205#endif
206
207static struct resource usb_resources[] = {
208 {
209 .name = "88pm80x-usb",
210 .start = PM813_IRQ_EXTON1,
211 .end = PM813_IRQ_EXTON1,
212 .flags = IORESOURCE_IRQ,
213 },
214 {
215 .name = "88pm80x-gp0-id",
216 .start = PM813_IRQ_GPADC0,
217 .end = PM813_IRQ_GPADC0,
218 .flags = IORESOURCE_IRQ,
219 },
220 {
221 .name = "88pm80x-gp1-id",
222 .start = PM813_IRQ_GPADC1,
223 .end = PM813_IRQ_GPADC1,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct mfd_cell usb_devs[] = {
229 {
230 .name = "88pm80x-usb",
231 .of_compatible = "marvell,88pm80x-usb",
232 .num_resources = ARRAY_SIZE(usb_resources),
233 .resources = &usb_resources[0],
234 .id = -1,
235 },
236};
237
238static struct resource scs_usb_resources[] = {
239 {
240 .name = "88pm80x-usb",
241 .start = PM813_IRQ_EXTON2,
242 .end = PM813_IRQ_EXTON2,
243 .flags = IORESOURCE_IRQ,
244 },
245 {
246 .name = "88pm80x-gp0-id",
247 .start = PM813_IRQ_GPADC0,
248 .end = PM813_IRQ_GPADC0,
249 .flags = IORESOURCE_IRQ,
250 },
251 {
252 .name = "88pm80x-gp1-id",
253 .start = PM813_IRQ_GPADC1,
254 .end = PM813_IRQ_GPADC1,
255 .flags = IORESOURCE_IRQ,
256 },
257};
258
259static struct mfd_cell scs_usb_devs[] = {
260 {
261 .name = "88pm80x-usb",
262 .of_compatible = "marvell,88pm80x-usb",
263 .num_resources = ARRAY_SIZE(scs_usb_resources),
264 .resources = &scs_usb_resources[0],
265 .id = -1,
266 },
267};
268
269static struct mfd_cell dvc_devs[] = {
270 {
271 .name = "88pm8xx-dvc",
272 .of_compatible = "marvell,88pm8xx-dvc",
273 .id = -1,
274 },
275};
276
277static struct mfd_cell debug_devs[] = {
278 {
279 .name = "88pm80x-debug",
280 .of_compatible = "marvell,88pm80x-debug",
281 .id = -1,
282 },
283};
284
285static struct mfd_cell wdt_devs[] = {
286 {
287 .name = "88pm80x-wdt",
288 .of_compatible = "marvell,88pm80x-wdt",
289 .id = -1,
290 },
291};
292
293static const struct regmap_irq pm813_irqs[] = {
294 /* INT0 */
295 [PM813_IRQ_ONKEY] = {
296 .mask = PM813_ONKEY_INT_ENA1,
297 },
298 [PM813_IRQ_EXTON1] = {
299 .mask = PM813_EXTON_INT_ENA1,
300 },
301 [PM813_IRQ_EXTON2] = {
302 .mask = PM813_VCHG_INT_ENA1,
303 },
304 [PM813_IRQ_BAT] = {
305 .mask = PM813_BAT_INT_ENA1,
306 },
307
308 [PM813_IRQ_TINT] = {
309 .reg_offset = 1,
310 .mask = PM813_TINT_INT_EN2,
311 },
312 [PM813_IRQ_GPADC0] = {
313 .reg_offset = 1,
314 .mask = PM813_GP0_INT_EN2,
315 },
316 [PM813_IRQ_GPADC1] = {
317 .reg_offset = 1,
318 .mask = PM813_GP1_INT_EN2,
319 },
320 [PM813_IRQ_VINLDO] = {
321 .reg_offset = 1,
322 .mask = PM813_VINLDO_INT_EN2,
323 },
324 [PM813_IRQ_RTC] = {
325 .reg_offset = 1,
326 .mask = PM813_RTC_INT_ENA1,
327 },
328};
329static bool scs_int_active_high;
330static bool is_scs_mode = false;
331static bool pm813_is_probed = false;
332
333bool pm813_driver_is_probed(void)
334{
335 return pm813_is_probed;
336}
337
338int pm813_extern_read(int page, int reg)
339{
340 int ret;
341 unsigned int val;
342 struct pm80x_chip *chip = pm80x_chip_g;
343 if (!chip) {
344 pr_err("%s: chip is NULL\n", __func__);
345 return -EINVAL;
346 }
347 switch (page) {
348 case PM813_BASE_PAGE:
349 ret = regmap_read(chip->regmap, reg, &val);
350 break;
351 case PM813_POWER_PAGE:
352 ret = regmap_read(chip->subchip->regmap_power,
353 reg, &val);
354 break;
355 case PM813_GPADC_PAGE:
356 ret = regmap_read(chip->subchip->regmap_gpadc,
357 reg, &val);
358 break;
359 default:
360 ret = -1;
361 break;
362 }
363
364 if (ret < 0) {
365 pr_err("fail to read reg 0x%x\n", reg);
366 return ret;
367 }
368
369 return val;
370}
371EXPORT_SYMBOL(pm813_extern_read);
372
373int pm813_extern_write(int page, int reg, unsigned char val)
374{
375 int ret;
376 struct pm80x_chip *chip = pm80x_chip_g;
377 if (!chip) {
378 pr_err("%s: chip is NULL\n", __func__);
379 return -EINVAL;
380 }
381 switch (page) {
382 case PM813_BASE_PAGE:
383 ret = regmap_write(chip->regmap, reg, val);
384 break;
385 case PM813_POWER_PAGE:
386 ret = regmap_write(chip->subchip->regmap_power,
387 reg, val);
388 break;
389 case PM813_GPADC_PAGE:
390 ret = regmap_write(chip->subchip->regmap_gpadc,
391 reg, val);
392 break;
393 default:
394 ret = -1;
395 break;
396 }
397 return ret;
398}
399EXPORT_SYMBOL(pm813_extern_write);
400
401int pm813_extern_setbits(int page, int reg,
402 unsigned char mask, unsigned char val)
403{
404 int ret;
405 struct pm80x_chip *chip = pm80x_chip_g;
406 if (!chip) {
407 pr_err("%s: chip is NULL\n", __func__);
408 return -EINVAL;
409 }
410 switch (page) {
411 case PM813_BASE_PAGE:
412 ret = regmap_update_bits(chip->regmap, reg, mask, val);
413 break;
414 case PM813_POWER_PAGE:
415 ret = regmap_update_bits(chip->subchip->regmap_power,
416 reg, mask, val);
417 break;
418 case PM813_GPADC_PAGE:
419 ret = regmap_update_bits(chip->subchip->regmap_gpadc,
420 reg, mask, val);
421 break;
422 default:
423 ret = -1;
424 break;
425 }
426 return ret;
427}
428EXPORT_SYMBOL(pm813_extern_setbits);
429
430static int __pm813_sw_poweroff(void)
431{
432 u32 val;
433 int ret = 0;
434 struct pm80x_chip *chip = pm80x_chip_g;
435
436 if (!chip) {
437 WARN(1, "__pm813_sw_poweroff: chip is NULL\n");
438 return -EINVAL;
439 }
440
441 if (CHIP_PM813S_A1_ID == chip->type
442 || CHIP_PM813S_A0_ID == chip->type)
443 val = 0x3;
444 else
445 val = 0x1;
446 /* discharge timer should be set greater than or equal to 1s */
447 ret = pmic_rw_reg(PM813_RTC_MISC2, 0xf, val);
448 if (ret < 0) {
449 pr_err("%s, set PM813_RTC_MISC2 fail\n", __func__);
450 return ret;
451 }
452
453 ret = pmic_rw_reg(PM813_RTC_MISC4, (0x1 << 1), 0x0);
454 if (ret < 0) {
455 pr_err("%s, set PM813_RTC_MISC4 fail\n", __func__);
456 return ret;
457 }
458
459 ret = pmic_rw_reg(PM813_WAKEUP1, PM813_SW_PDOWN, PM813_SW_PDOWN);
460 if (ret < 0)
461 pr_err("%s, turn off power fail\n", __func__);
462
463 return ret;
464}
465
466static void pm813_sw_poweroff(void)
467{
468 int ret;
469
470 /* try 3 times to reduce the fail rate */
471 pr_info("turning off power....\n");
472
473 ret = __pm813_sw_poweroff();
474 if (ret < 0)
475 ret = __pm813_sw_poweroff();
476 if (ret < 0)
477 ret = __pm813_sw_poweroff();
478 if (ret < 0)
479 pr_err("%s, turn off power failed\n", __func__);
480}
481
482static int device_gpadc_init(struct pm80x_chip *chip,
483 struct pm80x_platform_data *pdata)
484{
485 struct pm80x_subchip *subchip = chip->subchip;
486 struct regmap *map = subchip->regmap_gpadc;
487 int ret = 0;
488 u32 val;
489
490 if (!map) {
491 dev_warn(chip->dev,
492 "Warning: gpadc regmap is not available!\n");
493 return -EINVAL;
494 }
495 /*
496 * initialize GPADC without activating it turn on GPADC
497 * measurments
498 */
499 ret = regmap_update_bits(map,
500 PM813_GPADC_MISC_CONFIG2,
501 PM813_GPADC_MISC_GPFSM_EN,
502 0x0);
503 if (ret < 0)
504 goto out;
505 /*
506 * the defult of PM813 is GPADC operates at 100Ks/s rate
507 * and Number of GPADC slots with active current bias prior
508 * to GPADC sampling = 1 slot for all GPADCs set for
509 * Temprature mesurmants
510 *
511 * disable all the BIAS by default, other drivers will enable
512 * BIAS on demand
513 */
514 ret = regmap_update_bits(map, PM813_GP_BIAS_ENA1, 0x3, 0x0);
515 if (ret < 0)
516 goto out;
517
518 ret = regmap_update_bits(map, PM813_GPADC_MISC_CONFIG3, 0x3, 0x1);
519 if (ret < 0)
520 goto out;
521
522 ret = regmap_write(map, PM813_GPADC_CFG1, 0x0);
523 if (ret < 0)
524 goto out;
525
526 /* single conversion mode */
527 ret = regmap_update_bits(map, PM813_GPADC_CFG2, 0x19, 0x18);
528 if (ret < 0)
529 goto out;
530
531 ret = regmap_update_bits(map, PM813_GPADC_CFG3, (0x3 << 2), (0x3 << 2));
532 if (ret < 0)
533 goto out;
534
535 ret = regmap_read(map, PM8XX_REG_VREF_OFFSET, &val);
536 if (ret < 0) {
537 chip->adc_vref_offset = 0;
538 } else {
539 if (val & (0x1 << 7))
540 chip->adc_vref_offset = 0xffffff00 | (val & 0xff);
541 else
542 chip->adc_vref_offset = (val & 0xff);
543
544 chip->adc_vref_offset *= 5;
545 }
546
547 ret = regmap_read(map, PM8XX_REG_SAMPLE_OFFSET, &val);
548 if (ret < 0) {
549 chip->adc_sample_offset = 0;
550 } else {
551 if (val & (0x1 << 7))
552 chip->adc_sample_offset = 0xffffff00 | (val & 0xff);
553 else
554 chip->adc_sample_offset = (val & 0xff);
555
556 }
557 dev_info(chip->dev, "vref/sample offset: %d/%d\n", chip->adc_vref_offset, chip->adc_sample_offset);
558 dev_info(chip->dev, "PM813 device_gpadc_init: Done\n");
559 return 0;
560
561out:
562 dev_info(chip->dev, "PM813 device_gpadc_init: Failed!\n");
563 return ret;
564}
565
566static int device_onkey_init(struct pm80x_chip *chip,
567 struct pm80x_platform_data *pdata)
568{
569 int ret;
570
571#ifdef CONFIG_CPU_ASR1901
572 return 0;
573#endif
574 ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
575 ARRAY_SIZE(onkey_devs), &onkey_resources[0],
576 regmap_irq_chip_get_base(chip->irq_data), NULL);
577
578 if (ret) {
579 dev_err(chip->dev, "Failed to add onkey subdev\n");
580 return ret;
581 }
582
583 return 0;
584}
585
586static int device_rtc_init(struct pm80x_chip *chip,
587 struct pm80x_platform_data *pdata)
588{
589 int ret;
590
591#ifdef CONFIG_CPU_ASR1901
592 return 0;
593#endif
594
595 rtc_devs[0].platform_data = pdata->rtc;
596 rtc_devs[0].pdata_size =
597 pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
598 ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
599 ARRAY_SIZE(rtc_devs), NULL,
600 regmap_irq_chip_get_base(chip->irq_data), NULL);
601 if (ret) {
602 dev_err(chip->dev, "Failed to add rtc subdev\n");
603 return ret;
604 }
605
606 return 0;
607}
608
609static int device_scs_rtc_init(struct pm80x_chip *chip,
610 struct pm80x_platform_data *pdata)
611{
612 int ret;
613
614 scs_rtc_devs[0].platform_data = pdata->rtc;
615 scs_rtc_devs[0].pdata_size =
616 pdata->rtc ? sizeof(struct pm80x_rtc_pdata) : 0;
617 ret = mfd_add_devices(chip->dev, 0, &scs_rtc_devs[0],
618 ARRAY_SIZE(scs_rtc_devs), NULL,
619 regmap_irq_chip_get_base(chip->irq_data), NULL);
620 if (ret) {
621 dev_err(chip->dev, "Failed to add scs rtc subdev\n");
622 return ret;
623 }
624
625 return 0;
626}
627
628static int device_regulator_init(struct pm80x_chip *chip,
629 struct pm80x_platform_data *pdata)
630{
631 int ret;
632
633 ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0],
634 ARRAY_SIZE(regulator_devs), NULL, 0, NULL);
635 if (ret) {
636 dev_err(chip->dev, "Failed to add regulator subdev\n");
637 return ret;
638 }
639
640 return 0;
641}
642
643static int device_bat_init(struct pm80x_chip *chip,
644 struct pm80x_platform_data *pdata)
645{
646 int ret;
647
648 ret = mfd_add_devices(chip->dev, 0, &bat_devs[0],
649 ARRAY_SIZE(bat_devs), NULL,
650 regmap_irq_chip_get_base(chip->irq_data), NULL);
651 if (ret) {
652 dev_err(chip->dev, "Failed to add battery subdev\n");
653 return ret;
654 }
655
656 return 0;
657}
658
659#ifdef CONFIG_PAPI_88PM80X
660static int device_papi_init(struct pm80x_chip *chip)
661{
662 int ret;
663
664 ret = mfd_add_devices(chip->dev, 0, &papi_devs[0],
665 ARRAY_SIZE(papi_devs), NULL, 0, NULL);
666 if (ret) {
667 dev_err(chip->dev, "Failed to add papi subdev\n");
668 return ret;
669 }
670
671 return 0;
672}
673#endif
674
675static int device_usb_init(struct pm80x_chip *chip,
676 struct pm80x_platform_data *pdata)
677{
678 int ret;
679
680 usb_devs[0].platform_data = pdata->usb;
681 usb_devs[0].pdata_size = sizeof(struct pm80x_usb_pdata);
682 ret = mfd_add_devices(chip->dev, 0, &usb_devs[0],
683 ARRAY_SIZE(usb_devs), NULL,
684 regmap_irq_chip_get_base(chip->irq_data), NULL);
685 if (ret < 0) {
686 dev_err(chip->dev, "Failed to add usb subdev\n");
687 return ret;
688 }
689
690 return 0;
691}
692
693static int device_scs_usb_init(struct pm80x_chip *chip,
694 struct pm80x_platform_data *pdata)
695{
696 int ret;
697
698 scs_usb_devs[0].platform_data = pdata->usb;
699 scs_usb_devs[0].pdata_size = sizeof(struct pm80x_usb_pdata);
700 ret = mfd_add_devices(chip->dev, 0, &scs_usb_devs[0],
701 ARRAY_SIZE(scs_usb_devs), NULL,
702 regmap_irq_chip_get_base(chip->irq_data), NULL);
703 if (ret < 0) {
704 dev_err(chip->dev, "Failed to add usb subdev\n");
705 return ret;
706 }
707
708 return 0;
709}
710
711static int device_dvc_init(struct pm80x_chip *chip,
712 struct pm80x_platform_data *pdata)
713{
714 int ret;
715
716#ifdef CONFIG_CPU_ASR1901
717 return 0;
718#endif
719
720 ret = mfd_add_devices(chip->dev, 0, &dvc_devs[0],
721 ARRAY_SIZE(dvc_devs), NULL, 0, NULL);
722 if (ret) {
723 dev_err(chip->dev, "Failed to add dvc subdev\n");
724 return ret;
725 }
726 return 0;
727}
728
729static int device_debug_init(struct pm80x_chip *chip)
730{
731 return mfd_add_devices(chip->dev, 0, &debug_devs[0],
732 ARRAY_SIZE(debug_devs), NULL, 0, NULL);
733}
734
735static int device_wdt_init(struct pm80x_chip *chip)
736{
737 return mfd_add_devices(chip->dev, 0, &wdt_devs[0],
738 ARRAY_SIZE(wdt_devs), NULL, 0, NULL);
739}
740
741static int device_irq_init_813(struct pm80x_chip *chip)
742{
743 struct regmap *map = chip->regmap;
744#ifdef CONFIG_CPU_ASR1901
745 unsigned long flags = IRQF_ONESHOT | IRQF_SHARED;
746#else
747 unsigned long flags = IRQF_ONESHOT;
748#endif
749 int data, mask, ret = -EINVAL;
750
751 if (!map || !chip->irq) {
752 if (!map)
753 pr_info("%s: map == NULL\n", __func__);
754 else
755 pr_info("%s: chip.irq == 0\n", __func__);
756 dev_err(chip->dev, "incorrect parameters\n");
757 return -EINVAL;
758 }
759
760 /*
761 * irq_mode defines the way of clearing interrupt. it's read-clear by
762 * default.
763 */
764 mask =
765 PM813_WAKEUP2_INV_INT | PM813_WAKEUP2_INT_CLEAR |
766 PM813_WAKEUP2_INT_MASK;
767
768 data = PM813_WAKEUP2_INT_CLEAR;
769 ret = regmap_update_bits(map, PM813_WAKEUP2, mask, data);
770
771 if (ret < 0)
772 goto out;
773
774 ret =
775 regmap_add_irq_chip(chip->regmap, chip->irq, flags, -1,
776 chip->regmap_irq_chip, &chip->irq_data);
777
778out:
779 return ret;
780}
781
782static void device_irq_exit_813(struct pm80x_chip *chip)
783{
784 regmap_del_irq_chip(chip->irq, chip->irq_data);
785}
786
787static struct regmap_irq_chip pm813_irq_chip = {
788 .name = "ASRPM813",
789 .irqs = pm813_irqs,
790 .num_irqs = ARRAY_SIZE(pm813_irqs),
791
792 .num_regs = 2,
793 .status_base = PM813_INT_STATUS1,
794 .mask_base = PM813_INT_ENA_1,
795 .ack_base = PM813_INT_STATUS1,
796 .mask_invert = 1,
797};
798
799static int pm813_pages_init(struct pm80x_chip *chip)
800{
801 struct pm80x_subchip *subchip;
802 struct i2c_client *client = chip->client;
803
804 int ret = 0;
805
806 subchip = chip->subchip;
807 if (!subchip || !subchip->power_page_addr || !subchip->gpadc_page_addr)
808 return -ENODEV;
809
810 /* PM813 block power page */
811 subchip->power_page = i2c_new_dummy(client->adapter,
812 subchip->power_page_addr);
813 if (subchip->power_page == NULL) {
814 ret = -ENODEV;
815 goto out;
816 }
817
818 subchip->regmap_power = devm_regmap_init_i2c(subchip->power_page,
819 &pm80x_regmap_config);
820 if (IS_ERR(subchip->regmap_power)) {
821 ret = PTR_ERR(subchip->regmap_power);
822 dev_err(chip->dev,
823 "Failed to allocate regmap_power: %d\n", ret);
824 goto out;
825 }
826
827 i2c_set_clientdata(subchip->power_page, chip);
828
829 /* PM813 block GPADC */
830 subchip->gpadc_page = i2c_new_dummy(client->adapter,
831 subchip->gpadc_page_addr);
832 if (subchip->gpadc_page == NULL) {
833 ret = -ENODEV;
834 goto out;
835 }
836
837 subchip->regmap_gpadc = devm_regmap_init_i2c(subchip->gpadc_page,
838 &pm80x_regmap_config);
839 if (IS_ERR(subchip->regmap_gpadc)) {
840 ret = PTR_ERR(subchip->regmap_gpadc);
841 dev_err(chip->dev,
842 "Failed to allocate regmap_gpadc: %d\n", ret);
843 goto out;
844 }
845 i2c_set_clientdata(subchip->gpadc_page, chip);
846
847out:
848 return ret;
849}
850
851static void pm813_pages_exit(struct pm80x_chip *chip)
852{
853 struct pm80x_subchip *subchip;
854
855 subchip = chip->subchip;
856
857 if (subchip && subchip->power_page)
858 i2c_unregister_device(subchip->power_page);
859
860 if (subchip && subchip->gpadc_page)
861 i2c_unregister_device(subchip->gpadc_page);
862}
863
864static int device_813_init(struct pm80x_chip *chip,
865 struct pm80x_platform_data *pdata)
866{
867 int ret;
868 unsigned int val;
869 void __iomem *scs_base;
870
871 /*
872 * alarm wake up bit will be clear in device_irq_init(),
873 * read before that
874 */
875 ret = regmap_read(chip->regmap, PM813_RTC_CONTROL, &val);
876 if (ret < 0) {
877 dev_err(chip->dev, "Failed to read RTC register: %d\n", ret);
878 goto out;
879 }
880 if (val & PM813_ALARM_WAKEUP) {
881 if (pdata && pdata->rtc)
882 pdata->rtc->rtc_wakeup = 1;
883 }
884
885 ret = device_gpadc_init(chip, pdata);
886 if (ret < 0) {
887 dev_err(chip->dev, "[%s]Failed to init gpadc\n", __func__);
888 goto out;
889 }
890
891 chip->regmap_irq_chip = &pm813_irq_chip;
892
893 ret = device_irq_init_813(chip);
894 if (ret < 0) {
895 dev_err(chip->dev, "[%s]Failed to init PM813 irq\n", __func__);
896 goto out;
897 }
898
899 ret = device_onkey_init(chip, pdata);
900 if (ret) {
901 dev_err(chip->dev, "Failed to add onkey subdev\n");
902 goto out_dev;
903 }
904
905 if (cpu_is_asr1803() || cpu_is_asr1806() || cpu_is_asr1903()) {
906 if (cpu_is_asr1903())
907 scs_base = ASR1903_SCS_RTC_VIRT_BASE;
908 else
909 scs_base = SCS_RTC_VIRT_BASE;
910
911 is_scs_mode = (!readl(scs_base + SCS_DCS_MODE));
912
913 if (scs_int_active_high)
914 writel(readl(scs_base + SCS_RTC_CNTL) & (~SCS_RTC_ACTIVE_LOW),
915 scs_base + SCS_RTC_CNTL);
916 else
917 writel(readl(scs_base + SCS_RTC_CNTL) | (SCS_RTC_ACTIVE_LOW),
918 scs_base + SCS_RTC_CNTL);
919 writel(SCS_SYNC_RTC_CNRL, scs_base + SCS_RTC_SYNC_CFG);
920 udelay(SCR_RTC_SYNC_UDELAY);
921 writel(SCS_CLEAR_SYNC_DONE, scs_base + SCS_RTC_SYNC_CFG);
922 }
923
924 if (is_scs_mode)
925 ret = device_scs_rtc_init(chip, pdata);
926 else
927 ret = device_rtc_init(chip, pdata);
928 if (ret) {
929 dev_err(chip->dev, "Failed to add rtc subdev\n");
930 goto out;
931 }
932
933 ret = device_regulator_init(chip, pdata);
934 if (ret) {
935 dev_err(chip->dev, "Failed to add regulators subdev\n");
936 goto out;
937 }
938
939 ret = device_bat_init(chip, pdata);
940 if (ret) {
941 dev_err(chip->dev, "Failed to add bat subdev\n");
942 goto out;
943 }
944
945 ret = device_dvc_init(chip, pdata);
946 if (ret)
947 dev_warn(chip->dev, "Failed to add dvc subdev\n");
948
949 if (is_scs_mode)
950 ret = device_scs_usb_init(chip, pdata);
951 else
952 ret = device_usb_init(chip, pdata);
953 if (ret)
954 dev_warn(chip->dev, "Failed to add usb subdev\n");
955
956 ret = device_debug_init(chip);
957 if (ret) {
958 dev_err(chip->dev, "failed to add debug subdev\n");
959 goto out_dev;
960 }
961
962 ret = device_wdt_init(chip);
963 if (ret) {
964 dev_err(chip->dev, "failed to add wdt subdev\n");
965 goto out_dev;
966 }
967
968#ifdef CONFIG_PAPI_88PM80X
969 ret = device_papi_init(chip);
970 if (ret) {
971 dev_err(chip->dev, "Failed to add papi subdev\n");
972 goto out;
973 }
974#endif
975 return 0;
976out_dev:
977 mfd_remove_devices(chip->dev);
978 device_irq_exit_813(chip);
979out:
980 return ret;
981}
982
983static void parse_powerup_log(struct pm80x_chip *chip)
984{
985 int powerup, bit;
986 char *powerup_name[7] = {
987 "ONKEY_WAKEUP ",
988 "EXTON1_WAKEUP ",
989 "EXTON2_WAKEUP ",
990 "BAT_WAKEUP ",
991 "RTC_ALARM_WAKEUP",
992 "FAULT_WAKEUP ",
993 "IVBUS_DET_WAKEUP"
994 };
995
996 /*power up log*/
997 regmap_read(chip->regmap, PM813_POWER_UP_LOG, &powerup);
998 dev_info(chip->dev, "Powerup log 0x%x: 0x%x\n",
999 PM813_POWER_UP_LOG, powerup);
1000 printk(KERN_DEBUG " -------------------------------\n");
1001 printk(KERN_DEBUG "| name(power up) | status |\n");
1002 printk(KERN_DEBUG "|--------------------|----------|\n");
1003 for (bit = 0; bit < 7; bit++)
1004 printk(KERN_DEBUG "| %s | %x |\n",
1005 powerup_name[bit], (powerup >> bit) & 1);
1006 printk(KERN_DEBUG " -------------------------------\n");
1007
1008 /* keep globals for external usage */
1009 chip->powerup = powerup;
1010}
1011
1012static void parse_powerdown_log(struct pm80x_chip *chip)
1013{
1014 int powerdown1, powerdown2, bit;
1015
1016 char *powerdown1_name[8] = {
1017 "OVER_TEMP ",
1018 "UV_VSYS1 ",
1019 "SW_PDOWN ",
1020 "SYSEN_EVENT ",
1021 "WD ",
1022 "LONG_ONKEY",
1023 "OV_VSYS ",
1024 "RTC_RESET "
1025 };
1026 char *powerdown2_name[5] = {
1027 "HYB_DONE ",
1028 "UV_VSYS2 ",
1029 "HW_RESET ",
1030 "PGOOD_PDOWN",
1031 "LONKEY_RTC "
1032 };
1033
1034 /*power down log1*/
1035 if (CHIP_PM813S_A1_ID == chip->chip_id
1036 || CHIP_PM813S_A0_ID == chip->chip_id) {
1037 regmap_read(chip->regmap, PM813S_RTC_SPAREE, &powerdown1);
1038 regmap_write(chip->regmap, PM813S_RTC_SPAREE, 0x0);
1039 } else {
1040 regmap_read(chip->regmap, PM813_POWER_DOWN_LOG1, &powerdown1);
1041 }
1042 dev_info(chip->dev, "PowerDW Log1 0x%x: 0x%x\n",
1043 PM813_POWER_DOWN_LOG1, powerdown1);
1044 printk(KERN_DEBUG " -------------------------------\n");
1045 printk(KERN_DEBUG "| name(power down1) | status |\n");
1046 printk(KERN_DEBUG "|--------------------|----------|\n");
1047 for (bit = 0; bit < 8; bit++)
1048 printk(KERN_DEBUG "| %s | %x |\n",
1049 powerdown1_name[bit], (powerdown1 >> bit) & 1);
1050 printk(KERN_DEBUG " -------------------------------\n");
1051
1052 /*power down log2*/
1053 if (CHIP_PM813S_A1_ID == chip->chip_id
1054 || CHIP_PM813S_A0_ID == chip->chip_id) {
1055 regmap_read(chip->regmap, PM813S_RTC_SPAREF, &powerdown1);
1056 regmap_write(chip->regmap, PM813S_RTC_SPAREF, 0x0);
1057 } else {
1058 regmap_read(chip->regmap, PM813_POWER_DOWN_LOG2, &powerdown2);
1059 }
1060 dev_info(chip->dev, "PowerDW Log2 0x%x: 0x%x\n",
1061 PM813_POWER_DOWN_LOG2, powerdown2);
1062 printk(KERN_DEBUG " -------------------------------\n");
1063 printk(KERN_DEBUG "| name(power down2) | status |\n");
1064 printk(KERN_DEBUG "|--------------------|----------|\n");
1065 for (bit = 0; bit < 5; bit++)
1066 printk(KERN_DEBUG "| %s | %x |\n",
1067 powerdown2_name[bit], (powerdown2 >> bit) & 1);
1068 printk(KERN_DEBUG " -------------------------------\n");
1069
1070 /* write to clear */
1071 regmap_write(chip->regmap, PM813_POWER_DOWN_LOG1, 0xFF);
1072 regmap_write(chip->regmap, PM813_POWER_DOWN_LOG2, 0xFF);
1073
1074 /* mask reserved bits and sleep indication */
1075 powerdown2 &= 0x1E;
1076
1077 /* keep globals for external usage */
1078 chip->powerdown1 = powerdown1;
1079 chip->powerdown2 = powerdown2;
1080}
1081
1082static int pm813_init_config(struct pm80x_chip *chip, struct device_node *np)
1083{
1084 int data;
1085 if (!chip || !chip->regmap || !chip->subchip
1086 || !chip->subchip->regmap_power) {
1087 pr_err("%s:chip is not availiable!\n", __func__);
1088 return -EINVAL;
1089 }
1090
1091 /*base page:reg 0xd0.7 = 1 32kHZ generated from XO */
1092 regmap_read(chip->regmap, PM813_RTC_CONTROL, &data);
1093 if (is_scs_mode) {
1094 pr_info("is_scs_mode: true\n");
1095 data &= ~(1 << 7);
1096 } else {
1097 pr_info("is_scs_mode: false\n");
1098 data |= (1 << 7);
1099 }
1100 regmap_write(chip->regmap, PM813_RTC_CONTROL, data);
1101
1102 regmap_read(chip->regmap, PM813_RTC_MISC4, &data);
1103 data &= ~(0x3 << 2);
1104 if (!is_scs_mode)
1105 data |= (0x1 << 2);
1106 regmap_write(chip->regmap, PM813_RTC_MISC4, data);
1107
1108 /* Enable voltage change in pmic, POWER_HOLD = 1 */
1109 regmap_read(chip->regmap, PM813_WAKEUP1, &data);
1110 data |= (1 << 7);
1111 regmap_write(chip->regmap, PM813_WAKEUP1, data);
1112
1113 /*
1114 * Enable buck sleep mode.
1115 * But disable buck2 sleep mode here since it's for ddr/emmc, which
1116 * is sensitive to the voltage and the chip may have latency before
1117 * enter power save mode.
1118 */
1119 regmap_update_bits(chip->subchip->regmap_power, PM813_BUCK_SLP1,
1120 (0x3 << 3), (0x2 << 3));
1121 regmap_update_bits(chip->subchip->regmap_power, PM813_BUCK_SLP3,
1122 (0x3 << 3), (0x2 << 3));
1123
1124 /* set XO cap for B0+ chips */
1125 regmap_read(chip->regmap, PM813_RTC_MISC13, &data);
1126 data &= ~(0x7 << 5);
1127 data |= (0x3 << 5);
1128 regmap_write(chip->regmap, PM813_RTC_MISC13, data);
1129
1130 /* enable use_xo for none-A0 chips */
1131 regmap_read(chip->regmap, PM813_RTC_MISC14, &data);
1132 if (is_scs_mode)
1133 data &= ~(0x1 << 2);
1134 else
1135 data |= (0x1 << 2);
1136 regmap_write(chip->regmap, PM813_RTC_MISC14, data);
1137
1138 /* clear DVCFPWM for all chip revisions */
1139 regmap_read(chip->subchip->regmap_power, PM813_BUCK1_REG_15_8, &data);
1140 data &= ~(0x1 << 7);
1141 /* set RC1 for B0 */
1142 data |= (0x1 << 4);
1143 regmap_write(chip->subchip->regmap_power, PM813_BUCK1_REG_15_8, data);
1144
1145 /* dump power up log */
1146 parse_powerup_log(chip);
1147 parse_powerdown_log(chip);
1148 return 0;
1149}
1150
1151static int pm813_dt_init(struct device_node *np,
1152 struct device *dev,
1153 struct pm80x_platform_data *pdata)
1154{
1155 pdata->irq_mode =
1156 !of_property_read_bool(np, "asr,pm813-irq-write-clear");
1157 pdata->batt_det =
1158 of_property_read_bool(np, "asr,pm813-battery-detection");
1159
1160 scs_int_active_high =
1161 of_property_read_bool(np, "scs-int-active-high");
1162 return 0;
1163}
1164
1165static int pm813_probe(struct i2c_client *client,
1166 const struct i2c_device_id *id)
1167{
1168 int ret = 0;
1169 struct pm80x_chip *chip;
1170 struct pm80x_platform_data *pdata = client->dev.platform_data;
1171 struct device_node *node = client->dev.of_node;
1172 struct pm80x_subchip *subchip;
1173
1174 if (IS_ENABLED(CONFIG_OF)) {
1175 if (!pdata) {
1176 pdata = devm_kzalloc(&client->dev,
1177 sizeof(*pdata), GFP_KERNEL);
1178 if (!pdata)
1179 return -ENOMEM;
1180 }
1181 ret = pm813_dt_init(node, &client->dev, pdata);
1182 if (ret)
1183 return ret;
1184 } else if (!pdata) {
1185 return -EINVAL;
1186 }
1187
1188 /*
1189 * RTC in pmic can run even the core is powered off, and user can set
1190 * alarm in RTC. When the alarm is time out, the PMIC will power up
1191 * the core, and the whole system will boot up. When PMIC driver is
1192 * probed, it will read out some register to find out whether this
1193 * boot is caused by RTC timeout or not, and it need pass this
1194 * information to RTC driver.
1195 * So we need rtc platform data to be existed to pass this information.
1196 */
1197 if (!pdata->rtc) {
1198 pdata->rtc = devm_kzalloc(&client->dev,
1199 sizeof(*(pdata->rtc)), GFP_KERNEL);
1200 if (!pdata->rtc)
1201 return -ENOMEM;
1202 }
1203
1204 ret = pm80x_init(client);
1205 if (ret) {
1206 dev_err(&client->dev, "PM813_init fail\n");
1207 goto out_init;
1208 }
1209
1210 chip = i2c_get_clientdata(client);
1211
1212 if (chip->type != CHIP_PM813) {
1213 dev_err(&client->dev, "PM813 not present\n");
1214 ret = -ENODEV;
1215 goto out_init;
1216 }
1217
1218 /* init subchip for PM813 */
1219 subchip =
1220 devm_kzalloc(&client->dev, sizeof(struct pm80x_subchip),
1221 GFP_KERNEL);
1222 if (!subchip) {
1223 ret = -ENOMEM;
1224 goto err_subchip_alloc;
1225 }
1226
1227 /* PM813 has 2 addtional pages to support power and gpadc. */
1228 subchip->power_page_addr = client->addr + 1;
1229 subchip->gpadc_page_addr = client->addr + 2;
1230 chip->subchip = subchip;
1231
1232 ret = pm813_pages_init(chip);
1233 if (ret) {
1234 dev_err(&client->dev, "PM813_pages_init failed!\n");
1235 goto err_page_init;
1236 }
1237
1238 ret = device_813_init(chip, pdata);
1239 if (ret) {
1240 dev_err(chip->dev, "Failed to initialize 88PM813 devices\n");
1241 goto err_device_init;
1242 }
1243
1244 if (pdata && pdata->plat_config)
1245 pdata->plat_config(chip, pdata);
1246
1247 pm813_init_config(chip, NULL);
1248
1249 if (!pm80x_chip_g)
1250 pm80x_chip_g = chip;
1251 pm_power_off = pm813_sw_poweroff;
1252 pm813_is_probed = true;
1253
1254 return 0;
1255
1256err_device_init:
1257 pm813_pages_exit(chip);
1258err_page_init:
1259err_subchip_alloc:
1260 pm80x_deinit();
1261out_init:
1262 return ret;
1263}
1264
1265static int pm813_remove(struct i2c_client *client)
1266{
1267 struct pm80x_chip *chip = i2c_get_clientdata(client);
1268
1269 mfd_remove_devices(chip->dev);
1270 device_irq_exit_813(chip);
1271
1272 pm813_pages_exit(chip);
1273 pm80x_deinit();
1274 pm80x_chip_g = NULL;
1275
1276 return 0;
1277}
1278
1279static struct i2c_driver pm813_driver = {
1280 .driver = {
1281 .name = "ASRPM813",
1282 .owner = THIS_MODULE,
1283 .pm = &pm80x_pm_ops,
1284 .of_match_table = of_match_ptr(pm80x_dt_ids),
1285 },
1286 .probe = pm813_probe,
1287 .remove = pm813_remove,
1288 .id_table = pm80x_id_table,
1289};
1290
1291static int __init pm813_i2c_init(void)
1292{
1293 return i2c_add_driver(&pm813_driver);
1294}
1295subsys_initcall(pm813_i2c_init);
1296
1297static void __exit pm813_i2c_exit(void)
1298{
1299 i2c_del_driver(&pm813_driver);
1300}
1301module_exit(pm813_i2c_exit);
1302
1303MODULE_DESCRIPTION("PMIC Driver for ASR PM813");
1304MODULE_LICENSE("GPL");