| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Intel MIC Platform Software Stack (MPSS) |
| 4 | * |
| 5 | * Copyright(c) 2013 Intel Corporation. |
| 6 | * |
| 7 | * Intel MIC driver. |
| 8 | */ |
| 9 | #ifndef __MIC_DEV_H__ |
| 10 | #define __MIC_DEV_H__ |
| 11 | |
| 12 | /* The maximum number of MIC devices supported in a single host system. */ |
| 13 | #define MIC_MAX_NUM_DEVS 128 |
| 14 | |
| 15 | /** |
| 16 | * enum mic_hw_family - The hardware family to which a device belongs. |
| 17 | */ |
| 18 | enum mic_hw_family { |
| 19 | MIC_FAMILY_X100 = 0, |
| 20 | MIC_FAMILY_X200, |
| 21 | MIC_FAMILY_UNKNOWN, |
| 22 | MIC_FAMILY_LAST |
| 23 | }; |
| 24 | |
| 25 | /** |
| 26 | * struct mic_mw - MIC memory window |
| 27 | * |
| 28 | * @pa: Base physical address. |
| 29 | * @va: Base ioremap'd virtual address. |
| 30 | * @len: Size of the memory window. |
| 31 | */ |
| 32 | struct mic_mw { |
| 33 | phys_addr_t pa; |
| 34 | void __iomem *va; |
| 35 | resource_size_t len; |
| 36 | }; |
| 37 | |
| 38 | /* |
| 39 | * Scratch pad register offsets used by the host to communicate |
| 40 | * device page DMA address to the card. |
| 41 | */ |
| 42 | #define MIC_DPLO_SPAD 14 |
| 43 | #define MIC_DPHI_SPAD 15 |
| 44 | |
| 45 | /* |
| 46 | * These values are supposed to be in the config_change field of the |
| 47 | * device page when the host sends a config change interrupt to the card. |
| 48 | */ |
| 49 | #define MIC_VIRTIO_PARAM_DEV_REMOVE 0x1 |
| 50 | #define MIC_VIRTIO_PARAM_CONFIG_CHANGED 0x2 |
| 51 | |
| 52 | /* Maximum number of DMA channels */ |
| 53 | #define MIC_MAX_DMA_CHAN 4 |
| 54 | |
| 55 | #endif |