blob: 6458dbd6c631a0c09fa3180304346c8e6aacf866 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/* Copyright (C) 2018 Microchip Technology Inc. */
3
4#include <linux/module.h>
5#include <linux/pci.h>
6#include <linux/netdevice.h>
7#include <linux/etherdevice.h>
8#include <linux/crc32.h>
9#include <linux/microchipphy.h>
10#include <linux/net_tstamp.h>
11#include <linux/phy.h>
12#include <linux/rtnetlink.h>
13#include <linux/iopoll.h>
14#include <linux/crc16.h>
15#include "lan743x_main.h"
16#include "lan743x_ethtool.h"
17
18static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
19{
20 pci_release_selected_regions(adapter->pdev,
21 pci_select_bars(adapter->pdev,
22 IORESOURCE_MEM));
23 pci_disable_device(adapter->pdev);
24}
25
26static int lan743x_pci_init(struct lan743x_adapter *adapter,
27 struct pci_dev *pdev)
28{
29 unsigned long bars = 0;
30 int ret;
31
32 adapter->pdev = pdev;
33 ret = pci_enable_device_mem(pdev);
34 if (ret)
35 goto return_error;
36
37 netif_info(adapter, probe, adapter->netdev,
38 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
39 pdev->vendor, pdev->device);
40 bars = pci_select_bars(pdev, IORESOURCE_MEM);
41 if (!test_bit(0, &bars))
42 goto disable_device;
43
44 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
45 if (ret)
46 goto disable_device;
47
48 pci_set_master(pdev);
49 return 0;
50
51disable_device:
52 pci_disable_device(adapter->pdev);
53
54return_error:
55 return ret;
56}
57
58u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
59{
60 return ioread32(&adapter->csr.csr_address[offset]);
61}
62
63void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
64 u32 data)
65{
66 iowrite32(data, &adapter->csr.csr_address[offset]);
67}
68
69#define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
70
71static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
72{
73 u32 data;
74
75 data = lan743x_csr_read(adapter, HW_CFG);
76 data |= HW_CFG_LRST_;
77 lan743x_csr_write(adapter, HW_CFG, data);
78
79 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
80 !(data & HW_CFG_LRST_), 100000, 10000000);
81}
82
83static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter,
84 int offset, u32 bit_mask,
85 int target_value, int udelay_min,
86 int udelay_max, int count)
87{
88 u32 data;
89
90 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data,
91 target_value == !!(data & bit_mask),
92 udelay_max, udelay_min * count);
93}
94
95static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
96 int offset, u32 bit_mask,
97 int target_value, int usleep_min,
98 int usleep_max, int count)
99{
100 u32 data;
101
102 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
103 target_value == ((data & bit_mask) ? 1 : 0),
104 usleep_max, usleep_min * count);
105}
106
107static int lan743x_csr_init(struct lan743x_adapter *adapter)
108{
109 struct lan743x_csr *csr = &adapter->csr;
110 resource_size_t bar_start, bar_length;
111 int result;
112
113 bar_start = pci_resource_start(adapter->pdev, 0);
114 bar_length = pci_resource_len(adapter->pdev, 0);
115 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
116 bar_start, bar_length);
117 if (!csr->csr_address) {
118 result = -ENOMEM;
119 goto clean_up;
120 }
121
122 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
123 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
124 netif_info(adapter, probe, adapter->netdev,
125 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
126 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
127 FPGA_REV_GET_MINOR_(csr->fpga_rev));
128 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) {
129 result = -ENODEV;
130 goto clean_up;
131 }
132
133 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
134 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
135 case ID_REV_CHIP_REV_A0_:
136 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
137 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
138 break;
139 case ID_REV_CHIP_REV_B0_:
140 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
141 break;
142 }
143
144 result = lan743x_csr_light_reset(adapter);
145 if (result)
146 goto clean_up;
147 return 0;
148clean_up:
149 return result;
150}
151
152static void lan743x_intr_software_isr(void *context)
153{
154 struct lan743x_adapter *adapter = context;
155 struct lan743x_intr *intr = &adapter->intr;
156 u32 int_sts;
157
158 int_sts = lan743x_csr_read(adapter, INT_STS);
159 if (int_sts & INT_BIT_SW_GP_) {
160 /* disable the interrupt to prevent repeated re-triggering */
161 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
162 intr->software_isr_flag = 1;
163 }
164}
165
166static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
167{
168 struct lan743x_tx *tx = context;
169 struct lan743x_adapter *adapter = tx->adapter;
170 bool enable_flag = true;
171
172 lan743x_csr_read(adapter, INT_EN_SET);
173 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
174 lan743x_csr_write(adapter, INT_EN_CLR,
175 INT_BIT_DMA_TX_(tx->channel_number));
176 }
177
178 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
179 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
180 u32 dmac_int_sts;
181 u32 dmac_int_en;
182
183 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
184 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
185 else
186 dmac_int_sts = ioc_bit;
187 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
188 dmac_int_en = lan743x_csr_read(adapter,
189 DMAC_INT_EN_SET);
190 else
191 dmac_int_en = ioc_bit;
192
193 dmac_int_en &= ioc_bit;
194 dmac_int_sts &= dmac_int_en;
195 if (dmac_int_sts & ioc_bit) {
196 napi_schedule(&tx->napi);
197 enable_flag = false;/* poll func will enable later */
198 }
199 }
200
201 if (enable_flag)
202 /* enable isr */
203 lan743x_csr_write(adapter, INT_EN_SET,
204 INT_BIT_DMA_TX_(tx->channel_number));
205}
206
207static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
208{
209 struct lan743x_rx *rx = context;
210 struct lan743x_adapter *adapter = rx->adapter;
211 bool enable_flag = true;
212
213 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
214 lan743x_csr_write(adapter, INT_EN_CLR,
215 INT_BIT_DMA_RX_(rx->channel_number));
216 }
217
218 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
219 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
220 u32 dmac_int_sts;
221 u32 dmac_int_en;
222
223 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
224 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
225 else
226 dmac_int_sts = rx_frame_bit;
227 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
228 dmac_int_en = lan743x_csr_read(adapter,
229 DMAC_INT_EN_SET);
230 else
231 dmac_int_en = rx_frame_bit;
232
233 dmac_int_en &= rx_frame_bit;
234 dmac_int_sts &= dmac_int_en;
235 if (dmac_int_sts & rx_frame_bit) {
236 napi_schedule(&rx->napi);
237 enable_flag = false;/* poll funct will enable later */
238 }
239 }
240
241 if (enable_flag) {
242 /* enable isr */
243 lan743x_csr_write(adapter, INT_EN_SET,
244 INT_BIT_DMA_RX_(rx->channel_number));
245 }
246}
247
248static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
249{
250 struct lan743x_adapter *adapter = context;
251 unsigned int channel;
252
253 if (int_sts & INT_BIT_ALL_RX_) {
254 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
255 channel++) {
256 u32 int_bit = INT_BIT_DMA_RX_(channel);
257
258 if (int_sts & int_bit) {
259 lan743x_rx_isr(&adapter->rx[channel],
260 int_bit, flags);
261 int_sts &= ~int_bit;
262 }
263 }
264 }
265 if (int_sts & INT_BIT_ALL_TX_) {
266 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS;
267 channel++) {
268 u32 int_bit = INT_BIT_DMA_TX_(channel);
269
270 if (int_sts & int_bit) {
271 lan743x_tx_isr(&adapter->tx[channel],
272 int_bit, flags);
273 int_sts &= ~int_bit;
274 }
275 }
276 }
277 if (int_sts & INT_BIT_ALL_OTHER_) {
278 if (int_sts & INT_BIT_SW_GP_) {
279 lan743x_intr_software_isr(adapter);
280 int_sts &= ~INT_BIT_SW_GP_;
281 }
282 if (int_sts & INT_BIT_1588_) {
283 lan743x_ptp_isr(adapter);
284 int_sts &= ~INT_BIT_1588_;
285 }
286 }
287 if (int_sts)
288 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
289}
290
291static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
292{
293 struct lan743x_vector *vector = ptr;
294 struct lan743x_adapter *adapter = vector->adapter;
295 irqreturn_t result = IRQ_NONE;
296 u32 int_enables;
297 u32 int_sts;
298
299 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
300 int_sts = lan743x_csr_read(adapter, INT_STS);
301 } else if (vector->flags &
302 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
303 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
304 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
305 } else {
306 /* use mask as implied status */
307 int_sts = vector->int_mask | INT_BIT_MAS_;
308 }
309
310 if (!(int_sts & INT_BIT_MAS_))
311 goto irq_done;
312
313 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
314 /* disable vector interrupt */
315 lan743x_csr_write(adapter,
316 INT_VEC_EN_CLR,
317 INT_VEC_EN_(vector->vector_index));
318
319 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
320 /* disable master interrupt */
321 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
322
323 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
324 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
325 } else {
326 /* use vector mask as implied enable mask */
327 int_enables = vector->int_mask;
328 }
329
330 int_sts &= int_enables;
331 int_sts &= vector->int_mask;
332 if (int_sts) {
333 if (vector->handler) {
334 vector->handler(vector->context,
335 int_sts, vector->flags);
336 } else {
337 /* disable interrupts on this vector */
338 lan743x_csr_write(adapter, INT_EN_CLR,
339 vector->int_mask);
340 }
341 result = IRQ_HANDLED;
342 }
343
344 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
345 /* enable master interrupt */
346 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
347
348 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
349 /* enable vector interrupt */
350 lan743x_csr_write(adapter,
351 INT_VEC_EN_SET,
352 INT_VEC_EN_(vector->vector_index));
353irq_done:
354 return result;
355}
356
357static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
358{
359 struct lan743x_intr *intr = &adapter->intr;
360 int result = -ENODEV;
361 int timeout = 10;
362
363 intr->software_isr_flag = 0;
364
365 /* enable interrupt */
366 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
367
368 /* activate interrupt here */
369 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
370 while ((timeout > 0) && (!(intr->software_isr_flag))) {
371 usleep_range(1000, 20000);
372 timeout--;
373 }
374
375 if (intr->software_isr_flag)
376 result = 0;
377
378 /* disable interrupts */
379 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
380 return result;
381}
382
383static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
384 int vector_index, u32 flags,
385 u32 int_mask,
386 lan743x_vector_handler handler,
387 void *context)
388{
389 struct lan743x_vector *vector = &adapter->intr.vector_list
390 [vector_index];
391 int ret;
392
393 vector->adapter = adapter;
394 vector->flags = flags;
395 vector->vector_index = vector_index;
396 vector->int_mask = int_mask;
397 vector->handler = handler;
398 vector->context = context;
399
400 ret = request_irq(vector->irq,
401 lan743x_intr_entry_isr,
402 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
403 IRQF_SHARED : 0, DRIVER_NAME, vector);
404 if (ret) {
405 vector->handler = NULL;
406 vector->context = NULL;
407 vector->int_mask = 0;
408 vector->flags = 0;
409 }
410 return ret;
411}
412
413static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
414 int vector_index)
415{
416 struct lan743x_vector *vector = &adapter->intr.vector_list
417 [vector_index];
418
419 free_irq(vector->irq, vector);
420 vector->handler = NULL;
421 vector->context = NULL;
422 vector->int_mask = 0;
423 vector->flags = 0;
424}
425
426static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
427 u32 int_mask)
428{
429 int index;
430
431 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
432 if (adapter->intr.vector_list[index].int_mask & int_mask)
433 return adapter->intr.vector_list[index].flags;
434 }
435 return 0;
436}
437
438static void lan743x_intr_close(struct lan743x_adapter *adapter)
439{
440 struct lan743x_intr *intr = &adapter->intr;
441 int index = 0;
442
443 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
444 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
445
446 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) {
447 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
448 lan743x_intr_unregister_isr(adapter, index);
449 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
450 }
451 }
452
453 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
454 pci_disable_msi(adapter->pdev);
455 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
456 }
457
458 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
459 pci_disable_msix(adapter->pdev);
460 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
461 }
462}
463
464static int lan743x_intr_open(struct lan743x_adapter *adapter)
465{
466 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT];
467 struct lan743x_intr *intr = &adapter->intr;
468 u32 int_vec_en_auto_clr = 0;
469 u32 int_vec_map0 = 0;
470 u32 int_vec_map1 = 0;
471 int ret = -ENODEV;
472 int index = 0;
473 u32 flags = 0;
474
475 intr->number_of_vectors = 0;
476
477 /* Try to set up MSIX interrupts */
478 memset(&msix_entries[0], 0,
479 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT);
480 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++)
481 msix_entries[index].entry = index;
482 ret = pci_enable_msix_range(adapter->pdev,
483 msix_entries, 1,
484 1 + LAN743X_USED_TX_CHANNELS +
485 LAN743X_USED_RX_CHANNELS);
486
487 if (ret > 0) {
488 intr->flags |= INTR_FLAG_MSIX_ENABLED;
489 intr->number_of_vectors = ret;
490 intr->using_vectors = true;
491 for (index = 0; index < intr->number_of_vectors; index++)
492 intr->vector_list[index].irq = msix_entries
493 [index].vector;
494 netif_info(adapter, ifup, adapter->netdev,
495 "using MSIX interrupts, number of vectors = %d\n",
496 intr->number_of_vectors);
497 }
498
499 /* If MSIX failed try to setup using MSI interrupts */
500 if (!intr->number_of_vectors) {
501 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
502 if (!pci_enable_msi(adapter->pdev)) {
503 intr->flags |= INTR_FLAG_MSI_ENABLED;
504 intr->number_of_vectors = 1;
505 intr->using_vectors = true;
506 intr->vector_list[0].irq =
507 adapter->pdev->irq;
508 netif_info(adapter, ifup, adapter->netdev,
509 "using MSI interrupts, number of vectors = %d\n",
510 intr->number_of_vectors);
511 }
512 }
513 }
514
515 /* If MSIX, and MSI failed, setup using legacy interrupt */
516 if (!intr->number_of_vectors) {
517 intr->number_of_vectors = 1;
518 intr->using_vectors = false;
519 intr->vector_list[0].irq = intr->irq;
520 netif_info(adapter, ifup, adapter->netdev,
521 "using legacy interrupts\n");
522 }
523
524 /* At this point we must have at least one irq */
525 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
526
527 /* map all interrupts to vector 0 */
528 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
529 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
530 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
531 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
532 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
533 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
534 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
535
536 if (intr->using_vectors) {
537 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
538 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
539 } else {
540 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
541 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
542 LAN743X_VECTOR_FLAG_IRQ_SHARED;
543 }
544
545 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
546 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
547 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
548 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
549 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
550 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
551 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
552 }
553
554 ret = lan743x_intr_register_isr(adapter, 0, flags,
555 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
556 INT_BIT_ALL_OTHER_,
557 lan743x_intr_shared_isr, adapter);
558 if (ret)
559 goto clean_up;
560 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
561
562 if (intr->using_vectors)
563 lan743x_csr_write(adapter, INT_VEC_EN_SET,
564 INT_VEC_EN_(0));
565
566 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
567 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
568 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
569 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
570 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
571 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
572 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
573 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
574 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
575 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
576 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
577 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
578 }
579
580 /* enable interrupts */
581 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
582 ret = lan743x_intr_test_isr(adapter);
583 if (ret)
584 goto clean_up;
585
586 if (intr->number_of_vectors > 1) {
587 int number_of_tx_vectors = intr->number_of_vectors - 1;
588
589 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS)
590 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS;
591 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
592 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
593 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
594 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
595 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
596 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
597
598 if (adapter->csr.flags &
599 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
600 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
601 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
602 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
603 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
604 }
605
606 for (index = 0; index < number_of_tx_vectors; index++) {
607 u32 int_bit = INT_BIT_DMA_TX_(index);
608 int vector = index + 1;
609
610 /* map TX interrupt to vector */
611 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
612 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
613
614 /* Remove TX interrupt from shared mask */
615 intr->vector_list[0].int_mask &= ~int_bit;
616 ret = lan743x_intr_register_isr(adapter, vector, flags,
617 int_bit, lan743x_tx_isr,
618 &adapter->tx[index]);
619 if (ret)
620 goto clean_up;
621 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
622 if (!(flags &
623 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
624 lan743x_csr_write(adapter, INT_VEC_EN_SET,
625 INT_VEC_EN_(vector));
626 }
627 }
628 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) {
629 int number_of_rx_vectors = intr->number_of_vectors -
630 LAN743X_USED_TX_CHANNELS - 1;
631
632 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
633 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
634
635 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
636 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
637 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
638 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
639 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
640 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
641
642 if (adapter->csr.flags &
643 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
644 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
645 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
646 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
647 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
648 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
649 }
650 for (index = 0; index < number_of_rx_vectors; index++) {
651 int vector = index + 1 + LAN743X_USED_TX_CHANNELS;
652 u32 int_bit = INT_BIT_DMA_RX_(index);
653
654 /* map RX interrupt to vector */
655 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
656 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
657 if (flags &
658 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
659 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
660 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
661 int_vec_en_auto_clr);
662 }
663
664 /* Remove RX interrupt from shared mask */
665 intr->vector_list[0].int_mask &= ~int_bit;
666 ret = lan743x_intr_register_isr(adapter, vector, flags,
667 int_bit, lan743x_rx_isr,
668 &adapter->rx[index]);
669 if (ret)
670 goto clean_up;
671 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
672
673 lan743x_csr_write(adapter, INT_VEC_EN_SET,
674 INT_VEC_EN_(vector));
675 }
676 }
677 return 0;
678
679clean_up:
680 lan743x_intr_close(adapter);
681 return ret;
682}
683
684static int lan743x_dp_write(struct lan743x_adapter *adapter,
685 u32 select, u32 addr, u32 length, u32 *buf)
686{
687 u32 dp_sel;
688 int i;
689
690 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_,
691 1, 40, 100, 100))
692 return -EIO;
693 dp_sel = lan743x_csr_read(adapter, DP_SEL);
694 dp_sel &= ~DP_SEL_MASK_;
695 dp_sel |= select;
696 lan743x_csr_write(adapter, DP_SEL, dp_sel);
697
698 for (i = 0; i < length; i++) {
699 lan743x_csr_write(adapter, DP_ADDR, addr + i);
700 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
701 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
702 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL,
703 DP_SEL_DPRDY_,
704 1, 40, 100, 100))
705 return -EIO;
706 }
707
708 return 0;
709}
710
711static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
712{
713 u32 ret;
714
715 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
716 MAC_MII_ACC_PHY_ADDR_MASK_;
717 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
718 MAC_MII_ACC_MIIRINDA_MASK_;
719
720 if (read)
721 ret |= MAC_MII_ACC_MII_READ_;
722 else
723 ret |= MAC_MII_ACC_MII_WRITE_;
724 ret |= MAC_MII_ACC_MII_BUSY_;
725
726 return ret;
727}
728
729static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
730{
731 u32 data;
732
733 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
734 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
735}
736
737static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index)
738{
739 struct lan743x_adapter *adapter = bus->priv;
740 u32 val, mii_access;
741 int ret;
742
743 /* comfirm MII not busy */
744 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
745 if (ret < 0)
746 return ret;
747
748 /* set the address, index & direction (read from PHY) */
749 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
750 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
751 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
752 if (ret < 0)
753 return ret;
754
755 val = lan743x_csr_read(adapter, MAC_MII_DATA);
756 return (int)(val & 0xFFFF);
757}
758
759static int lan743x_mdiobus_write(struct mii_bus *bus,
760 int phy_id, int index, u16 regval)
761{
762 struct lan743x_adapter *adapter = bus->priv;
763 u32 val, mii_access;
764 int ret;
765
766 /* confirm MII not busy */
767 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
768 if (ret < 0)
769 return ret;
770 val = (u32)regval;
771 lan743x_csr_write(adapter, MAC_MII_DATA, val);
772
773 /* set the address, index & direction (write to PHY) */
774 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
775 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
776 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
777 return ret;
778}
779
780static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
781 u8 *addr)
782{
783 u32 addr_lo, addr_hi;
784
785 addr_lo = addr[0] |
786 addr[1] << 8 |
787 addr[2] << 16 |
788 addr[3] << 24;
789 addr_hi = addr[4] |
790 addr[5] << 8;
791 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
792 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
793
794 ether_addr_copy(adapter->mac_address, addr);
795 netif_info(adapter, drv, adapter->netdev,
796 "MAC address set to %pM\n", addr);
797}
798
799static int lan743x_mac_init(struct lan743x_adapter *adapter)
800{
801 bool mac_address_valid = true;
802 struct net_device *netdev;
803 u32 mac_addr_hi = 0;
804 u32 mac_addr_lo = 0;
805 u32 data;
806
807 netdev = adapter->netdev;
808
809 /* setup auto duplex, and speed detection */
810 data = lan743x_csr_read(adapter, MAC_CR);
811 data |= MAC_CR_ADD_ | MAC_CR_ASD_;
812 data |= MAC_CR_CNTR_RST_;
813 lan743x_csr_write(adapter, MAC_CR, data);
814
815 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
816 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
817 adapter->mac_address[0] = mac_addr_lo & 0xFF;
818 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
819 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
820 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
821 adapter->mac_address[4] = mac_addr_hi & 0xFF;
822 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
823
824 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
825 mac_addr_lo == 0xFFFFFFFF) {
826 mac_address_valid = false;
827 } else if (!is_valid_ether_addr(adapter->mac_address)) {
828 mac_address_valid = false;
829 }
830
831 if (!mac_address_valid)
832 eth_random_addr(adapter->mac_address);
833 lan743x_mac_set_address(adapter, adapter->mac_address);
834 ether_addr_copy(netdev->dev_addr, adapter->mac_address);
835 return 0;
836}
837
838static int lan743x_mac_open(struct lan743x_adapter *adapter)
839{
840 int ret = 0;
841 u32 temp;
842
843 temp = lan743x_csr_read(adapter, MAC_RX);
844 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
845 temp = lan743x_csr_read(adapter, MAC_TX);
846 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
847 return ret;
848}
849
850static void lan743x_mac_close(struct lan743x_adapter *adapter)
851{
852 u32 temp;
853
854 temp = lan743x_csr_read(adapter, MAC_TX);
855 temp &= ~MAC_TX_TXEN_;
856 lan743x_csr_write(adapter, MAC_TX, temp);
857 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
858 1, 1000, 20000, 100);
859
860 temp = lan743x_csr_read(adapter, MAC_RX);
861 temp &= ~MAC_RX_RXEN_;
862 lan743x_csr_write(adapter, MAC_RX, temp);
863 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
864 1, 1000, 20000, 100);
865}
866
867static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
868 bool tx_enable, bool rx_enable)
869{
870 u32 flow_setting = 0;
871
872 /* set maximum pause time because when fifo space frees
873 * up a zero value pause frame will be sent to release the pause
874 */
875 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
876 if (tx_enable)
877 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
878 if (rx_enable)
879 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
880 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
881}
882
883static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
884{
885 int enabled = 0;
886 u32 mac_rx = 0;
887
888 mac_rx = lan743x_csr_read(adapter, MAC_RX);
889 if (mac_rx & MAC_RX_RXEN_) {
890 enabled = 1;
891 if (mac_rx & MAC_RX_RXD_) {
892 lan743x_csr_write(adapter, MAC_RX, mac_rx);
893 mac_rx &= ~MAC_RX_RXD_;
894 }
895 mac_rx &= ~MAC_RX_RXEN_;
896 lan743x_csr_write(adapter, MAC_RX, mac_rx);
897 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
898 1, 1000, 20000, 100);
899 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
900 }
901
902 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
903 mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) &
904 MAC_RX_MAX_SIZE_MASK_);
905 lan743x_csr_write(adapter, MAC_RX, mac_rx);
906
907 if (enabled) {
908 mac_rx |= MAC_RX_RXEN_;
909 lan743x_csr_write(adapter, MAC_RX, mac_rx);
910 }
911 return 0;
912}
913
914/* PHY */
915static int lan743x_phy_reset(struct lan743x_adapter *adapter)
916{
917 u32 data;
918
919 /* Only called with in probe, and before mdiobus_register */
920
921 data = lan743x_csr_read(adapter, PMT_CTL);
922 data |= PMT_CTL_ETH_PHY_RST_;
923 lan743x_csr_write(adapter, PMT_CTL, data);
924
925 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
926 (!(data & PMT_CTL_ETH_PHY_RST_) &&
927 (data & PMT_CTL_READY_)),
928 50000, 1000000);
929}
930
931static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter,
932 u16 local_adv, u16 remote_adv)
933{
934 struct lan743x_phy *phy = &adapter->phy;
935 u8 cap;
936
937 if (phy->fc_autoneg)
938 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv);
939 else
940 cap = phy->fc_request_control;
941
942 lan743x_mac_flow_ctrl_set_enables(adapter,
943 cap & FLOW_CTRL_TX,
944 cap & FLOW_CTRL_RX);
945}
946
947static int lan743x_phy_init(struct lan743x_adapter *adapter)
948{
949 return lan743x_phy_reset(adapter);
950}
951
952static void lan743x_phy_link_status_change(struct net_device *netdev)
953{
954 struct lan743x_adapter *adapter = netdev_priv(netdev);
955 struct phy_device *phydev = netdev->phydev;
956
957 phy_print_status(phydev);
958 if (phydev->state == PHY_RUNNING) {
959 int remote_advertisement = 0;
960 int local_advertisement = 0;
961
962 local_advertisement =
963 linkmode_adv_to_mii_adv_t(phydev->advertising);
964 remote_advertisement =
965 linkmode_adv_to_mii_adv_t(phydev->lp_advertising);
966
967 lan743x_phy_update_flowcontrol(adapter, local_advertisement,
968 remote_advertisement);
969 lan743x_ptp_update_latency(adapter, phydev->speed);
970 }
971}
972
973static void lan743x_phy_close(struct lan743x_adapter *adapter)
974{
975 struct net_device *netdev = adapter->netdev;
976
977 phy_stop(netdev->phydev);
978 phy_disconnect(netdev->phydev);
979 netdev->phydev = NULL;
980}
981
982static int lan743x_phy_open(struct lan743x_adapter *adapter)
983{
984 struct lan743x_phy *phy = &adapter->phy;
985 struct phy_device *phydev;
986 struct net_device *netdev;
987 int ret = -EIO;
988
989 netdev = adapter->netdev;
990 phydev = phy_find_first(adapter->mdiobus);
991 if (!phydev)
992 goto return_error;
993
994 ret = phy_connect_direct(netdev, phydev,
995 lan743x_phy_link_status_change,
996 PHY_INTERFACE_MODE_GMII);
997 if (ret)
998 goto return_error;
999
1000 /* MAC doesn't support 1000T Half */
1001 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
1002
1003 /* support both flow controls */
1004 phy_support_asym_pause(phydev);
1005 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX);
1006 phy->fc_autoneg = phydev->autoneg;
1007
1008 phy_start(phydev);
1009 phy_start_aneg(phydev);
1010 return 0;
1011
1012return_error:
1013 return ret;
1014}
1015
1016static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1017{
1018 lan743x_csr_write(adapter, RFE_RSS_CFG,
1019 RFE_RSS_CFG_UDP_IPV6_EX_ |
1020 RFE_RSS_CFG_TCP_IPV6_EX_ |
1021 RFE_RSS_CFG_IPV6_EX_ |
1022 RFE_RSS_CFG_UDP_IPV6_ |
1023 RFE_RSS_CFG_TCP_IPV6_ |
1024 RFE_RSS_CFG_IPV6_ |
1025 RFE_RSS_CFG_UDP_IPV4_ |
1026 RFE_RSS_CFG_TCP_IPV4_ |
1027 RFE_RSS_CFG_IPV4_ |
1028 RFE_RSS_CFG_VALID_HASH_BITS_ |
1029 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1030 RFE_RSS_CFG_RSS_HASH_STORE_ |
1031 RFE_RSS_CFG_RSS_ENABLE_);
1032}
1033
1034static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1035{
1036 u8 *mac_addr;
1037 u32 mac_addr_hi = 0;
1038 u32 mac_addr_lo = 0;
1039
1040 /* Add mac address to perfect Filter */
1041 mac_addr = adapter->mac_address;
1042 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1043 (((u32)(mac_addr[1])) << 8) |
1044 (((u32)(mac_addr[2])) << 16) |
1045 (((u32)(mac_addr[3])) << 24));
1046 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1047 (((u32)(mac_addr[5])) << 8));
1048
1049 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1050 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1051 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1052}
1053
1054static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1055{
1056 struct net_device *netdev = adapter->netdev;
1057 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1058 u32 rfctl;
1059 u32 data;
1060
1061 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1062 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1063 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1064 rfctl |= RFE_CTL_AB_;
1065 if (netdev->flags & IFF_PROMISC) {
1066 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1067 } else {
1068 if (netdev->flags & IFF_ALLMULTI)
1069 rfctl |= RFE_CTL_AM_;
1070 }
1071
1072 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1073 if (netdev_mc_count(netdev)) {
1074 struct netdev_hw_addr *ha;
1075 int i;
1076
1077 rfctl |= RFE_CTL_DA_PERFECT_;
1078 i = 1;
1079 netdev_for_each_mc_addr(ha, netdev) {
1080 /* set first 32 into Perfect Filter */
1081 if (i < 33) {
1082 lan743x_csr_write(adapter,
1083 RFE_ADDR_FILT_HI(i), 0);
1084 data = ha->addr[3];
1085 data = ha->addr[2] | (data << 8);
1086 data = ha->addr[1] | (data << 8);
1087 data = ha->addr[0] | (data << 8);
1088 lan743x_csr_write(adapter,
1089 RFE_ADDR_FILT_LO(i), data);
1090 data = ha->addr[5];
1091 data = ha->addr[4] | (data << 8);
1092 data |= RFE_ADDR_FILT_HI_VALID_;
1093 lan743x_csr_write(adapter,
1094 RFE_ADDR_FILT_HI(i), data);
1095 } else {
1096 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1097 23) & 0x1FF;
1098 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1099 rfctl |= RFE_CTL_MCAST_HASH_;
1100 }
1101 i++;
1102 }
1103 }
1104
1105 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1106 DP_SEL_VHF_VLAN_LEN,
1107 DP_SEL_VHF_HASH_LEN, hash_table);
1108 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1109}
1110
1111static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1112{
1113 u32 data = 0;
1114
1115 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1116 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1117 0, 1000, 20000, 100);
1118 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1119 case DMA_DESCRIPTOR_SPACING_16:
1120 data = DMAC_CFG_MAX_DSPACE_16_;
1121 break;
1122 case DMA_DESCRIPTOR_SPACING_32:
1123 data = DMAC_CFG_MAX_DSPACE_32_;
1124 break;
1125 case DMA_DESCRIPTOR_SPACING_64:
1126 data = DMAC_CFG_MAX_DSPACE_64_;
1127 break;
1128 case DMA_DESCRIPTOR_SPACING_128:
1129 data = DMAC_CFG_MAX_DSPACE_128_;
1130 break;
1131 default:
1132 return -EPERM;
1133 }
1134 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1135 data |= DMAC_CFG_COAL_EN_;
1136 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1137 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1138 lan743x_csr_write(adapter, DMAC_CFG, data);
1139 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1140 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1141 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1142 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1143 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1144 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1145 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1146 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1147 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1148 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1149 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1150 return 0;
1151}
1152
1153static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1154 int tx_channel)
1155{
1156 u32 dmac_cmd = 0;
1157
1158 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1159 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1160 DMAC_CMD_START_T_(tx_channel)),
1161 (dmac_cmd &
1162 DMAC_CMD_STOP_T_(tx_channel)));
1163}
1164
1165static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1166 int tx_channel)
1167{
1168 int timeout = 100;
1169 int result = 0;
1170
1171 while (timeout &&
1172 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1173 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1174 usleep_range(1000, 20000);
1175 timeout--;
1176 }
1177 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1178 result = -ENODEV;
1179 return result;
1180}
1181
1182static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1183 int rx_channel)
1184{
1185 u32 dmac_cmd = 0;
1186
1187 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1188 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1189 DMAC_CMD_START_R_(rx_channel)),
1190 (dmac_cmd &
1191 DMAC_CMD_STOP_R_(rx_channel)));
1192}
1193
1194static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1195 int rx_channel)
1196{
1197 int timeout = 100;
1198 int result = 0;
1199
1200 while (timeout &&
1201 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1202 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1203 usleep_range(1000, 20000);
1204 timeout--;
1205 }
1206 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1207 result = -ENODEV;
1208 return result;
1209}
1210
1211static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1212 int descriptor_index, bool cleanup)
1213{
1214 struct lan743x_tx_buffer_info *buffer_info = NULL;
1215 struct lan743x_tx_descriptor *descriptor = NULL;
1216 u32 descriptor_type = 0;
1217 bool ignore_sync;
1218
1219 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1220 buffer_info = &tx->buffer_info[descriptor_index];
1221 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1222 goto done;
1223
1224 descriptor_type = (descriptor->data0) &
1225 TX_DESC_DATA0_DTYPE_MASK_;
1226 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1227 goto clean_up_data_descriptor;
1228 else
1229 goto clear_active;
1230
1231clean_up_data_descriptor:
1232 if (buffer_info->dma_ptr) {
1233 if (buffer_info->flags &
1234 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1235 dma_unmap_page(&tx->adapter->pdev->dev,
1236 buffer_info->dma_ptr,
1237 buffer_info->buffer_length,
1238 DMA_TO_DEVICE);
1239 } else {
1240 dma_unmap_single(&tx->adapter->pdev->dev,
1241 buffer_info->dma_ptr,
1242 buffer_info->buffer_length,
1243 DMA_TO_DEVICE);
1244 }
1245 buffer_info->dma_ptr = 0;
1246 buffer_info->buffer_length = 0;
1247 }
1248 if (!buffer_info->skb)
1249 goto clear_active;
1250
1251 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1252 dev_kfree_skb_any(buffer_info->skb);
1253 goto clear_skb;
1254 }
1255
1256 if (cleanup) {
1257 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1258 dev_kfree_skb_any(buffer_info->skb);
1259 } else {
1260 ignore_sync = (buffer_info->flags &
1261 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1262 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1263 buffer_info->skb, ignore_sync);
1264 }
1265
1266clear_skb:
1267 buffer_info->skb = NULL;
1268
1269clear_active:
1270 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1271
1272done:
1273 memset(buffer_info, 0, sizeof(*buffer_info));
1274 memset(descriptor, 0, sizeof(*descriptor));
1275}
1276
1277static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1278{
1279 return ((++index) % tx->ring_size);
1280}
1281
1282static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1283{
1284 while ((*tx->head_cpu_ptr) != (tx->last_head)) {
1285 lan743x_tx_release_desc(tx, tx->last_head, false);
1286 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1287 }
1288}
1289
1290static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1291{
1292 u32 original_head = 0;
1293
1294 original_head = tx->last_head;
1295 do {
1296 lan743x_tx_release_desc(tx, tx->last_head, true);
1297 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1298 } while (tx->last_head != original_head);
1299 memset(tx->ring_cpu_ptr, 0,
1300 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1301 memset(tx->buffer_info, 0,
1302 sizeof(*tx->buffer_info) * (tx->ring_size));
1303}
1304
1305static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1306 struct sk_buff *skb)
1307{
1308 int result = 1; /* 1 for the main skb buffer */
1309 int nr_frags = 0;
1310
1311 if (skb_is_gso(skb))
1312 result++; /* requires an extension descriptor */
1313 nr_frags = skb_shinfo(skb)->nr_frags;
1314 result += nr_frags; /* 1 for each fragment buffer */
1315 return result;
1316}
1317
1318static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1319{
1320 int last_head = tx->last_head;
1321 int last_tail = tx->last_tail;
1322
1323 if (last_tail >= last_head)
1324 return tx->ring_size - last_tail + last_head - 1;
1325 else
1326 return last_head - last_tail - 1;
1327}
1328
1329void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1330 bool enable_timestamping,
1331 bool enable_onestep_sync)
1332{
1333 if (enable_timestamping)
1334 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1335 else
1336 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1337 if (enable_onestep_sync)
1338 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1339 else
1340 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1341}
1342
1343static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1344 unsigned char *first_buffer,
1345 unsigned int first_buffer_length,
1346 unsigned int frame_length,
1347 bool time_stamp,
1348 bool check_sum)
1349{
1350 /* called only from within lan743x_tx_xmit_frame.
1351 * assuming tx->ring_lock has already been acquired.
1352 */
1353 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1354 struct lan743x_tx_buffer_info *buffer_info = NULL;
1355 struct lan743x_adapter *adapter = tx->adapter;
1356 struct device *dev = &adapter->pdev->dev;
1357 dma_addr_t dma_ptr;
1358
1359 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1360 tx->frame_first = tx->last_tail;
1361 tx->frame_tail = tx->frame_first;
1362
1363 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1364 buffer_info = &tx->buffer_info[tx->frame_tail];
1365 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1366 DMA_TO_DEVICE);
1367 if (dma_mapping_error(dev, dma_ptr))
1368 return -ENOMEM;
1369
1370 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
1371 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
1372 tx_descriptor->data3 = (frame_length << 16) &
1373 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
1374
1375 buffer_info->skb = NULL;
1376 buffer_info->dma_ptr = dma_ptr;
1377 buffer_info->buffer_length = first_buffer_length;
1378 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1379
1380 tx->frame_data0 = (first_buffer_length &
1381 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1382 TX_DESC_DATA0_DTYPE_DATA_ |
1383 TX_DESC_DATA0_FS_ |
1384 TX_DESC_DATA0_FCS_;
1385 if (time_stamp)
1386 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1387
1388 if (check_sum)
1389 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1390 TX_DESC_DATA0_IPE_ |
1391 TX_DESC_DATA0_TPE_;
1392
1393 /* data0 will be programmed in one of other frame assembler functions */
1394 return 0;
1395}
1396
1397static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1398 unsigned int frame_length,
1399 int nr_frags)
1400{
1401 /* called only from within lan743x_tx_xmit_frame.
1402 * assuming tx->ring_lock has already been acquired.
1403 */
1404 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1405 struct lan743x_tx_buffer_info *buffer_info = NULL;
1406
1407 /* wrap up previous descriptor */
1408 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1409 if (nr_frags <= 0) {
1410 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1411 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1412 }
1413 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1414 tx_descriptor->data0 = tx->frame_data0;
1415
1416 /* move to next descriptor */
1417 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1418 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1419 buffer_info = &tx->buffer_info[tx->frame_tail];
1420
1421 /* add extension descriptor */
1422 tx_descriptor->data1 = 0;
1423 tx_descriptor->data2 = 0;
1424 tx_descriptor->data3 = 0;
1425
1426 buffer_info->skb = NULL;
1427 buffer_info->dma_ptr = 0;
1428 buffer_info->buffer_length = 0;
1429 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1430
1431 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1432 TX_DESC_DATA0_DTYPE_EXT_ |
1433 TX_DESC_DATA0_EXT_LSO_;
1434
1435 /* data0 will be programmed in one of other frame assembler functions */
1436}
1437
1438static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1439 const skb_frag_t *fragment,
1440 unsigned int frame_length)
1441{
1442 /* called only from within lan743x_tx_xmit_frame
1443 * assuming tx->ring_lock has already been acquired
1444 */
1445 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1446 struct lan743x_tx_buffer_info *buffer_info = NULL;
1447 struct lan743x_adapter *adapter = tx->adapter;
1448 struct device *dev = &adapter->pdev->dev;
1449 unsigned int fragment_length = 0;
1450 dma_addr_t dma_ptr;
1451
1452 fragment_length = skb_frag_size(fragment);
1453 if (!fragment_length)
1454 return 0;
1455
1456 /* wrap up previous descriptor */
1457 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1458 tx_descriptor->data0 = tx->frame_data0;
1459
1460 /* move to next descriptor */
1461 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1462 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1463 buffer_info = &tx->buffer_info[tx->frame_tail];
1464 dma_ptr = skb_frag_dma_map(dev, fragment,
1465 0, fragment_length,
1466 DMA_TO_DEVICE);
1467 if (dma_mapping_error(dev, dma_ptr)) {
1468 int desc_index;
1469
1470 /* cleanup all previously setup descriptors */
1471 desc_index = tx->frame_first;
1472 while (desc_index != tx->frame_tail) {
1473 lan743x_tx_release_desc(tx, desc_index, true);
1474 desc_index = lan743x_tx_next_index(tx, desc_index);
1475 }
1476 dma_wmb();
1477 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1478 tx->frame_first = 0;
1479 tx->frame_data0 = 0;
1480 tx->frame_tail = 0;
1481 return -ENOMEM;
1482 }
1483
1484 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr);
1485 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr);
1486 tx_descriptor->data3 = (frame_length << 16) &
1487 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_;
1488
1489 buffer_info->skb = NULL;
1490 buffer_info->dma_ptr = dma_ptr;
1491 buffer_info->buffer_length = fragment_length;
1492 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1493 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
1494
1495 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1496 TX_DESC_DATA0_DTYPE_DATA_ |
1497 TX_DESC_DATA0_FCS_;
1498
1499 /* data0 will be programmed in one of other frame assembler functions */
1500 return 0;
1501}
1502
1503static void lan743x_tx_frame_end(struct lan743x_tx *tx,
1504 struct sk_buff *skb,
1505 bool time_stamp,
1506 bool ignore_sync)
1507{
1508 /* called only from within lan743x_tx_xmit_frame
1509 * assuming tx->ring_lock has already been acquired
1510 */
1511 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1512 struct lan743x_tx_buffer_info *buffer_info = NULL;
1513 struct lan743x_adapter *adapter = tx->adapter;
1514 u32 tx_tail_flags = 0;
1515
1516 /* wrap up previous descriptor */
1517 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
1518 TX_DESC_DATA0_DTYPE_DATA_) {
1519 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1520 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1521 }
1522
1523 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1524 buffer_info = &tx->buffer_info[tx->frame_tail];
1525 buffer_info->skb = skb;
1526 if (time_stamp)
1527 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
1528 if (ignore_sync)
1529 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
1530
1531 tx_descriptor->data0 = tx->frame_data0;
1532 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1533 tx->last_tail = tx->frame_tail;
1534
1535 dma_wmb();
1536
1537 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
1538 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
1539 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
1540 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
1541 TX_TAIL_SET_TOP_INT_EN_;
1542
1543 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1544 tx_tail_flags | tx->frame_tail);
1545 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1546}
1547
1548static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
1549 struct sk_buff *skb)
1550{
1551 int required_number_of_descriptors = 0;
1552 unsigned int start_frame_length = 0;
1553 unsigned int frame_length = 0;
1554 unsigned int head_length = 0;
1555 unsigned long irq_flags = 0;
1556 bool do_timestamp = false;
1557 bool ignore_sync = false;
1558 int nr_frags = 0;
1559 bool gso = false;
1560 int j;
1561
1562 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
1563
1564 spin_lock_irqsave(&tx->ring_lock, irq_flags);
1565 if (required_number_of_descriptors >
1566 lan743x_tx_get_avail_desc(tx)) {
1567 if (required_number_of_descriptors > (tx->ring_size - 1)) {
1568 dev_kfree_skb_irq(skb);
1569 } else {
1570 /* save to overflow buffer */
1571 tx->overflow_skb = skb;
1572 netif_stop_queue(tx->adapter->netdev);
1573 }
1574 goto unlock;
1575 }
1576
1577 /* space available, transmit skb */
1578 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1579 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
1580 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
1581 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1582 do_timestamp = true;
1583 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
1584 ignore_sync = true;
1585 }
1586 head_length = skb_headlen(skb);
1587 frame_length = skb_pagelen(skb);
1588 nr_frags = skb_shinfo(skb)->nr_frags;
1589 start_frame_length = frame_length;
1590 gso = skb_is_gso(skb);
1591 if (gso) {
1592 start_frame_length = max(skb_shinfo(skb)->gso_size,
1593 (unsigned short)8);
1594 }
1595
1596 if (lan743x_tx_frame_start(tx,
1597 skb->data, head_length,
1598 start_frame_length,
1599 do_timestamp,
1600 skb->ip_summed == CHECKSUM_PARTIAL)) {
1601 dev_kfree_skb_irq(skb);
1602 goto unlock;
1603 }
1604
1605 if (gso)
1606 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
1607
1608 if (nr_frags <= 0)
1609 goto finish;
1610
1611 for (j = 0; j < nr_frags; j++) {
1612 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
1613
1614 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
1615 /* upon error no need to call
1616 * lan743x_tx_frame_end
1617 * frame assembler clean up was performed inside
1618 * lan743x_tx_frame_add_fragment
1619 */
1620 dev_kfree_skb_irq(skb);
1621 goto unlock;
1622 }
1623 }
1624
1625finish:
1626 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
1627
1628unlock:
1629 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
1630 return NETDEV_TX_OK;
1631}
1632
1633static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
1634{
1635 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
1636 struct lan743x_adapter *adapter = tx->adapter;
1637 bool start_transmitter = false;
1638 unsigned long irq_flags = 0;
1639 u32 ioc_bit = 0;
1640
1641 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
1642 lan743x_csr_read(adapter, DMAC_INT_STS);
1643 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
1644 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
1645 spin_lock_irqsave(&tx->ring_lock, irq_flags);
1646
1647 /* clean up tx ring */
1648 lan743x_tx_release_completed_descriptors(tx);
1649 if (netif_queue_stopped(adapter->netdev)) {
1650 if (tx->overflow_skb) {
1651 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <=
1652 lan743x_tx_get_avail_desc(tx))
1653 start_transmitter = true;
1654 } else {
1655 netif_wake_queue(adapter->netdev);
1656 }
1657 }
1658 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
1659
1660 if (start_transmitter) {
1661 /* space is now available, transmit overflow skb */
1662 lan743x_tx_xmit_frame(tx, tx->overflow_skb);
1663 tx->overflow_skb = NULL;
1664 netif_wake_queue(adapter->netdev);
1665 }
1666
1667 if (!napi_complete(napi))
1668 goto done;
1669
1670 /* enable isr */
1671 lan743x_csr_write(adapter, INT_EN_SET,
1672 INT_BIT_DMA_TX_(tx->channel_number));
1673 lan743x_csr_read(adapter, INT_STS);
1674
1675done:
1676 return 0;
1677}
1678
1679static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
1680{
1681 if (tx->head_cpu_ptr) {
1682 pci_free_consistent(tx->adapter->pdev,
1683 sizeof(*tx->head_cpu_ptr),
1684 (void *)(tx->head_cpu_ptr),
1685 tx->head_dma_ptr);
1686 tx->head_cpu_ptr = NULL;
1687 tx->head_dma_ptr = 0;
1688 }
1689 kfree(tx->buffer_info);
1690 tx->buffer_info = NULL;
1691
1692 if (tx->ring_cpu_ptr) {
1693 pci_free_consistent(tx->adapter->pdev,
1694 tx->ring_allocation_size,
1695 tx->ring_cpu_ptr,
1696 tx->ring_dma_ptr);
1697 tx->ring_allocation_size = 0;
1698 tx->ring_cpu_ptr = NULL;
1699 tx->ring_dma_ptr = 0;
1700 }
1701 tx->ring_size = 0;
1702}
1703
1704static int lan743x_tx_ring_init(struct lan743x_tx *tx)
1705{
1706 size_t ring_allocation_size = 0;
1707 void *cpu_ptr = NULL;
1708 dma_addr_t dma_ptr;
1709 int ret = -ENOMEM;
1710
1711 tx->ring_size = LAN743X_TX_RING_SIZE;
1712 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
1713 ret = -EINVAL;
1714 goto cleanup;
1715 }
1716 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
1717 DMA_BIT_MASK(64))) {
1718 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
1719 DMA_BIT_MASK(32))) {
1720 dev_warn(&tx->adapter->pdev->dev,
1721 "lan743x_: No suitable DMA available\n");
1722 ret = -ENOMEM;
1723 goto cleanup;
1724 }
1725 }
1726 ring_allocation_size = ALIGN(tx->ring_size *
1727 sizeof(struct lan743x_tx_descriptor),
1728 PAGE_SIZE);
1729 dma_ptr = 0;
1730 cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
1731 ring_allocation_size, &dma_ptr);
1732 if (!cpu_ptr) {
1733 ret = -ENOMEM;
1734 goto cleanup;
1735 }
1736
1737 tx->ring_allocation_size = ring_allocation_size;
1738 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
1739 tx->ring_dma_ptr = dma_ptr;
1740
1741 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL);
1742 if (!cpu_ptr) {
1743 ret = -ENOMEM;
1744 goto cleanup;
1745 }
1746 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
1747 dma_ptr = 0;
1748 cpu_ptr = pci_zalloc_consistent(tx->adapter->pdev,
1749 sizeof(*tx->head_cpu_ptr), &dma_ptr);
1750 if (!cpu_ptr) {
1751 ret = -ENOMEM;
1752 goto cleanup;
1753 }
1754
1755 tx->head_cpu_ptr = cpu_ptr;
1756 tx->head_dma_ptr = dma_ptr;
1757 if (tx->head_dma_ptr & 0x3) {
1758 ret = -ENOMEM;
1759 goto cleanup;
1760 }
1761
1762 return 0;
1763
1764cleanup:
1765 lan743x_tx_ring_cleanup(tx);
1766 return ret;
1767}
1768
1769static void lan743x_tx_close(struct lan743x_tx *tx)
1770{
1771 struct lan743x_adapter *adapter = tx->adapter;
1772
1773 lan743x_csr_write(adapter,
1774 DMAC_CMD,
1775 DMAC_CMD_STOP_T_(tx->channel_number));
1776 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
1777
1778 lan743x_csr_write(adapter,
1779 DMAC_INT_EN_CLR,
1780 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
1781 lan743x_csr_write(adapter, INT_EN_CLR,
1782 INT_BIT_DMA_TX_(tx->channel_number));
1783 napi_disable(&tx->napi);
1784 netif_napi_del(&tx->napi);
1785
1786 lan743x_csr_write(adapter, FCT_TX_CTL,
1787 FCT_TX_CTL_DIS_(tx->channel_number));
1788 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
1789 FCT_TX_CTL_EN_(tx->channel_number),
1790 0, 1000, 20000, 100);
1791
1792 lan743x_tx_release_all_descriptors(tx);
1793
1794 if (tx->overflow_skb) {
1795 dev_kfree_skb(tx->overflow_skb);
1796 tx->overflow_skb = NULL;
1797 }
1798
1799 lan743x_tx_ring_cleanup(tx);
1800}
1801
1802static int lan743x_tx_open(struct lan743x_tx *tx)
1803{
1804 struct lan743x_adapter *adapter = NULL;
1805 u32 data = 0;
1806 int ret;
1807
1808 adapter = tx->adapter;
1809 ret = lan743x_tx_ring_init(tx);
1810 if (ret)
1811 return ret;
1812
1813 /* initialize fifo */
1814 lan743x_csr_write(adapter, FCT_TX_CTL,
1815 FCT_TX_CTL_RESET_(tx->channel_number));
1816 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
1817 FCT_TX_CTL_RESET_(tx->channel_number),
1818 0, 1000, 20000, 100);
1819
1820 /* enable fifo */
1821 lan743x_csr_write(adapter, FCT_TX_CTL,
1822 FCT_TX_CTL_EN_(tx->channel_number));
1823
1824 /* reset tx channel */
1825 lan743x_csr_write(adapter, DMAC_CMD,
1826 DMAC_CMD_TX_SWR_(tx->channel_number));
1827 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
1828 DMAC_CMD_TX_SWR_(tx->channel_number),
1829 0, 1000, 20000, 100);
1830
1831 /* Write TX_BASE_ADDR */
1832 lan743x_csr_write(adapter,
1833 TX_BASE_ADDRH(tx->channel_number),
1834 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
1835 lan743x_csr_write(adapter,
1836 TX_BASE_ADDRL(tx->channel_number),
1837 DMA_ADDR_LOW32(tx->ring_dma_ptr));
1838
1839 /* Write TX_CFG_B */
1840 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
1841 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
1842 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
1843 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1844 data |= TX_CFG_B_TDMABL_512_;
1845 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
1846
1847 /* Write TX_CFG_A */
1848 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
1849 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
1850 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
1851 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
1852 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
1853 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
1854 }
1855 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
1856
1857 /* Write TX_HEAD_WRITEBACK_ADDR */
1858 lan743x_csr_write(adapter,
1859 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
1860 DMA_ADDR_HIGH32(tx->head_dma_ptr));
1861 lan743x_csr_write(adapter,
1862 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
1863 DMA_ADDR_LOW32(tx->head_dma_ptr));
1864
1865 /* set last head */
1866 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
1867
1868 /* write TX_TAIL */
1869 tx->last_tail = 0;
1870 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1871 (u32)(tx->last_tail));
1872 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
1873 INT_BIT_DMA_TX_
1874 (tx->channel_number));
1875 netif_tx_napi_add(adapter->netdev,
1876 &tx->napi, lan743x_tx_napi_poll,
1877 tx->ring_size - 1);
1878 napi_enable(&tx->napi);
1879
1880 data = 0;
1881 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
1882 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
1883 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
1884 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
1885 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
1886 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
1887 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
1888 data |= TX_CFG_C_TX_INT_EN_R2C_;
1889 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
1890
1891 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
1892 lan743x_csr_write(adapter, INT_EN_SET,
1893 INT_BIT_DMA_TX_(tx->channel_number));
1894 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
1895 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
1896
1897 /* start dmac channel */
1898 lan743x_csr_write(adapter, DMAC_CMD,
1899 DMAC_CMD_START_T_(tx->channel_number));
1900 return 0;
1901}
1902
1903static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
1904{
1905 return ((++index) % rx->ring_size);
1906}
1907
1908static struct sk_buff *lan743x_rx_allocate_skb(struct lan743x_rx *rx, gfp_t gfp)
1909{
1910 int length = 0;
1911
1912 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
1913 return __netdev_alloc_skb(rx->adapter->netdev,
1914 length, gfp);
1915}
1916
1917static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
1918{
1919 /* update the tail once per 8 descriptors */
1920 if ((index & 7) == 7)
1921 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
1922 index);
1923}
1924
1925static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
1926 struct sk_buff *skb)
1927{
1928 struct lan743x_rx_buffer_info *buffer_info;
1929 struct lan743x_rx_descriptor *descriptor;
1930 int length = 0;
1931
1932 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING);
1933 descriptor = &rx->ring_cpu_ptr[index];
1934 buffer_info = &rx->buffer_info[index];
1935 buffer_info->skb = skb;
1936 if (!(buffer_info->skb))
1937 return -ENOMEM;
1938 buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev,
1939 buffer_info->skb->data,
1940 length,
1941 DMA_FROM_DEVICE);
1942 if (dma_mapping_error(&rx->adapter->pdev->dev,
1943 buffer_info->dma_ptr)) {
1944 buffer_info->dma_ptr = 0;
1945 return -ENOMEM;
1946 }
1947
1948 buffer_info->buffer_length = length;
1949 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
1950 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
1951 descriptor->data3 = 0;
1952 descriptor->data0 = (RX_DESC_DATA0_OWN_ |
1953 (length & RX_DESC_DATA0_BUF_LENGTH_MASK_));
1954 skb_reserve(buffer_info->skb, RX_HEAD_PADDING);
1955 lan743x_rx_update_tail(rx, index);
1956
1957 return 0;
1958}
1959
1960static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
1961{
1962 struct lan743x_rx_buffer_info *buffer_info;
1963 struct lan743x_rx_descriptor *descriptor;
1964
1965 descriptor = &rx->ring_cpu_ptr[index];
1966 buffer_info = &rx->buffer_info[index];
1967
1968 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr);
1969 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr);
1970 descriptor->data3 = 0;
1971 descriptor->data0 = (RX_DESC_DATA0_OWN_ |
1972 ((buffer_info->buffer_length) &
1973 RX_DESC_DATA0_BUF_LENGTH_MASK_));
1974 lan743x_rx_update_tail(rx, index);
1975}
1976
1977static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
1978{
1979 struct lan743x_rx_buffer_info *buffer_info;
1980 struct lan743x_rx_descriptor *descriptor;
1981
1982 descriptor = &rx->ring_cpu_ptr[index];
1983 buffer_info = &rx->buffer_info[index];
1984
1985 memset(descriptor, 0, sizeof(*descriptor));
1986
1987 if (buffer_info->dma_ptr) {
1988 dma_unmap_single(&rx->adapter->pdev->dev,
1989 buffer_info->dma_ptr,
1990 buffer_info->buffer_length,
1991 DMA_FROM_DEVICE);
1992 buffer_info->dma_ptr = 0;
1993 }
1994
1995 if (buffer_info->skb) {
1996 dev_kfree_skb(buffer_info->skb);
1997 buffer_info->skb = NULL;
1998 }
1999
2000 memset(buffer_info, 0, sizeof(*buffer_info));
2001}
2002
2003static int lan743x_rx_process_packet(struct lan743x_rx *rx)
2004{
2005 struct skb_shared_hwtstamps *hwtstamps = NULL;
2006 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2007 struct lan743x_rx_buffer_info *buffer_info;
2008 struct lan743x_rx_descriptor *descriptor;
2009 int current_head_index = -1;
2010 int extension_index = -1;
2011 int first_index = -1;
2012 int last_index = -1;
2013
2014 current_head_index = *rx->head_cpu_ptr;
2015 if (current_head_index < 0 || current_head_index >= rx->ring_size)
2016 goto done;
2017
2018 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2019 goto done;
2020
2021 if (rx->last_head != current_head_index) {
2022 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2023 if (descriptor->data0 & RX_DESC_DATA0_OWN_)
2024 goto done;
2025
2026 if (!(descriptor->data0 & RX_DESC_DATA0_FS_))
2027 goto done;
2028
2029 first_index = rx->last_head;
2030 if (descriptor->data0 & RX_DESC_DATA0_LS_) {
2031 last_index = rx->last_head;
2032 } else {
2033 int index;
2034
2035 index = lan743x_rx_next_index(rx, first_index);
2036 while (index != current_head_index) {
2037 descriptor = &rx->ring_cpu_ptr[index];
2038 if (descriptor->data0 & RX_DESC_DATA0_OWN_)
2039 goto done;
2040
2041 if (descriptor->data0 & RX_DESC_DATA0_LS_) {
2042 last_index = index;
2043 break;
2044 }
2045 index = lan743x_rx_next_index(rx, index);
2046 }
2047 }
2048 if (last_index >= 0) {
2049 descriptor = &rx->ring_cpu_ptr[last_index];
2050 if (descriptor->data0 & RX_DESC_DATA0_EXT_) {
2051 /* extension is expected to follow */
2052 int index = lan743x_rx_next_index(rx,
2053 last_index);
2054 if (index != current_head_index) {
2055 descriptor = &rx->ring_cpu_ptr[index];
2056 if (descriptor->data0 &
2057 RX_DESC_DATA0_OWN_) {
2058 goto done;
2059 }
2060 if (descriptor->data0 &
2061 RX_DESC_DATA0_EXT_) {
2062 extension_index = index;
2063 } else {
2064 goto done;
2065 }
2066 } else {
2067 /* extension is not yet available */
2068 /* prevent processing of this packet */
2069 first_index = -1;
2070 last_index = -1;
2071 }
2072 }
2073 }
2074 }
2075 if (first_index >= 0 && last_index >= 0) {
2076 int real_last_index = last_index;
2077 struct sk_buff *skb = NULL;
2078 u32 ts_sec = 0;
2079 u32 ts_nsec = 0;
2080
2081 /* packet is available */
2082 if (first_index == last_index) {
2083 /* single buffer packet */
2084 struct sk_buff *new_skb = NULL;
2085 int packet_length;
2086
2087 new_skb = lan743x_rx_allocate_skb(rx,
2088 GFP_ATOMIC | GFP_DMA);
2089 if (!new_skb) {
2090 /* failed to allocate next skb.
2091 * Memory is very low.
2092 * Drop this packet and reuse buffer.
2093 */
2094 lan743x_rx_reuse_ring_element(rx, first_index);
2095 goto process_extension;
2096 }
2097
2098 buffer_info = &rx->buffer_info[first_index];
2099 skb = buffer_info->skb;
2100 descriptor = &rx->ring_cpu_ptr[first_index];
2101
2102 /* unmap from dma */
2103 if (buffer_info->dma_ptr) {
2104 dma_unmap_single(&rx->adapter->pdev->dev,
2105 buffer_info->dma_ptr,
2106 buffer_info->buffer_length,
2107 DMA_FROM_DEVICE);
2108 buffer_info->dma_ptr = 0;
2109 buffer_info->buffer_length = 0;
2110 }
2111 buffer_info->skb = NULL;
2112 packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_
2113 (descriptor->data0);
2114 skb_put(skb, packet_length - 4);
2115 skb->protocol = eth_type_trans(skb,
2116 rx->adapter->netdev);
2117 lan743x_rx_init_ring_element(rx, first_index, new_skb);
2118 } else {
2119 int index = first_index;
2120
2121 /* multi buffer packet not supported */
2122 /* this should not happen since
2123 * buffers are allocated to be at least jumbo size
2124 */
2125
2126 /* clean up buffers */
2127 if (first_index <= last_index) {
2128 while ((index >= first_index) &&
2129 (index <= last_index)) {
2130 lan743x_rx_reuse_ring_element(rx,
2131 index);
2132 index = lan743x_rx_next_index(rx,
2133 index);
2134 }
2135 } else {
2136 while ((index >= first_index) ||
2137 (index <= last_index)) {
2138 lan743x_rx_reuse_ring_element(rx,
2139 index);
2140 index = lan743x_rx_next_index(rx,
2141 index);
2142 }
2143 }
2144 }
2145
2146process_extension:
2147 if (extension_index >= 0) {
2148 descriptor = &rx->ring_cpu_ptr[extension_index];
2149 buffer_info = &rx->buffer_info[extension_index];
2150
2151 ts_sec = descriptor->data1;
2152 ts_nsec = (descriptor->data2 &
2153 RX_DESC_DATA2_TS_NS_MASK_);
2154 lan743x_rx_reuse_ring_element(rx, extension_index);
2155 real_last_index = extension_index;
2156 }
2157
2158 if (!skb) {
2159 result = RX_PROCESS_RESULT_PACKET_DROPPED;
2160 goto move_forward;
2161 }
2162
2163 if (extension_index < 0)
2164 goto pass_packet_to_os;
2165 hwtstamps = skb_hwtstamps(skb);
2166 if (hwtstamps)
2167 hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec);
2168
2169pass_packet_to_os:
2170 /* pass packet to OS */
2171 napi_gro_receive(&rx->napi, skb);
2172 result = RX_PROCESS_RESULT_PACKET_RECEIVED;
2173
2174move_forward:
2175 /* push tail and head forward */
2176 rx->last_tail = real_last_index;
2177 rx->last_head = lan743x_rx_next_index(rx, real_last_index);
2178 }
2179done:
2180 return result;
2181}
2182
2183static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2184{
2185 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2186 struct lan743x_adapter *adapter = rx->adapter;
2187 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2188 u32 rx_tail_flags = 0;
2189 int count;
2190
2191 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2192 /* clear int status bit before reading packet */
2193 lan743x_csr_write(adapter, DMAC_INT_STS,
2194 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2195 }
2196 for (count = 0; count < weight; count++) {
2197 result = lan743x_rx_process_packet(rx);
2198 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2199 break;
2200 }
2201 rx->frame_count += count;
2202 if (count == weight || result == RX_PROCESS_RESULT_PACKET_RECEIVED)
2203 return weight;
2204
2205 if (!napi_complete_done(napi, count))
2206 return count;
2207
2208 /* re-arm interrupts, must write to rx tail on some chip variants */
2209 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2210 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2211 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2212 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2213 } else {
2214 lan743x_csr_write(adapter, INT_EN_SET,
2215 INT_BIT_DMA_RX_(rx->channel_number));
2216 }
2217
2218 if (rx_tail_flags)
2219 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2220 rx_tail_flags | rx->last_tail);
2221
2222 return count;
2223}
2224
2225static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2226{
2227 if (rx->buffer_info && rx->ring_cpu_ptr) {
2228 int index;
2229
2230 for (index = 0; index < rx->ring_size; index++)
2231 lan743x_rx_release_ring_element(rx, index);
2232 }
2233
2234 if (rx->head_cpu_ptr) {
2235 pci_free_consistent(rx->adapter->pdev,
2236 sizeof(*rx->head_cpu_ptr),
2237 rx->head_cpu_ptr,
2238 rx->head_dma_ptr);
2239 rx->head_cpu_ptr = NULL;
2240 rx->head_dma_ptr = 0;
2241 }
2242
2243 kfree(rx->buffer_info);
2244 rx->buffer_info = NULL;
2245
2246 if (rx->ring_cpu_ptr) {
2247 pci_free_consistent(rx->adapter->pdev,
2248 rx->ring_allocation_size,
2249 rx->ring_cpu_ptr,
2250 rx->ring_dma_ptr);
2251 rx->ring_allocation_size = 0;
2252 rx->ring_cpu_ptr = NULL;
2253 rx->ring_dma_ptr = 0;
2254 }
2255
2256 rx->ring_size = 0;
2257 rx->last_head = 0;
2258}
2259
2260static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2261{
2262 size_t ring_allocation_size = 0;
2263 dma_addr_t dma_ptr = 0;
2264 void *cpu_ptr = NULL;
2265 int ret = -ENOMEM;
2266 int index = 0;
2267
2268 rx->ring_size = LAN743X_RX_RING_SIZE;
2269 if (rx->ring_size <= 1) {
2270 ret = -EINVAL;
2271 goto cleanup;
2272 }
2273 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2274 ret = -EINVAL;
2275 goto cleanup;
2276 }
2277 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2278 DMA_BIT_MASK(64))) {
2279 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2280 DMA_BIT_MASK(32))) {
2281 dev_warn(&rx->adapter->pdev->dev,
2282 "lan743x_: No suitable DMA available\n");
2283 ret = -ENOMEM;
2284 goto cleanup;
2285 }
2286 }
2287 ring_allocation_size = ALIGN(rx->ring_size *
2288 sizeof(struct lan743x_rx_descriptor),
2289 PAGE_SIZE);
2290 dma_ptr = 0;
2291 cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
2292 ring_allocation_size, &dma_ptr);
2293 if (!cpu_ptr) {
2294 ret = -ENOMEM;
2295 goto cleanup;
2296 }
2297 rx->ring_allocation_size = ring_allocation_size;
2298 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2299 rx->ring_dma_ptr = dma_ptr;
2300
2301 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info),
2302 GFP_KERNEL);
2303 if (!cpu_ptr) {
2304 ret = -ENOMEM;
2305 goto cleanup;
2306 }
2307 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2308 dma_ptr = 0;
2309 cpu_ptr = pci_zalloc_consistent(rx->adapter->pdev,
2310 sizeof(*rx->head_cpu_ptr), &dma_ptr);
2311 if (!cpu_ptr) {
2312 ret = -ENOMEM;
2313 goto cleanup;
2314 }
2315
2316 rx->head_cpu_ptr = cpu_ptr;
2317 rx->head_dma_ptr = dma_ptr;
2318 if (rx->head_dma_ptr & 0x3) {
2319 ret = -ENOMEM;
2320 goto cleanup;
2321 }
2322
2323 rx->last_head = 0;
2324 for (index = 0; index < rx->ring_size; index++) {
2325 struct sk_buff *new_skb = lan743x_rx_allocate_skb(rx,
2326 GFP_KERNEL);
2327
2328 ret = lan743x_rx_init_ring_element(rx, index, new_skb);
2329 if (ret)
2330 goto cleanup;
2331 }
2332 return 0;
2333
2334cleanup:
2335 lan743x_rx_ring_cleanup(rx);
2336 return ret;
2337}
2338
2339static void lan743x_rx_close(struct lan743x_rx *rx)
2340{
2341 struct lan743x_adapter *adapter = rx->adapter;
2342
2343 lan743x_csr_write(adapter, FCT_RX_CTL,
2344 FCT_RX_CTL_DIS_(rx->channel_number));
2345 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2346 FCT_RX_CTL_EN_(rx->channel_number),
2347 0, 1000, 20000, 100);
2348
2349 lan743x_csr_write(adapter, DMAC_CMD,
2350 DMAC_CMD_STOP_R_(rx->channel_number));
2351 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2352
2353 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2354 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2355 lan743x_csr_write(adapter, INT_EN_CLR,
2356 INT_BIT_DMA_RX_(rx->channel_number));
2357 napi_disable(&rx->napi);
2358
2359 netif_napi_del(&rx->napi);
2360
2361 lan743x_rx_ring_cleanup(rx);
2362}
2363
2364static int lan743x_rx_open(struct lan743x_rx *rx)
2365{
2366 struct lan743x_adapter *adapter = rx->adapter;
2367 u32 data = 0;
2368 int ret;
2369
2370 rx->frame_count = 0;
2371 ret = lan743x_rx_ring_init(rx);
2372 if (ret)
2373 goto return_error;
2374
2375 netif_napi_add(adapter->netdev,
2376 &rx->napi, lan743x_rx_napi_poll,
2377 NAPI_POLL_WEIGHT);
2378
2379 lan743x_csr_write(adapter, DMAC_CMD,
2380 DMAC_CMD_RX_SWR_(rx->channel_number));
2381 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2382 DMAC_CMD_RX_SWR_(rx->channel_number),
2383 0, 1000, 20000, 100);
2384
2385 /* set ring base address */
2386 lan743x_csr_write(adapter,
2387 RX_BASE_ADDRH(rx->channel_number),
2388 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2389 lan743x_csr_write(adapter,
2390 RX_BASE_ADDRL(rx->channel_number),
2391 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2392
2393 /* set rx write back address */
2394 lan743x_csr_write(adapter,
2395 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2396 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2397 lan743x_csr_write(adapter,
2398 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2399 DMA_ADDR_LOW32(rx->head_dma_ptr));
2400 data = RX_CFG_A_RX_HP_WB_EN_;
2401 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2402 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2403 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2404 RX_CFG_A_RX_PF_THRES_SET_(16) |
2405 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2406 }
2407
2408 /* set RX_CFG_A */
2409 lan743x_csr_write(adapter,
2410 RX_CFG_A(rx->channel_number), data);
2411
2412 /* set RX_CFG_B */
2413 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2414 data &= ~RX_CFG_B_RX_PAD_MASK_;
2415 if (!RX_HEAD_PADDING)
2416 data |= RX_CFG_B_RX_PAD_0_;
2417 else
2418 data |= RX_CFG_B_RX_PAD_2_;
2419 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2420 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2421 data |= RX_CFG_B_TS_ALL_RX_;
2422 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2423 data |= RX_CFG_B_RDMABL_512_;
2424
2425 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2426 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2427 INT_BIT_DMA_RX_
2428 (rx->channel_number));
2429
2430 /* set RX_CFG_C */
2431 data = 0;
2432 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2433 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2434 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2435 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2436 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2437 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2438 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2439 data |= RX_CFG_C_RX_INT_EN_R2C_;
2440 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2441
2442 rx->last_tail = ((u32)(rx->ring_size - 1));
2443 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2444 rx->last_tail);
2445 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2446 if (rx->last_head) {
2447 ret = -EIO;
2448 goto napi_delete;
2449 }
2450
2451 napi_enable(&rx->napi);
2452
2453 lan743x_csr_write(adapter, INT_EN_SET,
2454 INT_BIT_DMA_RX_(rx->channel_number));
2455 lan743x_csr_write(adapter, DMAC_INT_STS,
2456 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2457 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2458 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2459 lan743x_csr_write(adapter, DMAC_CMD,
2460 DMAC_CMD_START_R_(rx->channel_number));
2461
2462 /* initialize fifo */
2463 lan743x_csr_write(adapter, FCT_RX_CTL,
2464 FCT_RX_CTL_RESET_(rx->channel_number));
2465 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2466 FCT_RX_CTL_RESET_(rx->channel_number),
2467 0, 1000, 20000, 100);
2468 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2469 FCT_FLOW_CTL_REQ_EN_ |
2470 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2471 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2472
2473 /* enable fifo */
2474 lan743x_csr_write(adapter, FCT_RX_CTL,
2475 FCT_RX_CTL_EN_(rx->channel_number));
2476 return 0;
2477
2478napi_delete:
2479 netif_napi_del(&rx->napi);
2480 lan743x_rx_ring_cleanup(rx);
2481
2482return_error:
2483 return ret;
2484}
2485
2486static int lan743x_netdev_close(struct net_device *netdev)
2487{
2488 struct lan743x_adapter *adapter = netdev_priv(netdev);
2489 int index;
2490
2491 lan743x_tx_close(&adapter->tx[0]);
2492
2493 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
2494 lan743x_rx_close(&adapter->rx[index]);
2495
2496 lan743x_ptp_close(adapter);
2497
2498 lan743x_phy_close(adapter);
2499
2500 lan743x_mac_close(adapter);
2501
2502 lan743x_intr_close(adapter);
2503
2504 return 0;
2505}
2506
2507static int lan743x_netdev_open(struct net_device *netdev)
2508{
2509 struct lan743x_adapter *adapter = netdev_priv(netdev);
2510 int index;
2511 int ret;
2512
2513 ret = lan743x_intr_open(adapter);
2514 if (ret)
2515 goto return_error;
2516
2517 ret = lan743x_mac_open(adapter);
2518 if (ret)
2519 goto close_intr;
2520
2521 ret = lan743x_phy_open(adapter);
2522 if (ret)
2523 goto close_mac;
2524
2525 ret = lan743x_ptp_open(adapter);
2526 if (ret)
2527 goto close_phy;
2528
2529 lan743x_rfe_open(adapter);
2530
2531 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2532 ret = lan743x_rx_open(&adapter->rx[index]);
2533 if (ret)
2534 goto close_rx;
2535 }
2536
2537 ret = lan743x_tx_open(&adapter->tx[0]);
2538 if (ret)
2539 goto close_rx;
2540
2541 return 0;
2542
2543close_rx:
2544 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2545 if (adapter->rx[index].ring_cpu_ptr)
2546 lan743x_rx_close(&adapter->rx[index]);
2547 }
2548 lan743x_ptp_close(adapter);
2549
2550close_phy:
2551 lan743x_phy_close(adapter);
2552
2553close_mac:
2554 lan743x_mac_close(adapter);
2555
2556close_intr:
2557 lan743x_intr_close(adapter);
2558
2559return_error:
2560 netif_warn(adapter, ifup, adapter->netdev,
2561 "Error opening LAN743x\n");
2562 return ret;
2563}
2564
2565static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
2566 struct net_device *netdev)
2567{
2568 struct lan743x_adapter *adapter = netdev_priv(netdev);
2569
2570 return lan743x_tx_xmit_frame(&adapter->tx[0], skb);
2571}
2572
2573static int lan743x_netdev_ioctl(struct net_device *netdev,
2574 struct ifreq *ifr, int cmd)
2575{
2576 if (!netif_running(netdev))
2577 return -EINVAL;
2578 if (cmd == SIOCSHWTSTAMP)
2579 return lan743x_ptp_ioctl(netdev, ifr, cmd);
2580 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
2581}
2582
2583static void lan743x_netdev_set_multicast(struct net_device *netdev)
2584{
2585 struct lan743x_adapter *adapter = netdev_priv(netdev);
2586
2587 lan743x_rfe_set_multicast(adapter);
2588}
2589
2590static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
2591{
2592 struct lan743x_adapter *adapter = netdev_priv(netdev);
2593 int ret = 0;
2594
2595 ret = lan743x_mac_set_mtu(adapter, new_mtu);
2596 if (!ret)
2597 netdev->mtu = new_mtu;
2598 return ret;
2599}
2600
2601static void lan743x_netdev_get_stats64(struct net_device *netdev,
2602 struct rtnl_link_stats64 *stats)
2603{
2604 struct lan743x_adapter *adapter = netdev_priv(netdev);
2605
2606 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
2607 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
2608 stats->rx_bytes = lan743x_csr_read(adapter,
2609 STAT_RX_UNICAST_BYTE_COUNT) +
2610 lan743x_csr_read(adapter,
2611 STAT_RX_BROADCAST_BYTE_COUNT) +
2612 lan743x_csr_read(adapter,
2613 STAT_RX_MULTICAST_BYTE_COUNT);
2614 stats->tx_bytes = lan743x_csr_read(adapter,
2615 STAT_TX_UNICAST_BYTE_COUNT) +
2616 lan743x_csr_read(adapter,
2617 STAT_TX_BROADCAST_BYTE_COUNT) +
2618 lan743x_csr_read(adapter,
2619 STAT_TX_MULTICAST_BYTE_COUNT);
2620 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
2621 lan743x_csr_read(adapter,
2622 STAT_RX_ALIGNMENT_ERRORS) +
2623 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
2624 lan743x_csr_read(adapter,
2625 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
2626 lan743x_csr_read(adapter,
2627 STAT_RX_OVERSIZE_FRAME_ERRORS);
2628 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
2629 lan743x_csr_read(adapter,
2630 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
2631 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
2632 stats->rx_dropped = lan743x_csr_read(adapter,
2633 STAT_RX_DROPPED_FRAMES);
2634 stats->tx_dropped = lan743x_csr_read(adapter,
2635 STAT_TX_EXCESSIVE_COLLISION);
2636 stats->multicast = lan743x_csr_read(adapter,
2637 STAT_RX_MULTICAST_FRAMES) +
2638 lan743x_csr_read(adapter,
2639 STAT_TX_MULTICAST_FRAMES);
2640 stats->collisions = lan743x_csr_read(adapter,
2641 STAT_TX_SINGLE_COLLISIONS) +
2642 lan743x_csr_read(adapter,
2643 STAT_TX_MULTIPLE_COLLISIONS) +
2644 lan743x_csr_read(adapter,
2645 STAT_TX_LATE_COLLISIONS);
2646}
2647
2648static int lan743x_netdev_set_mac_address(struct net_device *netdev,
2649 void *addr)
2650{
2651 struct lan743x_adapter *adapter = netdev_priv(netdev);
2652 struct sockaddr *sock_addr = addr;
2653 int ret;
2654
2655 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
2656 if (ret)
2657 return ret;
2658 ether_addr_copy(netdev->dev_addr, sock_addr->sa_data);
2659 lan743x_mac_set_address(adapter, sock_addr->sa_data);
2660 lan743x_rfe_update_mac_address(adapter);
2661 return 0;
2662}
2663
2664static const struct net_device_ops lan743x_netdev_ops = {
2665 .ndo_open = lan743x_netdev_open,
2666 .ndo_stop = lan743x_netdev_close,
2667 .ndo_start_xmit = lan743x_netdev_xmit_frame,
2668 .ndo_do_ioctl = lan743x_netdev_ioctl,
2669 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
2670 .ndo_change_mtu = lan743x_netdev_change_mtu,
2671 .ndo_get_stats64 = lan743x_netdev_get_stats64,
2672 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
2673};
2674
2675static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
2676{
2677 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
2678}
2679
2680static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
2681{
2682 mdiobus_unregister(adapter->mdiobus);
2683}
2684
2685static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
2686{
2687 unregister_netdev(adapter->netdev);
2688
2689 lan743x_mdiobus_cleanup(adapter);
2690 lan743x_hardware_cleanup(adapter);
2691 lan743x_pci_cleanup(adapter);
2692}
2693
2694static int lan743x_hardware_init(struct lan743x_adapter *adapter,
2695 struct pci_dev *pdev)
2696{
2697 struct lan743x_tx *tx;
2698 int index;
2699 int ret;
2700
2701 adapter->intr.irq = adapter->pdev->irq;
2702 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
2703
2704 ret = lan743x_gpio_init(adapter);
2705 if (ret)
2706 return ret;
2707
2708 ret = lan743x_mac_init(adapter);
2709 if (ret)
2710 return ret;
2711
2712 ret = lan743x_phy_init(adapter);
2713 if (ret)
2714 return ret;
2715
2716 ret = lan743x_ptp_init(adapter);
2717 if (ret)
2718 return ret;
2719
2720 lan743x_rfe_update_mac_address(adapter);
2721
2722 ret = lan743x_dmac_init(adapter);
2723 if (ret)
2724 return ret;
2725
2726 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
2727 adapter->rx[index].adapter = adapter;
2728 adapter->rx[index].channel_number = index;
2729 }
2730
2731 tx = &adapter->tx[0];
2732 tx->adapter = adapter;
2733 tx->channel_number = 0;
2734 spin_lock_init(&tx->ring_lock);
2735 return 0;
2736}
2737
2738static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
2739{
2740 int ret;
2741
2742 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
2743 if (!(adapter->mdiobus)) {
2744 ret = -ENOMEM;
2745 goto return_error;
2746 }
2747
2748 adapter->mdiobus->priv = (void *)adapter;
2749 adapter->mdiobus->read = lan743x_mdiobus_read;
2750 adapter->mdiobus->write = lan743x_mdiobus_write;
2751 adapter->mdiobus->name = "lan743x-mdiobus";
2752 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
2753 "pci-%s", pci_name(adapter->pdev));
2754
2755 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
2756 /* LAN7430 uses internal phy at address 1 */
2757 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
2758
2759 /* register mdiobus */
2760 ret = mdiobus_register(adapter->mdiobus);
2761 if (ret < 0)
2762 goto return_error;
2763 return 0;
2764
2765return_error:
2766 return ret;
2767}
2768
2769/* lan743x_pcidev_probe - Device Initialization Routine
2770 * @pdev: PCI device information struct
2771 * @id: entry in lan743x_pci_tbl
2772 *
2773 * Returns 0 on success, negative on failure
2774 *
2775 * initializes an adapter identified by a pci_dev structure.
2776 * The OS initialization, configuring of the adapter private structure,
2777 * and a hardware reset occur.
2778 **/
2779static int lan743x_pcidev_probe(struct pci_dev *pdev,
2780 const struct pci_device_id *id)
2781{
2782 struct lan743x_adapter *adapter = NULL;
2783 struct net_device *netdev = NULL;
2784 int ret = -ENODEV;
2785
2786 netdev = devm_alloc_etherdev(&pdev->dev,
2787 sizeof(struct lan743x_adapter));
2788 if (!netdev)
2789 goto return_error;
2790
2791 SET_NETDEV_DEV(netdev, &pdev->dev);
2792 pci_set_drvdata(pdev, netdev);
2793 adapter = netdev_priv(netdev);
2794 adapter->netdev = netdev;
2795 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
2796 NETIF_MSG_LINK | NETIF_MSG_IFUP |
2797 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
2798 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
2799
2800 ret = lan743x_pci_init(adapter, pdev);
2801 if (ret)
2802 goto return_error;
2803
2804 ret = lan743x_csr_init(adapter);
2805 if (ret)
2806 goto cleanup_pci;
2807
2808 ret = lan743x_hardware_init(adapter, pdev);
2809 if (ret)
2810 goto cleanup_pci;
2811
2812 ret = lan743x_mdiobus_init(adapter);
2813 if (ret)
2814 goto cleanup_hardware;
2815
2816 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
2817 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
2818 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2819 adapter->netdev->hw_features = adapter->netdev->features;
2820
2821 /* carrier off reporting is important to ethtool even BEFORE open */
2822 netif_carrier_off(netdev);
2823
2824 ret = register_netdev(adapter->netdev);
2825 if (ret < 0)
2826 goto cleanup_mdiobus;
2827 return 0;
2828
2829cleanup_mdiobus:
2830 lan743x_mdiobus_cleanup(adapter);
2831
2832cleanup_hardware:
2833 lan743x_hardware_cleanup(adapter);
2834
2835cleanup_pci:
2836 lan743x_pci_cleanup(adapter);
2837
2838return_error:
2839 pr_warn("Initialization failed\n");
2840 return ret;
2841}
2842
2843/**
2844 * lan743x_pcidev_remove - Device Removal Routine
2845 * @pdev: PCI device information struct
2846 *
2847 * this is called by the PCI subsystem to alert the driver
2848 * that it should release a PCI device. This could be caused by a
2849 * Hot-Plug event, or because the driver is going to be removed from
2850 * memory.
2851 **/
2852static void lan743x_pcidev_remove(struct pci_dev *pdev)
2853{
2854 struct net_device *netdev = pci_get_drvdata(pdev);
2855 struct lan743x_adapter *adapter = netdev_priv(netdev);
2856
2857 lan743x_full_cleanup(adapter);
2858}
2859
2860static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
2861{
2862 struct net_device *netdev = pci_get_drvdata(pdev);
2863 struct lan743x_adapter *adapter = netdev_priv(netdev);
2864
2865 rtnl_lock();
2866 netif_device_detach(netdev);
2867
2868 /* close netdev when netdev is at running state.
2869 * For instance, it is true when system goes to sleep by pm-suspend
2870 * However, it is false when system goes to sleep by suspend GUI menu
2871 */
2872 if (netif_running(netdev))
2873 lan743x_netdev_close(netdev);
2874 rtnl_unlock();
2875
2876#ifdef CONFIG_PM
2877 pci_save_state(pdev);
2878#endif
2879
2880 /* clean up lan743x portion */
2881 lan743x_hardware_cleanup(adapter);
2882}
2883
2884#ifdef CONFIG_PM_SLEEP
2885static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
2886{
2887 return bitrev16(crc16(0xFFFF, buf, len));
2888}
2889
2890static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
2891{
2892 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
2893 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
2894 const u8 arp_type[2] = { 0x08, 0x06 };
2895 int mask_index;
2896 u32 pmtctl;
2897 u32 wucsr;
2898 u32 macrx;
2899 u16 crc;
2900
2901 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
2902 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
2903
2904 /* clear wake settings */
2905 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
2906 pmtctl |= PMT_CTL_WUPS_MASK_;
2907 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
2908 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
2909 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
2910
2911 macrx = lan743x_csr_read(adapter, MAC_RX);
2912
2913 wucsr = 0;
2914 mask_index = 0;
2915
2916 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
2917
2918 if (adapter->wolopts & WAKE_PHY) {
2919 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_;
2920 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
2921 }
2922 if (adapter->wolopts & WAKE_MAGIC) {
2923 wucsr |= MAC_WUCSR_MPEN_;
2924 macrx |= MAC_RX_RXEN_;
2925 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2926 }
2927 if (adapter->wolopts & WAKE_UCAST) {
2928 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
2929 macrx |= MAC_RX_RXEN_;
2930 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2931 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2932 }
2933 if (adapter->wolopts & WAKE_BCAST) {
2934 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
2935 macrx |= MAC_RX_RXEN_;
2936 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2937 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2938 }
2939 if (adapter->wolopts & WAKE_MCAST) {
2940 /* IPv4 multicast */
2941 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
2942 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2943 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
2944 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2945 (crc & MAC_WUF_CFG_CRC16_MASK_));
2946 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
2947 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2948 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2949 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2950 mask_index++;
2951
2952 /* IPv6 multicast */
2953 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
2954 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2955 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
2956 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2957 (crc & MAC_WUF_CFG_CRC16_MASK_));
2958 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
2959 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2960 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2961 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2962 mask_index++;
2963
2964 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
2965 macrx |= MAC_RX_RXEN_;
2966 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2967 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2968 }
2969 if (adapter->wolopts & WAKE_ARP) {
2970 /* set MAC_WUF_CFG & WUF_MASK
2971 * for packettype (offset 12,13) = ARP (0x0806)
2972 */
2973 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
2974 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
2975 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
2976 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
2977 (crc & MAC_WUF_CFG_CRC16_MASK_));
2978 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
2979 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
2980 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
2981 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
2982 mask_index++;
2983
2984 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
2985 macrx |= MAC_RX_RXEN_;
2986 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
2987 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
2988 }
2989
2990 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
2991 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
2992 lan743x_csr_write(adapter, MAC_RX, macrx);
2993}
2994
2995static int lan743x_pm_suspend(struct device *dev)
2996{
2997 struct pci_dev *pdev = to_pci_dev(dev);
2998 struct net_device *netdev = pci_get_drvdata(pdev);
2999 struct lan743x_adapter *adapter = netdev_priv(netdev);
3000 int ret;
3001
3002 lan743x_pcidev_shutdown(pdev);
3003
3004 /* clear all wakes */
3005 lan743x_csr_write(adapter, MAC_WUCSR, 0);
3006 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3007 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3008
3009 if (adapter->wolopts)
3010 lan743x_pm_set_wol(adapter);
3011
3012 /* Host sets PME_En, put D3hot */
3013 ret = pci_prepare_to_sleep(pdev);
3014
3015 return 0;
3016}
3017
3018static int lan743x_pm_resume(struct device *dev)
3019{
3020 struct pci_dev *pdev = to_pci_dev(dev);
3021 struct net_device *netdev = pci_get_drvdata(pdev);
3022 struct lan743x_adapter *adapter = netdev_priv(netdev);
3023 int ret;
3024
3025 pci_set_power_state(pdev, PCI_D0);
3026 pci_restore_state(pdev);
3027 pci_save_state(pdev);
3028
3029 ret = lan743x_hardware_init(adapter, pdev);
3030 if (ret) {
3031 netif_err(adapter, probe, adapter->netdev,
3032 "lan743x_hardware_init returned %d\n", ret);
3033 lan743x_pci_cleanup(adapter);
3034 return ret;
3035 }
3036
3037 /* open netdev when netdev is at running state while resume.
3038 * For instance, it is true when system wakesup after pm-suspend
3039 * However, it is false when system wakes up after suspend GUI menu
3040 */
3041 if (netif_running(netdev))
3042 lan743x_netdev_open(netdev);
3043
3044 netif_device_attach(netdev);
3045
3046 return 0;
3047}
3048
3049static const struct dev_pm_ops lan743x_pm_ops = {
3050 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3051};
3052#endif /* CONFIG_PM_SLEEP */
3053
3054static const struct pci_device_id lan743x_pcidev_tbl[] = {
3055 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
3056 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
3057 { 0, }
3058};
3059
3060static struct pci_driver lan743x_pcidev_driver = {
3061 .name = DRIVER_NAME,
3062 .id_table = lan743x_pcidev_tbl,
3063 .probe = lan743x_pcidev_probe,
3064 .remove = lan743x_pcidev_remove,
3065#ifdef CONFIG_PM_SLEEP
3066 .driver.pm = &lan743x_pm_ops,
3067#endif
3068 .shutdown = lan743x_pcidev_shutdown,
3069};
3070
3071module_pci_driver(lan743x_pcidev_driver);
3072
3073MODULE_AUTHOR(DRIVER_AUTHOR);
3074MODULE_DESCRIPTION(DRIVER_DESC);
3075MODULE_LICENSE("GPL");