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192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / drivers / net / ethernet / qualcomm / emac / emac-phy.c
blob: 5c94af7bb6b65c47f8e34e425845c025c17b4f80 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
3 */
4
5/* Qualcomm Technologies, Inc. EMAC PHY Controller driver.
6 */
7
8#include <linux/of_mdio.h>
9#include <linux/phy.h>
10#include <linux/iopoll.h>
11#include <linux/acpi.h>
12#include "emac.h"
13
14/* EMAC base register offsets */
15#define EMAC_MDIO_CTRL 0x001414
16#define EMAC_PHY_STS 0x001418
17#define EMAC_MDIO_EX_CTRL 0x001440
18
19/* EMAC_MDIO_CTRL */
20#define MDIO_MODE BIT(30)
21#define MDIO_PR BIT(29)
22#define MDIO_AP_EN BIT(28)
23#define MDIO_BUSY BIT(27)
24#define MDIO_CLK_SEL_BMSK 0x7000000
25#define MDIO_CLK_SEL_SHFT 24
26#define MDIO_START BIT(23)
27#define SUP_PREAMBLE BIT(22)
28#define MDIO_RD_NWR BIT(21)
29#define MDIO_REG_ADDR_BMSK 0x1f0000
30#define MDIO_REG_ADDR_SHFT 16
31#define MDIO_DATA_BMSK 0xffff
32#define MDIO_DATA_SHFT 0
33
34/* EMAC_PHY_STS */
35#define PHY_ADDR_BMSK 0x1f0000
36#define PHY_ADDR_SHFT 16
37
38#define MDIO_CLK_25_4 0
39#define MDIO_CLK_25_28 7
40
41#define MDIO_WAIT_TIMES 1000
42#define MDIO_STATUS_DELAY_TIME 1
43
44static int emac_mdio_read(struct mii_bus *bus, int addr, int regnum)
45{
46 struct emac_adapter *adpt = bus->priv;
47 u32 reg;
48
49 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
50 (addr << PHY_ADDR_SHFT));
51
52 reg = SUP_PREAMBLE |
53 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
54 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
55 MDIO_START | MDIO_RD_NWR;
56
57 writel(reg, adpt->base + EMAC_MDIO_CTRL);
58
59 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
60 !(reg & (MDIO_START | MDIO_BUSY)),
61 MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
62 return -EIO;
63
64 return (reg >> MDIO_DATA_SHFT) & MDIO_DATA_BMSK;
65}
66
67static int emac_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
68{
69 struct emac_adapter *adpt = bus->priv;
70 u32 reg;
71
72 emac_reg_update32(adpt->base + EMAC_PHY_STS, PHY_ADDR_BMSK,
73 (addr << PHY_ADDR_SHFT));
74
75 reg = SUP_PREAMBLE |
76 ((MDIO_CLK_25_4 << MDIO_CLK_SEL_SHFT) & MDIO_CLK_SEL_BMSK) |
77 ((regnum << MDIO_REG_ADDR_SHFT) & MDIO_REG_ADDR_BMSK) |
78 ((val << MDIO_DATA_SHFT) & MDIO_DATA_BMSK) |
79 MDIO_START;
80
81 writel(reg, adpt->base + EMAC_MDIO_CTRL);
82
83 if (readl_poll_timeout(adpt->base + EMAC_MDIO_CTRL, reg,
84 !(reg & (MDIO_START | MDIO_BUSY)),
85 MDIO_STATUS_DELAY_TIME, MDIO_WAIT_TIMES * 100))
86 return -EIO;
87
88 return 0;
89}
90
91/* Configure the MDIO bus and connect the external PHY */
92int emac_phy_config(struct platform_device *pdev, struct emac_adapter *adpt)
93{
94 struct device_node *np = pdev->dev.of_node;
95 struct mii_bus *mii_bus;
96 int ret;
97
98 /* Create the mii_bus object for talking to the MDIO bus */
99 adpt->mii_bus = mii_bus = devm_mdiobus_alloc(&pdev->dev);
100 if (!mii_bus)
101 return -ENOMEM;
102
103 mii_bus->name = "emac-mdio";
104 snprintf(mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
105 mii_bus->read = emac_mdio_read;
106 mii_bus->write = emac_mdio_write;
107 mii_bus->parent = &pdev->dev;
108 mii_bus->priv = adpt;
109
110 if (has_acpi_companion(&pdev->dev)) {
111 u32 phy_addr;
112
113 ret = mdiobus_register(mii_bus);
114 if (ret) {
115 dev_err(&pdev->dev, "could not register mdio bus\n");
116 return ret;
117 }
118 ret = device_property_read_u32(&pdev->dev, "phy-channel",
119 &phy_addr);
120 if (ret)
121 /* If we can't read a valid phy address, then assume
122 * that there is only one phy on this mdio bus.
123 */
124 adpt->phydev = phy_find_first(mii_bus);
125 else
126 adpt->phydev = mdiobus_get_phy(mii_bus, phy_addr);
127
128 /* of_phy_find_device() claims a reference to the phydev,
129 * so we do that here manually as well. When the driver
130 * later unloads, it can unilaterally drop the reference
131 * without worrying about ACPI vs DT.
132 */
133 if (adpt->phydev)
134 get_device(&adpt->phydev->mdio.dev);
135 } else {
136 struct device_node *phy_np;
137
138 ret = of_mdiobus_register(mii_bus, np);
139 if (ret) {
140 dev_err(&pdev->dev, "could not register mdio bus\n");
141 return ret;
142 }
143
144 phy_np = of_parse_phandle(np, "phy-handle", 0);
145 adpt->phydev = of_phy_find_device(phy_np);
146 of_node_put(phy_np);
147 }
148
149 if (!adpt->phydev) {
150 dev_err(&pdev->dev, "could not find external phy\n");
151 mdiobus_unregister(mii_bus);
152 return -ENODEV;
153 }
154
155 return 0;
156}