b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | #include <linux/kernel.h> |
| 2 | #include <linux/module.h> |
| 3 | #include <linux/init.h> |
| 4 | #include <linux/list.h> |
| 5 | #include <linux/skbuff.h> |
| 6 | #include <linux/mii.h> |
| 7 | #include <linux/phy.h> |
| 8 | #include <linux/delay.h> |
| 9 | #include <linux/switch.h> |
| 10 | #include <linux/device.h> |
| 11 | #include "ip175d.h" |
| 12 | |
| 13 | #define DRV_NAME "ip175d" |
| 14 | #define DRV_VERSION "2.2.0" |
| 15 | #define DRV_RELDATE "2020-01-02" |
| 16 | |
| 17 | #define MAX_VLANS 16 |
| 18 | #define MAX_PORTS 9 |
| 19 | #undef DUMP_MII_IO |
| 20 | |
| 21 | /* Valid for PHY 0-4 */ |
| 22 | #define IP175D_REG_ST 1 /* Status Register */ |
| 23 | #define IP175D_REG_ST_ANEG (1<<5) /* Autonegotiation: 1=Complete, 0=In Progress */ |
| 24 | #define IP175D_REG_ST_LINK (1<<2) /* Link Status: 1=Link Pass, 0=Link Fail */ |
| 25 | |
| 26 | //#define WAN_LAN_AUTO_ADAPT 1 |
| 27 | |
| 28 | typedef struct ip175d_reg { |
| 29 | u16 p; // phy |
| 30 | u16 m; // mii |
| 31 | } reg; |
| 32 | typedef char bitnum; |
| 33 | |
| 34 | #define NOTSUPPORTED {-1,-1} |
| 35 | |
| 36 | #define REG_SUPP(x) (((x).m != ((u16)-1)) && ((x).p != (u16)-1)) |
| 37 | |
| 38 | struct ip175d_state; |
| 39 | |
| 40 | /*********** CONSTANTS ***********/ |
| 41 | struct register_mappings { |
| 42 | char *NAME; |
| 43 | u16 MODEL_NO; // Compare to bits 4-9 of MII register 0,3. |
| 44 | bitnum NUM_PORTS; |
| 45 | bitnum CPU_PORT; |
| 46 | |
| 47 | /* The default VLAN for each port. |
| 48 | Default: 0x0001 for Ports 0,1,2,3 |
| 49 | 0x0002 for Ports 4,5 */ |
| 50 | reg VLAN_DEFAULT_TAG_REG[MAX_PORTS]; |
| 51 | |
| 52 | /* These ports are tagged. |
| 53 | Default: 0x00 */ |
| 54 | reg ADD_TAG_REG; |
| 55 | reg REMOVE_TAG_REG; |
| 56 | bitnum ADD_TAG_BIT[MAX_PORTS]; |
| 57 | /* These ports are untagged. |
| 58 | Default: 0x00 (i.e. do not alter any VLAN tags...) |
| 59 | Maybe set to 0 if user disables VLANs. */ |
| 60 | bitnum REMOVE_TAG_BIT[MAX_PORTS]; |
| 61 | |
| 62 | /* Port M and Port N are on the same VLAN. |
| 63 | Default: All ports on all VLANs. */ |
| 64 | // Use register {29, 19+N/2} |
| 65 | reg VLAN_LOOKUP_REG; |
| 66 | // Port 5 uses register {30, 18} but same as odd bits. |
| 67 | reg VLAN_LOOKUP_REG_5; // in a different register on IP175C. |
| 68 | bitnum VLAN_LOOKUP_EVEN_BIT[MAX_PORTS]; |
| 69 | bitnum VLAN_LOOKUP_ODD_BIT[MAX_PORTS]; |
| 70 | |
| 71 | /* This VLAN corresponds to which ports. |
| 72 | Default: 0x2f,0x30,0x3f,0x3f... */ |
| 73 | reg TAG_VLAN_MASK_REG; |
| 74 | bitnum TAG_VLAN_MASK_EVEN_BIT[MAX_PORTS]; |
| 75 | bitnum TAG_VLAN_MASK_ODD_BIT[MAX_PORTS]; |
| 76 | |
| 77 | int RESET_VAL; |
| 78 | reg RESET_REG; |
| 79 | |
| 80 | reg MODE_REG; |
| 81 | int MODE_VAL; |
| 82 | |
| 83 | /* General flags */ |
| 84 | reg ROUTER_CONTROL_REG; |
| 85 | reg VLAN_CONTROL_REG; |
| 86 | bitnum TAG_VLAN_BIT; |
| 87 | bitnum ROUTER_EN_BIT; |
| 88 | bitnum NUMLAN_GROUPS_MAX; |
| 89 | bitnum NUMLAN_GROUPS_BIT; |
| 90 | |
| 91 | reg MII_REGISTER_EN; |
| 92 | bitnum MII_REGISTER_EN_BIT; |
| 93 | |
| 94 | // set to 1 for 178C, 0 for 175C. |
| 95 | bitnum SIMPLE_VLAN_REGISTERS; // 175C has two vlans per register but 178C has only one. |
| 96 | |
| 97 | // Pointers to functions which manipulate hardware state |
| 98 | int (*update_state)(struct ip175d_state *state); |
| 99 | int (*set_vlan_mode)(struct ip175d_state *state); |
| 100 | int (*reset)(struct ip175d_state *state); |
| 101 | }; |
| 102 | |
| 103 | static int ip175d_update_state(struct ip175d_state *state); |
| 104 | static int ip175d_set_vlan_mode(struct ip175d_state *state); |
| 105 | static int ip175d_reset(struct ip175d_state *state); |
| 106 | |
| 107 | |
| 108 | static const struct register_mappings IP175D = { |
| 109 | .NAME = "IP175D", |
| 110 | .MODEL_NO = 0x18, |
| 111 | |
| 112 | // The IP175D has a completely different interface, so we leave most |
| 113 | // of the registers undefined and switch to different code paths. |
| 114 | |
| 115 | .VLAN_DEFAULT_TAG_REG = { |
| 116 | NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED, |
| 117 | NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED,NOTSUPPORTED, |
| 118 | }, |
| 119 | |
| 120 | .ADD_TAG_REG = NOTSUPPORTED, |
| 121 | .REMOVE_TAG_REG = NOTSUPPORTED, |
| 122 | |
| 123 | .SIMPLE_VLAN_REGISTERS = 0, |
| 124 | |
| 125 | .VLAN_LOOKUP_REG = NOTSUPPORTED, |
| 126 | .VLAN_LOOKUP_REG_5 = NOTSUPPORTED, |
| 127 | .TAG_VLAN_MASK_REG = NOTSUPPORTED, |
| 128 | |
| 129 | .RESET_VAL = 0x175D, |
| 130 | .RESET_REG = {20,2}, |
| 131 | .MODE_REG = NOTSUPPORTED, |
| 132 | |
| 133 | .ROUTER_CONTROL_REG = NOTSUPPORTED, |
| 134 | .ROUTER_EN_BIT = -1, |
| 135 | .NUMLAN_GROUPS_BIT = -1, |
| 136 | |
| 137 | .VLAN_CONTROL_REG = NOTSUPPORTED, |
| 138 | .TAG_VLAN_BIT = -1, |
| 139 | |
| 140 | .NUM_PORTS = 6, |
| 141 | .CPU_PORT = 5, |
| 142 | |
| 143 | .MII_REGISTER_EN = NOTSUPPORTED, |
| 144 | |
| 145 | .update_state = ip175d_update_state, |
| 146 | .set_vlan_mode = ip175d_set_vlan_mode, |
| 147 | .reset = ip175d_reset, |
| 148 | }; |
| 149 | |
| 150 | struct ip175d_state { |
| 151 | struct switch_dev dev; |
| 152 | struct mii_bus *mii_bus; |
| 153 | bool registered; |
| 154 | |
| 155 | int router_mode; // ROUTER_EN |
| 156 | int vlan_enabled; // TAG_VLAN_EN |
| 157 | struct port_state { |
| 158 | u16 pvid; |
| 159 | unsigned int shareports; |
| 160 | } ports[MAX_PORTS]; |
| 161 | unsigned int add_tag; |
| 162 | unsigned int remove_tag; |
| 163 | int num_vlans; |
| 164 | struct vlan_state { |
| 165 | unsigned int ports; |
| 166 | unsigned int tag; // VLAN tag (IP175D only) |
| 167 | } vlans[MAX_VLANS]; |
| 168 | const struct register_mappings *regs; |
| 169 | reg proc_mii; // phy/reg for the low level register access via swconfig |
| 170 | |
| 171 | char buf[80]; |
| 172 | }; |
| 173 | |
| 174 | #define get_state(_dev) container_of((_dev), struct ip175d_state, dev) |
| 175 | |
| 176 | static int ip_phy_read(struct ip175d_state *state, int port, int reg) |
| 177 | { |
| 178 | int val = mdiobus_read(state->mii_bus, port, reg); |
| 179 | if (val < 0) |
| 180 | pr_warning("IP17xx: Unable to get MII register %d,%d: error %d\n", port, reg, -val); |
| 181 | #ifdef DUMP_MII_IO |
| 182 | else |
| 183 | pr_debug("IP17xx: Read MII(%d,%d) -> %04x\n", port, reg, val); |
| 184 | #endif |
| 185 | return val; |
| 186 | } |
| 187 | |
| 188 | static int ip_phy_write(struct ip175d_state *state, int port, int reg, u16 val) |
| 189 | { |
| 190 | int err; |
| 191 | |
| 192 | #ifdef DUMP_MII_IO |
| 193 | pr_debug("IP17xx: Write MII(%d,%d) <- %04x\n", port, reg, val); |
| 194 | #endif |
| 195 | err = mdiobus_write(state->mii_bus, port, reg, val); |
| 196 | if (err < 0) |
| 197 | pr_warning("IP17xx: Unable to write MII register %d,%d: error %d\n", port, reg, -err); |
| 198 | return err; |
| 199 | } |
| 200 | |
| 201 | static int ip_phy_write_masked(struct ip175d_state *state, int port, int reg, unsigned int mask, unsigned int data) |
| 202 | { |
| 203 | int val = ip_phy_read(state, port, reg); |
| 204 | if (val < 0) |
| 205 | return 0; |
| 206 | return ip_phy_write(state, port, reg, (val & ~mask) | data); |
| 207 | } |
| 208 | |
| 209 | static int getPhy(struct ip175d_state *state, reg mii) |
| 210 | { |
| 211 | if (!REG_SUPP(mii)) |
| 212 | return -EFAULT; |
| 213 | return ip_phy_read(state, mii.p, mii.m); |
| 214 | } |
| 215 | |
| 216 | static int setPhy(struct ip175d_state *state, reg mii, u16 value) |
| 217 | { |
| 218 | int err; |
| 219 | |
| 220 | if (!REG_SUPP(mii)) |
| 221 | return -EFAULT; |
| 222 | err = ip_phy_write(state, mii.p, mii.m, value); |
| 223 | if (err < 0) |
| 224 | return err; |
| 225 | mdelay(2); |
| 226 | getPhy(state, mii); |
| 227 | return 0; |
| 228 | } |
| 229 | |
| 230 | |
| 231 | /** |
| 232 | * These two macros are to simplify the mapping of logical bits to the bits in hardware. |
| 233 | * NOTE: these macros will return if there is an error! |
| 234 | */ |
| 235 | |
| 236 | #define GET_PORT_BITS(state, bits, addr, bit_lookup) \ |
| 237 | do { \ |
| 238 | int i, val = getPhy((state), (addr)); \ |
| 239 | if (val < 0) \ |
| 240 | return val; \ |
| 241 | (bits) = 0; \ |
| 242 | for (i = 0; i < MAX_PORTS; i++) { \ |
| 243 | if ((bit_lookup)[i] == -1) continue; \ |
| 244 | if (val & (1<<(bit_lookup)[i])) \ |
| 245 | (bits) |= (1<<i); \ |
| 246 | } \ |
| 247 | } while (0) |
| 248 | |
| 249 | #define SET_PORT_BITS(state, bits, addr, bit_lookup) \ |
| 250 | do { \ |
| 251 | int i, val = getPhy((state), (addr)); \ |
| 252 | if (val < 0) \ |
| 253 | return val; \ |
| 254 | for (i = 0; i < MAX_PORTS; i++) { \ |
| 255 | unsigned int newmask = ((bits)&(1<<i)); \ |
| 256 | if ((bit_lookup)[i] == -1) continue; \ |
| 257 | val &= ~(1<<(bit_lookup)[i]); \ |
| 258 | val |= ((newmask>>i)<<(bit_lookup)[i]); \ |
| 259 | } \ |
| 260 | val = setPhy((state), (addr), val); \ |
| 261 | if (val < 0) \ |
| 262 | return val; \ |
| 263 | } while (0) |
| 264 | |
| 265 | |
| 266 | static int get_model(struct ip175d_state *state) |
| 267 | { |
| 268 | int id1, id2; |
| 269 | int oui_id, model_no, rev_no, chip_no; |
| 270 | |
| 271 | id1 = ip_phy_read(state, 0, 2); |
| 272 | id2 = ip_phy_read(state, 0, 3); |
| 273 | oui_id = (id1 << 6) | ((id2 >> 10) & 0x3f); |
| 274 | model_no = (id2 >> 4) & 0x3f; |
| 275 | rev_no = id2 & 0xf; |
| 276 | printk("IP17xx: Identified oui=%06x model=%02x rev=%X\n", oui_id, model_no, rev_no); |
| 277 | |
| 278 | if (oui_id != 0x0090c3) // No other oui_id should have reached us anyway |
| 279 | return -ENODEV; |
| 280 | |
| 281 | if (model_no == IP175D.MODEL_NO) { |
| 282 | chip_no = ip_phy_read(state, 20, 0); |
| 283 | printk("IP17xx: Chip ID register reads %04x\n", chip_no); |
| 284 | if (chip_no == 0x175d) |
| 285 | state->regs = &IP175D; |
| 286 | } else { |
| 287 | printk("IP17xx: Found an unknown IC+ switch with model number %02x, revision %X.\n", model_no, rev_no); |
| 288 | return -EPERM; |
| 289 | } |
| 290 | |
| 291 | return 0; |
| 292 | } |
| 293 | |
| 294 | /*** Low-level functions for IP175D ***/ |
| 295 | |
| 296 | static int ip175d_update_state(struct ip175d_state *state) |
| 297 | { |
| 298 | unsigned int filter_mask = 0; |
| 299 | unsigned int ports[16], add[16], rem[16]; |
| 300 | int i, j; |
| 301 | int err = 0; |
| 302 | |
| 303 | for (i = 0; i < 16; i++) { |
| 304 | ports[i] = 0; |
| 305 | add[i] = 0; |
| 306 | rem[i] = 0; |
| 307 | if (!state->vlan_enabled) { |
| 308 | err |= ip_phy_write(state, 22, 14+i, i+1); // default tags |
| 309 | ports[i] = 0x3f; |
| 310 | continue; |
| 311 | } |
| 312 | if (!state->vlans[i].tag) { |
| 313 | // Reset the filter |
| 314 | err |= ip_phy_write(state, 22, 14+i, 0); // tag |
| 315 | continue; |
| 316 | } |
| 317 | filter_mask |= 1 << i; |
| 318 | err |= ip_phy_write(state, 22, 14+i, state->vlans[i].tag); |
| 319 | ports[i] = state->vlans[i].ports; |
| 320 | for (j = 0; j < 6; j++) { |
| 321 | if (ports[i] & (1 << j)) { |
| 322 | if (state->add_tag & (1 << j)) |
| 323 | add[i] |= 1 << j; |
| 324 | if (state->remove_tag & (1 << j)) |
| 325 | rem[i] |= 1 << j; |
| 326 | } |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | // Port masks, tag adds and removals |
| 331 | for (i = 0; i < 8; i++) { |
| 332 | err |= ip_phy_write(state, 23, i, ports[2*i] | (ports[2*i+1] << 8)); |
| 333 | err |= ip_phy_write(state, 23, 8+i, add[2*i] | (add[2*i+1] << 8)); |
| 334 | err |= ip_phy_write(state, 23, 16+i, rem[2*i] | (rem[2*i+1] << 8)); |
| 335 | } |
| 336 | err |= ip_phy_write(state, 22, 10, filter_mask); |
| 337 | |
| 338 | // Default VLAN tag for each port |
| 339 | for (i = 0; i < 6; i++) |
| 340 | err |= ip_phy_write(state, 22, 4+i, state->vlans[state->ports[i].pvid].tag); |
| 341 | |
| 342 | return (err ? -EIO : 0); |
| 343 | } |
| 344 | |
| 345 | static int ip175d_set_vlan_mode(struct ip175d_state *state) |
| 346 | { |
| 347 | int i; |
| 348 | int err = 0; |
| 349 | |
| 350 | if (state->vlan_enabled) { |
| 351 | // VLAN classification rules: tag-based VLANs, use VID to classify, |
| 352 | // drop packets that cannot be classified. |
| 353 | err |= ip_phy_write_masked(state, 22, 0, 0x3fff, 0x003f); |
| 354 | |
| 355 | // Ingress rules: CFI=1 dropped, null VID is untagged, VID=1 passed, |
| 356 | // VID=0xfff discarded, admin both tagged and untagged, ingress |
| 357 | // filters enabled. |
| 358 | err |= ip_phy_write_masked(state, 22, 1, 0x0fff, 0x0c3f); |
| 359 | |
| 360 | // Egress rules: IGMP processing off, keep VLAN header off |
| 361 | err |= ip_phy_write_masked(state, 22, 2, 0x0fff, 0x0000); |
| 362 | } else { |
| 363 | // VLAN classification rules: everything off & clear table |
| 364 | err |= ip_phy_write_masked(state, 22, 0, 0xbfff, 0x8000); |
| 365 | |
| 366 | // Ingress and egress rules: set to defaults |
| 367 | err |= ip_phy_write_masked(state, 22, 1, 0x0fff, 0x0c3f); |
| 368 | err |= ip_phy_write_masked(state, 22, 2, 0x0fff, 0x0000); |
| 369 | } |
| 370 | |
| 371 | // Reset default VLAN for each port to 0 |
| 372 | for (i = 0; i < 6; i++) |
| 373 | state->ports[i].pvid = 0; |
| 374 | |
| 375 | err |= ip175d_update_state(state); |
| 376 | |
| 377 | return (err ? -EIO : 0); |
| 378 | } |
| 379 | |
| 380 | static int ip175d_reset(struct ip175d_state *state) |
| 381 | { |
| 382 | int err = 0; |
| 383 | #ifdef WAN_LAN_AUTO_ADAPT |
| 384 | // Enable the special tagging mode for RX |
| 385 | err |= ip_phy_write(state, 21, 22, ip_phy_read(state, 21, 22) | 0x1); |
| 386 | #else |
| 387 | // Disable the special tagging mode |
| 388 | err |= ip_phy_write_masked(state, 21, 22, 0x0003, 0x0000); |
| 389 | #endif |
| 390 | // Set 802.1q protocol type |
| 391 | err |= ip_phy_write(state, 22, 3, 0x8100); |
| 392 | |
| 393 | state->vlan_enabled = 0; |
| 394 | err |= ip175d_set_vlan_mode(state); |
| 395 | |
| 396 | return (err ? -EIO : 0); |
| 397 | } |
| 398 | |
| 399 | /*** High-level functions ***/ |
| 400 | |
| 401 | static int ip175d_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 402 | { |
| 403 | struct ip175d_state *state = get_state(dev); |
| 404 | |
| 405 | val->value.i = state->vlan_enabled; |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | static void ip175d_reset_vlan_config(struct ip175d_state *state) |
| 410 | { |
| 411 | int i; |
| 412 | |
| 413 | state->remove_tag = (state->vlan_enabled ? ((1<<state->regs->NUM_PORTS)-1) : 0x0000); |
| 414 | state->add_tag = 0x0000; |
| 415 | for (i = 0; i < MAX_VLANS; i++) { |
| 416 | state->vlans[i].ports = 0x0000; |
| 417 | state->vlans[i].tag = (i ? i : 16); |
| 418 | } |
| 419 | for (i = 0; i < MAX_PORTS; i++) |
| 420 | state->ports[i].pvid = 0; |
| 421 | } |
| 422 | |
| 423 | static int ip175d_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 424 | { |
| 425 | struct ip175d_state *state = get_state(dev); |
| 426 | int enable; |
| 427 | |
| 428 | enable = val->value.i; |
| 429 | if (state->vlan_enabled == enable) { |
| 430 | // Do not change any state. |
| 431 | return 0; |
| 432 | } |
| 433 | state->vlan_enabled = enable; |
| 434 | |
| 435 | // Otherwise, if we are switching state, set fields to a known default. |
| 436 | ip175d_reset_vlan_config(state); |
| 437 | |
| 438 | return state->regs->set_vlan_mode(state); |
| 439 | } |
| 440 | |
| 441 | static int ip175d_get_ports(struct switch_dev *dev, struct switch_val *val) |
| 442 | { |
| 443 | struct ip175d_state *state = get_state(dev); |
| 444 | int b; |
| 445 | int ind; |
| 446 | unsigned int ports; |
| 447 | |
| 448 | if (val->port_vlan >= dev->vlans || val->port_vlan < 0) |
| 449 | return -EINVAL; |
| 450 | |
| 451 | ports = state->vlans[val->port_vlan].ports; |
| 452 | b = 0; |
| 453 | ind = 0; |
| 454 | while (b < MAX_PORTS) { |
| 455 | if (ports&1) { |
| 456 | int istagged = ((state->add_tag >> b) & 1); |
| 457 | val->value.ports[ind].id = b; |
| 458 | val->value.ports[ind].flags = (istagged << SWITCH_PORT_FLAG_TAGGED); |
| 459 | ind++; |
| 460 | } |
| 461 | b++; |
| 462 | ports >>= 1; |
| 463 | } |
| 464 | val->len = ind; |
| 465 | |
| 466 | return 0; |
| 467 | } |
| 468 | |
| 469 | static int ip175d_set_ports(struct switch_dev *dev, struct switch_val *val) |
| 470 | { |
| 471 | struct ip175d_state *state = get_state(dev); |
| 472 | int i; |
| 473 | |
| 474 | if (val->port_vlan >= dev->vlans || val->port_vlan < 0) |
| 475 | return -EINVAL; |
| 476 | |
| 477 | state->vlans[val->port_vlan].ports = 0; |
| 478 | for (i = 0; i < val->len; i++) { |
| 479 | unsigned int bitmask = (1<<val->value.ports[i].id); |
| 480 | state->vlans[val->port_vlan].ports |= bitmask; |
| 481 | if (val->value.ports[i].flags & (1<<SWITCH_PORT_FLAG_TAGGED)) { |
| 482 | state->add_tag |= bitmask; |
| 483 | state->remove_tag &= (~bitmask); |
| 484 | } else { |
| 485 | state->add_tag &= (~bitmask); |
| 486 | state->remove_tag |= bitmask; |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | return state->regs->update_state(state); |
| 491 | } |
| 492 | |
| 493 | static int ip175d_apply(struct switch_dev *dev) |
| 494 | { |
| 495 | struct ip175d_state *state = get_state(dev); |
| 496 | |
| 497 | if (REG_SUPP(state->regs->MII_REGISTER_EN)) { |
| 498 | int val = getPhy(state, state->regs->MII_REGISTER_EN); |
| 499 | if (val < 0) { |
| 500 | return val; |
| 501 | } |
| 502 | val |= (1<<state->regs->MII_REGISTER_EN_BIT); |
| 503 | return setPhy(state, state->regs->MII_REGISTER_EN, val); |
| 504 | } |
| 505 | return 0; |
| 506 | } |
| 507 | |
| 508 | static int ip175d_switch_reset(struct switch_dev *dev) |
| 509 | { |
| 510 | struct ip175d_state *state = get_state(dev); |
| 511 | int i, err; |
| 512 | |
| 513 | if (REG_SUPP(state->regs->RESET_REG)) { |
| 514 | err = setPhy(state, state->regs->RESET_REG, state->regs->RESET_VAL); |
| 515 | if (err < 0) |
| 516 | return err; |
| 517 | err = getPhy(state, state->regs->RESET_REG); |
| 518 | |
| 519 | /* |
| 520 | * Data sheet specifies reset period to be 2 msec. |
| 521 | * (I don't see any mention of the 2ms delay in the IP178C spec, only |
| 522 | * in IP175C, but it can't hurt.) |
| 523 | */ |
| 524 | mdelay(2); |
| 525 | } |
| 526 | |
| 527 | /* reset switch ports */ |
| 528 | for (i = 0; i < state->regs->NUM_PORTS-1; i++) { |
| 529 | err = ip_phy_write(state, i, MII_BMCR, BMCR_RESET); |
| 530 | if (err < 0) |
| 531 | return err; |
| 532 | } |
| 533 | |
| 534 | state->router_mode = 0; |
| 535 | state->vlan_enabled = 0; |
| 536 | ip175d_reset_vlan_config(state); |
| 537 | |
| 538 | return state->regs->reset(state); |
| 539 | } |
| 540 | |
| 541 | static int ip175d_get_tagged(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 542 | { |
| 543 | struct ip175d_state *state = get_state(dev); |
| 544 | |
| 545 | if (state->add_tag & (1<<val->port_vlan)) { |
| 546 | if (state->remove_tag & (1<<val->port_vlan)) |
| 547 | val->value.i = 3; // shouldn't ever happen. |
| 548 | else |
| 549 | val->value.i = 1; |
| 550 | } else { |
| 551 | if (state->remove_tag & (1<<val->port_vlan)) |
| 552 | val->value.i = 0; |
| 553 | else |
| 554 | val->value.i = 2; |
| 555 | } |
| 556 | return 0; |
| 557 | } |
| 558 | |
| 559 | static int ip175d_set_tagged(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 560 | { |
| 561 | struct ip175d_state *state = get_state(dev); |
| 562 | |
| 563 | state->add_tag &= ~(1<<val->port_vlan); |
| 564 | state->remove_tag &= ~(1<<val->port_vlan); |
| 565 | |
| 566 | if (val->value.i == 0) |
| 567 | state->remove_tag |= (1<<val->port_vlan); |
| 568 | if (val->value.i == 1) |
| 569 | state->add_tag |= (1<<val->port_vlan); |
| 570 | |
| 571 | return state->regs->update_state(state); |
| 572 | } |
| 573 | |
| 574 | /** Get the current phy address */ |
| 575 | static int ip175d_get_phy(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 576 | { |
| 577 | struct ip175d_state *state = get_state(dev); |
| 578 | |
| 579 | val->value.i = state->proc_mii.p; |
| 580 | return 0; |
| 581 | } |
| 582 | |
| 583 | /** Set a new phy address for low level access to registers */ |
| 584 | static int ip175d_set_phy(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 585 | { |
| 586 | struct ip175d_state *state = get_state(dev); |
| 587 | int new_reg = val->value.i; |
| 588 | |
| 589 | if (new_reg < 0 || new_reg > 31) |
| 590 | state->proc_mii.p = (u16)-1; |
| 591 | else |
| 592 | state->proc_mii.p = (u16)new_reg; |
| 593 | return 0; |
| 594 | } |
| 595 | |
| 596 | /** Get the current register number */ |
| 597 | static int ip175d_get_reg(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 598 | { |
| 599 | struct ip175d_state *state = get_state(dev); |
| 600 | |
| 601 | val->value.i = state->proc_mii.m; |
| 602 | return 0; |
| 603 | } |
| 604 | |
| 605 | /** Set a new register address for low level access to registers */ |
| 606 | static int ip175d_set_reg(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 607 | { |
| 608 | struct ip175d_state *state = get_state(dev); |
| 609 | int new_reg = val->value.i; |
| 610 | |
| 611 | if (new_reg < 0 || new_reg > 31) |
| 612 | state->proc_mii.m = (u16)-1; |
| 613 | else |
| 614 | state->proc_mii.m = (u16)new_reg; |
| 615 | return 0; |
| 616 | } |
| 617 | |
| 618 | /** Get the register content of state->proc_mii */ |
| 619 | static int ip175d_get_val(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 620 | { |
| 621 | struct ip175d_state *state = get_state(dev); |
| 622 | int retval = -EINVAL; |
| 623 | if (REG_SUPP(state->proc_mii)) |
| 624 | retval = getPhy(state, state->proc_mii); |
| 625 | |
| 626 | if (retval < 0) { |
| 627 | return retval; |
| 628 | } else { |
| 629 | val->value.i = retval; |
| 630 | return 0; |
| 631 | } |
| 632 | } |
| 633 | |
| 634 | /** Write a value to the register defined by phy/reg above */ |
| 635 | static int ip175d_set_val(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 636 | { |
| 637 | struct ip175d_state *state = get_state(dev); |
| 638 | int myval, err = -EINVAL; |
| 639 | |
| 640 | myval = val->value.i; |
| 641 | if (myval <= 0xffff && myval >= 0 && REG_SUPP(state->proc_mii)) { |
| 642 | err = setPhy(state, state->proc_mii, (u16)myval); |
| 643 | } |
| 644 | return err; |
| 645 | } |
| 646 | |
| 647 | /** Get the register phy 21 MII 22 Special tagging */ |
| 648 | static int ip175d_get_spec_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 649 | { |
| 650 | struct ip175d_state *state = get_state(dev); |
| 651 | |
| 652 | val->value.i = ip_phy_read(state, 21, 22); |
| 653 | return 0; |
| 654 | } |
| 655 | |
| 656 | /** Write a value to the register dphy 21 MII 22 Special tagging */ |
| 657 | static int ip175d_set_spec_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 658 | { |
| 659 | struct ip175d_state *state = get_state(dev); |
| 660 | int myval, err = -EINVAL; |
| 661 | |
| 662 | myval = val->value.i; |
| 663 | |
| 664 | /* set Special tagging for Tx and Rx */ |
| 665 | err = ip_phy_write(state, 21, 22, myval); |
| 666 | |
| 667 | return err; |
| 668 | } |
| 669 | |
| 670 | static int ip175d_read_name(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 671 | { |
| 672 | struct ip175d_state *state = get_state(dev); |
| 673 | val->value.s = state->regs->NAME; // Just a const pointer, won't be freed by swconfig. |
| 674 | return 0; |
| 675 | } |
| 676 | |
| 677 | static int ip175d_get_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 678 | { |
| 679 | struct ip175d_state *state = get_state(dev); |
| 680 | int vlan = val->port_vlan; |
| 681 | |
| 682 | if (vlan < 0 || vlan >= MAX_VLANS) |
| 683 | return -EINVAL; |
| 684 | |
| 685 | val->value.i = state->vlans[vlan].tag; |
| 686 | return 0; |
| 687 | } |
| 688 | |
| 689 | static int ip175d_set_tag(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 690 | { |
| 691 | struct ip175d_state *state = get_state(dev); |
| 692 | int vlan = val->port_vlan; |
| 693 | int tag = val->value.i; |
| 694 | |
| 695 | if (vlan < 0 || vlan >= MAX_VLANS) |
| 696 | return -EINVAL; |
| 697 | |
| 698 | if (tag < 0 || tag > 4095) |
| 699 | return -EINVAL; |
| 700 | |
| 701 | state->vlans[vlan].tag = tag; |
| 702 | return state->regs->update_state(state); |
| 703 | } |
| 704 | |
| 705 | static int ip175d_set_port_speed(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 706 | { |
| 707 | struct ip175d_state *state = get_state(dev); |
| 708 | int nr = val->port_vlan; |
| 709 | int ctrl; |
| 710 | int autoneg; |
| 711 | int speed; |
| 712 | if (val->value.i == 100) { |
| 713 | speed = 1; |
| 714 | autoneg = 0; |
| 715 | } else if (val->value.i == 10) { |
| 716 | speed = 0; |
| 717 | autoneg = 0; |
| 718 | } else { |
| 719 | autoneg = 1; |
| 720 | speed = 1; |
| 721 | } |
| 722 | |
| 723 | /* Can't set speed for cpu port */ |
| 724 | if (nr == state->regs->CPU_PORT) |
| 725 | return -EINVAL; |
| 726 | |
| 727 | if (nr >= dev->ports || nr < 0) |
| 728 | return -EINVAL; |
| 729 | |
| 730 | ctrl = ip_phy_read(state, nr, 0); |
| 731 | if (ctrl < 0) |
| 732 | return -EIO; |
| 733 | |
| 734 | ctrl &= (~(1<<12)); |
| 735 | ctrl &= (~(1<<13)); |
| 736 | ctrl |= (autoneg<<12); |
| 737 | ctrl |= (speed<<13); |
| 738 | |
| 739 | return ip_phy_write(state, nr, 0, ctrl); |
| 740 | } |
| 741 | |
| 742 | static int ip175d_get_port_speed(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 743 | { |
| 744 | struct ip175d_state *state = get_state(dev); |
| 745 | int nr = val->port_vlan; |
| 746 | int speed, status; |
| 747 | |
| 748 | if (nr == state->regs->CPU_PORT) { |
| 749 | val->value.i = 100; |
| 750 | return 0; |
| 751 | } |
| 752 | |
| 753 | if (nr >= dev->ports || nr < 0) |
| 754 | return -EINVAL; |
| 755 | |
| 756 | status = ip_phy_read(state, nr, 1); |
| 757 | speed = ip_phy_read(state, nr, 18); |
| 758 | if (status < 0 || speed < 0) |
| 759 | return -EIO; |
| 760 | |
| 761 | if (status & 4) |
| 762 | val->value.i = ((speed & (1<<11)) ? 100 : 10); |
| 763 | else |
| 764 | val->value.i = 0; |
| 765 | |
| 766 | return 0; |
| 767 | } |
| 768 | |
| 769 | static int ip175d_get_port_status(struct switch_dev *dev, const struct switch_attr *attr, struct switch_val *val) |
| 770 | { |
| 771 | struct ip175d_state *state = get_state(dev); |
| 772 | int ctrl, speed, status; |
| 773 | int nr = val->port_vlan; |
| 774 | int len; |
| 775 | char *buf = state->buf; // fixed-length at 80. |
| 776 | |
| 777 | if (nr == state->regs->CPU_PORT) { |
| 778 | sprintf(buf, "up, 100 Mbps, cpu port"); |
| 779 | val->value.s = buf; |
| 780 | return 0; |
| 781 | } |
| 782 | |
| 783 | if (nr >= dev->ports || nr < 0) |
| 784 | return -EINVAL; |
| 785 | |
| 786 | ctrl = ip_phy_read(state, nr, 0); |
| 787 | status = ip_phy_read(state, nr, 1); |
| 788 | speed = ip_phy_read(state, nr, 18); |
| 789 | if (ctrl < 0 || status < 0 || speed < 0) |
| 790 | return -EIO; |
| 791 | |
| 792 | if (status & 4) |
| 793 | len = sprintf(buf, "up, %d Mbps, %s duplex", |
| 794 | ((speed & (1<<11)) ? 100 : 10), |
| 795 | ((speed & (1<<10)) ? "full" : "half")); |
| 796 | else |
| 797 | len = sprintf(buf, "down"); |
| 798 | |
| 799 | if (ctrl & (1<<12)) { |
| 800 | len += sprintf(buf+len, ", auto-negotiate"); |
| 801 | if (!(status & (1<<5))) |
| 802 | len += sprintf(buf+len, " (in progress)"); |
| 803 | } else { |
| 804 | len += sprintf(buf+len, ", fixed speed (%d)", |
| 805 | ((ctrl & (1<<13)) ? 100 : 10)); |
| 806 | } |
| 807 | |
| 808 | buf[len] = '\0'; |
| 809 | val->value.s = buf; |
| 810 | return 0; |
| 811 | } |
| 812 | |
| 813 | static int ip175d_get_pvid(struct switch_dev *dev, int port, int *val) |
| 814 | { |
| 815 | struct ip175d_state *state = get_state(dev); |
| 816 | |
| 817 | *val = state->ports[port].pvid; |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | static int ip175d_set_pvid(struct switch_dev *dev, int port, int val) |
| 822 | { |
| 823 | struct ip175d_state *state = get_state(dev); |
| 824 | |
| 825 | if (val < 0 || val >= MAX_VLANS) |
| 826 | return -EINVAL; |
| 827 | |
| 828 | state->ports[port].pvid = val; |
| 829 | return state->regs->update_state(state); |
| 830 | } |
| 831 | |
| 832 | |
| 833 | enum Ports { |
| 834 | IP17XX_PORT_STATUS, |
| 835 | IP17XX_PORT_LINK, |
| 836 | IP17XX_PORT_TAGGED, |
| 837 | IP17XX_PORT_PVID, |
| 838 | }; |
| 839 | |
| 840 | enum Globals { |
| 841 | IP17XX_ENABLE_VLAN, |
| 842 | IP17XX_GET_NAME, |
| 843 | IP17XX_REGISTER_PHY, |
| 844 | IP17XX_REGISTER_MII, |
| 845 | IP17XX_REGISTER_VALUE, |
| 846 | IP17XX_REGISTER_SPEC_TAG, |
| 847 | IP17XX_REGISTER_ERRNO, |
| 848 | }; |
| 849 | |
| 850 | enum Vlans { |
| 851 | IP17XX_VLAN_TAG, |
| 852 | }; |
| 853 | |
| 854 | static const struct switch_attr ip175d_global[] = { |
| 855 | [IP17XX_ENABLE_VLAN] = { |
| 856 | .id = IP17XX_ENABLE_VLAN, |
| 857 | .type = SWITCH_TYPE_INT, |
| 858 | .name = "enable_vlan", |
| 859 | .description = "Flag to enable or disable VLANs and tagging", |
| 860 | .get = ip175d_get_enable_vlan, |
| 861 | .set = ip175d_set_enable_vlan, |
| 862 | }, |
| 863 | [IP17XX_GET_NAME] = { |
| 864 | .id = IP17XX_GET_NAME, |
| 865 | .type = SWITCH_TYPE_STRING, |
| 866 | .description = "Returns the type of IC+ chip.", |
| 867 | .name = "name", |
| 868 | .get = ip175d_read_name, |
| 869 | .set = NULL, |
| 870 | }, |
| 871 | /* jal: added for low level debugging etc. */ |
| 872 | [IP17XX_REGISTER_PHY] = { |
| 873 | .id = IP17XX_REGISTER_PHY, |
| 874 | .type = SWITCH_TYPE_INT, |
| 875 | .description = "Direct register access: set PHY (0-4, or 29,30,31)", |
| 876 | .name = "phy", |
| 877 | .get = ip175d_get_phy, |
| 878 | .set = ip175d_set_phy, |
| 879 | }, |
| 880 | [IP17XX_REGISTER_MII] = { |
| 881 | .id = IP17XX_REGISTER_MII, |
| 882 | .type = SWITCH_TYPE_INT, |
| 883 | .description = "Direct register access: set MII register number (0-31)", |
| 884 | .name = "reg", |
| 885 | .get = ip175d_get_reg, |
| 886 | .set = ip175d_set_reg, |
| 887 | }, |
| 888 | [IP17XX_REGISTER_VALUE] = { |
| 889 | .id = IP17XX_REGISTER_VALUE, |
| 890 | .type = SWITCH_TYPE_INT, |
| 891 | .description = "Direct register access: read/write to register (0-65535)", |
| 892 | .name = "val", |
| 893 | .get = ip175d_get_val, |
| 894 | .set = ip175d_set_val, |
| 895 | }, |
| 896 | [IP17XX_REGISTER_SPEC_TAG] = { |
| 897 | .id = IP17XX_REGISTER_SPEC_TAG, |
| 898 | .type = SWITCH_TYPE_INT, |
| 899 | .description = "Direct register access: read/write to phy 21 MII 22 Special tagging", |
| 900 | .name = "spec", |
| 901 | .get = ip175d_get_spec_tag, |
| 902 | .set = ip175d_set_spec_tag, |
| 903 | }, |
| 904 | }; |
| 905 | |
| 906 | static const struct switch_attr ip175d_vlan[] = { |
| 907 | [IP17XX_VLAN_TAG] = { |
| 908 | .id = IP17XX_VLAN_TAG, |
| 909 | .type = SWITCH_TYPE_INT, |
| 910 | .description = "VLAN ID (0-4095) [IP175D only]", |
| 911 | .name = "vid", |
| 912 | .get = ip175d_get_tag, |
| 913 | .set = ip175d_set_tag, |
| 914 | } |
| 915 | }; |
| 916 | |
| 917 | static const struct switch_attr ip175d_port[] = { |
| 918 | [IP17XX_PORT_STATUS] = { |
| 919 | .id = IP17XX_PORT_STATUS, |
| 920 | .type = SWITCH_TYPE_STRING, |
| 921 | .description = "Returns Detailed port status", |
| 922 | .name = "status", |
| 923 | .get = ip175d_get_port_status, |
| 924 | .set = NULL, |
| 925 | }, |
| 926 | [IP17XX_PORT_LINK] = { |
| 927 | .id = IP17XX_PORT_LINK, |
| 928 | .type = SWITCH_TYPE_INT, |
| 929 | .description = "Link speed. Can write 0 for auto-negotiate, or 10 or 100", |
| 930 | .name = "link", |
| 931 | .get = ip175d_get_port_speed, |
| 932 | .set = ip175d_set_port_speed, |
| 933 | }, |
| 934 | [IP17XX_PORT_TAGGED] = { |
| 935 | .id = IP17XX_PORT_LINK, |
| 936 | .type = SWITCH_TYPE_INT, |
| 937 | .description = "0 = untag, 1 = add tags, 2 = do not alter (This value is reset if vlans are altered)", |
| 938 | .name = "tagged", |
| 939 | .get = ip175d_get_tagged, |
| 940 | .set = ip175d_set_tagged, |
| 941 | }, |
| 942 | }; |
| 943 | |
| 944 | static const struct switch_dev_ops ip175d_ops = { |
| 945 | .attr_global = { |
| 946 | .attr = ip175d_global, |
| 947 | .n_attr = ARRAY_SIZE(ip175d_global), |
| 948 | }, |
| 949 | .attr_port = { |
| 950 | .attr = ip175d_port, |
| 951 | .n_attr = ARRAY_SIZE(ip175d_port), |
| 952 | }, |
| 953 | .attr_vlan = { |
| 954 | .attr = ip175d_vlan, |
| 955 | .n_attr = ARRAY_SIZE(ip175d_vlan), |
| 956 | }, |
| 957 | |
| 958 | .get_port_pvid = ip175d_get_pvid, |
| 959 | .set_port_pvid = ip175d_set_pvid, |
| 960 | .get_vlan_ports = ip175d_get_ports, |
| 961 | .set_vlan_ports = ip175d_set_ports, |
| 962 | .apply_config = ip175d_apply, |
| 963 | .reset_switch = ip175d_switch_reset, |
| 964 | }; |
| 965 | |
| 966 | static int ip175d_probe(struct phy_device *pdev) |
| 967 | { |
| 968 | struct ip175d_state *state; |
| 969 | struct switch_dev *dev; |
| 970 | int err; |
| 971 | |
| 972 | state = kzalloc(sizeof(*state), GFP_KERNEL); |
| 973 | if (!state) |
| 974 | return -ENOMEM; |
| 975 | |
| 976 | dev = &state->dev; |
| 977 | |
| 978 | pdev->priv = state; |
| 979 | state->mii_bus = pdev->mdio.bus; |
| 980 | |
| 981 | err = get_model(state); |
| 982 | if (err < 0) |
| 983 | goto error; |
| 984 | |
| 985 | dev->vlans = MAX_VLANS; |
| 986 | dev->cpu_port = state->regs->CPU_PORT; |
| 987 | dev->ports = state->regs->NUM_PORTS; |
| 988 | dev->name = state->regs->NAME; |
| 989 | dev->ops = &ip175d_ops; |
| 990 | |
| 991 | pdev->state = PHY_READY; |
| 992 | printk("IP17xx: Found %s at %s\n", dev->name, dev_name(&pdev->mdio.dev)); |
| 993 | return 0; |
| 994 | |
| 995 | error: |
| 996 | kfree(state); |
| 997 | return err; |
| 998 | } |
| 999 | |
| 1000 | static int ip175d_config_init(struct phy_device *pdev) |
| 1001 | { |
| 1002 | struct ip175d_state *state = pdev->priv; |
| 1003 | struct net_device *dev = pdev->attached_dev; |
| 1004 | int err; |
| 1005 | |
| 1006 | if (!state->registered) { |
| 1007 | err = register_switch(&state->dev, dev); |
| 1008 | if (err < 0) |
| 1009 | return err; |
| 1010 | state->registered = true; |
| 1011 | } |
| 1012 | |
| 1013 | ip175d_switch_reset(&state->dev); |
| 1014 | return 0; |
| 1015 | } |
| 1016 | |
| 1017 | static void ip175d_remove(struct phy_device *pdev) |
| 1018 | { |
| 1019 | struct ip175d_state *state = pdev->priv; |
| 1020 | |
| 1021 | if (state->registered) |
| 1022 | unregister_switch(&state->dev); |
| 1023 | kfree(state); |
| 1024 | } |
| 1025 | |
| 1026 | static int ip175d_config_aneg(struct phy_device *pdev) |
| 1027 | { |
| 1028 | return 0; |
| 1029 | } |
| 1030 | |
| 1031 | static int ip175d_aneg_done(struct phy_device *pdev) |
| 1032 | { |
| 1033 | int aneg = 0; |
| 1034 | int addr; |
| 1035 | |
| 1036 | for(addr = 0; addr <= 4; addr++) |
| 1037 | { |
| 1038 | int phy_status = mdiobus_read(pdev->mdio.bus,addr,IP175D_REG_ST); |
| 1039 | if(phy_status & IP175D_REG_ST_ANEG) |
| 1040 | { |
| 1041 | aneg = BMSR_ANEGCOMPLETE; |
| 1042 | } |
| 1043 | } |
| 1044 | return aneg; |
| 1045 | } |
| 1046 | |
| 1047 | static int ip175d_read_status(struct phy_device *pdev) |
| 1048 | { |
| 1049 | int addr; |
| 1050 | int link = 0; |
| 1051 | |
| 1052 | for(addr = 0; addr < MAX_PORT_NUM-1; addr++) |
| 1053 | { |
| 1054 | int phy_status = mdiobus_read(pdev->mdio.bus,addr,IP175D_REG_ST); |
| 1055 | if(phy_status & IP175D_REG_ST_LINK) |
| 1056 | link |= 1 << addr; |
| 1057 | } |
| 1058 | |
| 1059 | pdev->link = link; |
| 1060 | |
| 1061 | if(link) |
| 1062 | { |
| 1063 | pdev->speed = SPEED_100; |
| 1064 | pdev->duplex = DUPLEX_FULL; |
| 1065 | pdev->pause = 0; |
| 1066 | pdev->asym_pause = 0; |
| 1067 | } |
| 1068 | return 0; |
| 1069 | |
| 1070 | } |
| 1071 | |
| 1072 | static struct phy_driver ip175d_driver[] = { |
| 1073 | { |
| 1074 | .name = "IC+ IP175D", |
| 1075 | .phy_id = 0x02430d80, |
| 1076 | .phy_id_mask = 0x0ffffff0, |
| 1077 | .features = PHY_BASIC_FEATURES, |
| 1078 | .probe = ip175d_probe, |
| 1079 | .remove = ip175d_remove, |
| 1080 | .config_init = ip175d_config_init, |
| 1081 | .config_aneg = ip175d_config_aneg, |
| 1082 | .aneg_done = ip175d_aneg_done, |
| 1083 | .read_status = ip175d_read_status, |
| 1084 | .suspend = genphy_suspend, |
| 1085 | .resume = genphy_resume, |
| 1086 | } |
| 1087 | }; |
| 1088 | |
| 1089 | module_phy_driver(ip175d_driver); |
| 1090 | MODULE_VERSION(DRV_VERSION); |
| 1091 | MODULE_LICENSE("GPL"); |
| 1092 | |