b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: ISC */ |
| 2 | /* |
| 3 | * Copyright (c) 2005-2011 Atheros Communications Inc. |
| 4 | * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc. |
| 5 | */ |
| 6 | |
| 7 | #ifndef _BMI_H_ |
| 8 | #define _BMI_H_ |
| 9 | |
| 10 | #include "core.h" |
| 11 | |
| 12 | /* |
| 13 | * Bootloader Messaging Interface (BMI) |
| 14 | * |
| 15 | * BMI is a very simple messaging interface used during initialization |
| 16 | * to read memory, write memory, execute code, and to define an |
| 17 | * application entry PC. |
| 18 | * |
| 19 | * It is used to download an application to QCA988x, to provide |
| 20 | * patches to code that is already resident on QCA988x, and generally |
| 21 | * to examine and modify state. The Host has an opportunity to use |
| 22 | * BMI only once during bootup. Once the Host issues a BMI_DONE |
| 23 | * command, this opportunity ends. |
| 24 | * |
| 25 | * The Host writes BMI requests to mailbox0, and reads BMI responses |
| 26 | * from mailbox0. BMI requests all begin with a command |
| 27 | * (see below for specific commands), and are followed by |
| 28 | * command-specific data. |
| 29 | * |
| 30 | * Flow control: |
| 31 | * The Host can only issue a command once the Target gives it a |
| 32 | * "BMI Command Credit", using AR8K Counter #4. As soon as the |
| 33 | * Target has completed a command, it issues another BMI Command |
| 34 | * Credit (so the Host can issue the next command). |
| 35 | * |
| 36 | * BMI handles all required Target-side cache flushing. |
| 37 | */ |
| 38 | |
| 39 | /* Maximum data size used for BMI transfers */ |
| 40 | #define BMI_MAX_DATA_SIZE 256 |
| 41 | |
| 42 | /* len = cmd + addr + length */ |
| 43 | #define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \ |
| 44 | sizeof(u32) + \ |
| 45 | sizeof(u32) + \ |
| 46 | sizeof(u32)) |
| 47 | |
| 48 | /* BMI Commands */ |
| 49 | |
| 50 | enum bmi_cmd_id { |
| 51 | BMI_NO_COMMAND = 0, |
| 52 | BMI_DONE = 1, |
| 53 | BMI_READ_MEMORY = 2, |
| 54 | BMI_WRITE_MEMORY = 3, |
| 55 | BMI_EXECUTE = 4, |
| 56 | BMI_SET_APP_START = 5, |
| 57 | BMI_READ_SOC_REGISTER = 6, |
| 58 | BMI_READ_SOC_WORD = 6, |
| 59 | BMI_WRITE_SOC_REGISTER = 7, |
| 60 | BMI_WRITE_SOC_WORD = 7, |
| 61 | BMI_GET_TARGET_ID = 8, |
| 62 | BMI_GET_TARGET_INFO = 8, |
| 63 | BMI_ROMPATCH_INSTALL = 9, |
| 64 | BMI_ROMPATCH_UNINSTALL = 10, |
| 65 | BMI_ROMPATCH_ACTIVATE = 11, |
| 66 | BMI_ROMPATCH_DEACTIVATE = 12, |
| 67 | BMI_LZ_STREAM_START = 13, /* should be followed by LZ_DATA */ |
| 68 | BMI_LZ_DATA = 14, |
| 69 | BMI_NVRAM_PROCESS = 15, |
| 70 | }; |
| 71 | |
| 72 | #define BMI_NVRAM_SEG_NAME_SZ 16 |
| 73 | |
| 74 | #define BMI_PARAM_GET_EEPROM_BOARD_ID 0x10 |
| 75 | #define BMI_PARAM_GET_FLASH_BOARD_ID 0x8000 |
| 76 | #define BMI_PARAM_FLASH_SECTION_ALL 0x10000 |
| 77 | |
| 78 | /* Dual-band Extended Board ID */ |
| 79 | #define BMI_PARAM_GET_EXT_BOARD_ID 0x40000 |
| 80 | #define ATH10K_BMI_EXT_BOARD_ID_SUPPORT 0x40000 |
| 81 | |
| 82 | #define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK 0x7c00 |
| 83 | #define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB 10 |
| 84 | |
| 85 | #define ATH10K_BMI_CHIP_ID_FROM_OTP_MASK 0x18000 |
| 86 | #define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB 15 |
| 87 | |
| 88 | #define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff |
| 89 | #define ATH10K_BMI_EBOARD_ID_STATUS_MASK 0xff |
| 90 | |
| 91 | struct bmi_cmd { |
| 92 | __le32 id; /* enum bmi_cmd_id */ |
| 93 | union { |
| 94 | struct { |
| 95 | } done; |
| 96 | struct { |
| 97 | __le32 addr; |
| 98 | __le32 len; |
| 99 | } read_mem; |
| 100 | struct { |
| 101 | __le32 addr; |
| 102 | __le32 len; |
| 103 | u8 payload[0]; |
| 104 | } write_mem; |
| 105 | struct { |
| 106 | __le32 addr; |
| 107 | __le32 param; |
| 108 | } execute; |
| 109 | struct { |
| 110 | __le32 addr; |
| 111 | } set_app_start; |
| 112 | struct { |
| 113 | __le32 addr; |
| 114 | } read_soc_reg; |
| 115 | struct { |
| 116 | __le32 addr; |
| 117 | __le32 value; |
| 118 | } write_soc_reg; |
| 119 | struct { |
| 120 | } get_target_info; |
| 121 | struct { |
| 122 | __le32 rom_addr; |
| 123 | __le32 ram_addr; /* or value */ |
| 124 | __le32 size; |
| 125 | __le32 activate; /* 0=install, but dont activate */ |
| 126 | } rompatch_install; |
| 127 | struct { |
| 128 | __le32 patch_id; |
| 129 | } rompatch_uninstall; |
| 130 | struct { |
| 131 | __le32 count; |
| 132 | __le32 patch_ids[0]; /* length of @count */ |
| 133 | } rompatch_activate; |
| 134 | struct { |
| 135 | __le32 count; |
| 136 | __le32 patch_ids[0]; /* length of @count */ |
| 137 | } rompatch_deactivate; |
| 138 | struct { |
| 139 | __le32 addr; |
| 140 | } lz_start; |
| 141 | struct { |
| 142 | __le32 len; /* max BMI_MAX_DATA_SIZE */ |
| 143 | u8 payload[0]; /* length of @len */ |
| 144 | } lz_data; |
| 145 | struct { |
| 146 | u8 name[BMI_NVRAM_SEG_NAME_SZ]; |
| 147 | } nvram_process; |
| 148 | u8 payload[BMI_MAX_CMDBUF_SIZE]; |
| 149 | }; |
| 150 | } __packed; |
| 151 | |
| 152 | union bmi_resp { |
| 153 | struct { |
| 154 | u8 payload[0]; |
| 155 | } read_mem; |
| 156 | struct { |
| 157 | __le32 result; |
| 158 | } execute; |
| 159 | struct { |
| 160 | __le32 value; |
| 161 | } read_soc_reg; |
| 162 | struct { |
| 163 | __le32 len; |
| 164 | __le32 version; |
| 165 | __le32 type; |
| 166 | } get_target_info; |
| 167 | struct { |
| 168 | __le32 patch_id; |
| 169 | } rompatch_install; |
| 170 | struct { |
| 171 | __le32 patch_id; |
| 172 | } rompatch_uninstall; |
| 173 | struct { |
| 174 | /* 0 = nothing executed |
| 175 | * otherwise = NVRAM segment return value |
| 176 | */ |
| 177 | __le32 result; |
| 178 | } nvram_process; |
| 179 | u8 payload[BMI_MAX_CMDBUF_SIZE]; |
| 180 | } __packed; |
| 181 | |
| 182 | struct bmi_target_info { |
| 183 | u32 version; |
| 184 | u32 type; |
| 185 | }; |
| 186 | |
| 187 | struct bmi_segmented_file_header { |
| 188 | __le32 magic_num; |
| 189 | __le32 file_flags; |
| 190 | u8 data[]; |
| 191 | }; |
| 192 | |
| 193 | struct bmi_segmented_metadata { |
| 194 | __le32 addr; |
| 195 | __le32 length; |
| 196 | u8 data[]; |
| 197 | }; |
| 198 | |
| 199 | #define BMI_SGMTFILE_MAGIC_NUM 0x544d4753 /* "SGMT" */ |
| 200 | #define BMI_SGMTFILE_FLAG_COMPRESS 1 |
| 201 | |
| 202 | /* Special values for bmi_segmented_metadata.length (all have high bit set) */ |
| 203 | |
| 204 | /* end of segmented data */ |
| 205 | #define BMI_SGMTFILE_DONE 0xffffffff |
| 206 | |
| 207 | /* Board Data segment */ |
| 208 | #define BMI_SGMTFILE_BDDATA 0xfffffffe |
| 209 | |
| 210 | /* set beginning address */ |
| 211 | #define BMI_SGMTFILE_BEGINADDR 0xfffffffd |
| 212 | |
| 213 | /* immediate function execution */ |
| 214 | #define BMI_SGMTFILE_EXEC 0xfffffffc |
| 215 | |
| 216 | /* in jiffies */ |
| 217 | #define BMI_COMMUNICATION_TIMEOUT_HZ (3 * HZ) |
| 218 | |
| 219 | #define BMI_CE_NUM_TO_TARG 0 |
| 220 | #define BMI_CE_NUM_TO_HOST 1 |
| 221 | |
| 222 | void ath10k_bmi_start(struct ath10k *ar); |
| 223 | int ath10k_bmi_done(struct ath10k *ar); |
| 224 | int ath10k_bmi_get_target_info(struct ath10k *ar, |
| 225 | struct bmi_target_info *target_info); |
| 226 | int ath10k_bmi_get_target_info_sdio(struct ath10k *ar, |
| 227 | struct bmi_target_info *target_info); |
| 228 | int ath10k_bmi_read_memory(struct ath10k *ar, u32 address, |
| 229 | void *buffer, u32 length); |
| 230 | int ath10k_bmi_write_memory(struct ath10k *ar, u32 address, |
| 231 | const void *buffer, u32 length); |
| 232 | |
| 233 | #define ath10k_bmi_read32(ar, item, val) \ |
| 234 | ({ \ |
| 235 | int ret; \ |
| 236 | u32 addr; \ |
| 237 | __le32 tmp; \ |
| 238 | \ |
| 239 | addr = host_interest_item_address(HI_ITEM(item)); \ |
| 240 | ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \ |
| 241 | if (!ret) \ |
| 242 | *val = __le32_to_cpu(tmp); \ |
| 243 | ret; \ |
| 244 | }) |
| 245 | |
| 246 | #define ath10k_bmi_write32(ar, item, val) \ |
| 247 | ({ \ |
| 248 | int ret; \ |
| 249 | u32 address; \ |
| 250 | __le32 v = __cpu_to_le32(val); \ |
| 251 | \ |
| 252 | address = host_interest_item_address(HI_ITEM(item)); \ |
| 253 | ret = ath10k_bmi_write_memory(ar, address, \ |
| 254 | (u8 *)&v, sizeof(v)); \ |
| 255 | ret; \ |
| 256 | }) |
| 257 | |
| 258 | int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result); |
| 259 | int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address); |
| 260 | int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length); |
| 261 | int ath10k_bmi_fast_download(struct ath10k *ar, u32 address, |
| 262 | const void *buffer, u32 length); |
| 263 | int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val); |
| 264 | int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val); |
| 265 | int ath10k_bmi_set_start(struct ath10k *ar, u32 address); |
| 266 | |
| 267 | #endif /* _BMI_H_ */ |