blob: a1bd61d5e024de994f3cee760a714b465b2920e1 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0-only
2/******************************************************************************
3 *
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 *
6 * Portions of this file are derived from the ipw3945 project, as well
7 * as portions of the ieee80211 subsystem header files.
8 *
9 * Contact Information:
10 * Intel Linux Wireless <ilw@linux.intel.com>
11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
12 *
13 *****************************************************************************/
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/pci.h>
21#include <linux/slab.h>
22#include <linux/dma-mapping.h>
23#include <linux/delay.h>
24#include <linux/sched.h>
25#include <linux/skbuff.h>
26#include <linux/netdevice.h>
27#include <linux/firmware.h>
28#include <linux/etherdevice.h>
29#include <linux/if_arp.h>
30
31#include <net/ieee80211_radiotap.h>
32#include <net/mac80211.h>
33
34#include <asm/div64.h>
35
36#define DRV_NAME "iwl3945"
37
38#include "commands.h"
39#include "common.h"
40#include "3945.h"
41#include "iwl-spectrum.h"
42
43/*
44 * module name, copyright, version, etc.
45 */
46
47#define DRV_DESCRIPTION \
48"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
49
50#ifdef CONFIG_IWLEGACY_DEBUG
51#define VD "d"
52#else
53#define VD
54#endif
55
56/*
57 * add "s" to indicate spectrum measurement included.
58 * we add it here to be consistent with previous releases in which
59 * this was configurable.
60 */
61#define DRV_VERSION IWLWIFI_VERSION VD "s"
62#define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
63#define DRV_AUTHOR "<ilw@linux.intel.com>"
64
65MODULE_DESCRIPTION(DRV_DESCRIPTION);
66MODULE_VERSION(DRV_VERSION);
67MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
68MODULE_LICENSE("GPL");
69
70 /* module parameters */
71struct il_mod_params il3945_mod_params = {
72 .sw_crypto = 1,
73 .restart_fw = 1,
74 .disable_hw_scan = 1,
75 /* the rest are 0 by default */
76};
77
78/**
79 * il3945_get_antenna_flags - Get antenna flags for RXON command
80 * @il: eeprom and antenna fields are used to determine antenna flags
81 *
82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
83 * il3945_mod_params.antenna specifies the antenna diversity mode:
84 *
85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
86 * IL_ANTENNA_MAIN - Force MAIN antenna
87 * IL_ANTENNA_AUX - Force AUX antenna
88 */
89__le32
90il3945_get_antenna_flags(const struct il_priv *il)
91{
92 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
93
94 switch (il3945_mod_params.antenna) {
95 case IL_ANTENNA_DIVERSITY:
96 return 0;
97
98 case IL_ANTENNA_MAIN:
99 if (eeprom->antenna_switch_type)
100 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
102
103 case IL_ANTENNA_AUX:
104 if (eeprom->antenna_switch_type)
105 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
107 }
108
109 /* bad antenna selector value */
110 IL_ERR("Bad antenna selector value (0x%x)\n",
111 il3945_mod_params.antenna);
112
113 return 0; /* "diversity" is default if error */
114}
115
116static int
117il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
118 struct ieee80211_key_conf *keyconf, u8 sta_id)
119{
120 unsigned long flags;
121 __le16 key_flags = 0;
122 int ret;
123
124 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
125 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
126
127 if (sta_id == il->hw_params.bcast_id)
128 key_flags |= STA_KEY_MULTICAST_MSK;
129
130 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
131 keyconf->hw_key_idx = keyconf->keyidx;
132 key_flags &= ~STA_KEY_FLG_INVALID;
133
134 spin_lock_irqsave(&il->sta_lock, flags);
135 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
136 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
137 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
138
139 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
140
141 if ((il->stations[sta_id].sta.key.
142 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
143 il->stations[sta_id].sta.key.key_offset =
144 il_get_free_ucode_key_idx(il);
145 /* else, we are overriding an existing key => no need to allocated room
146 * in uCode. */
147
148 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
149 "no space for a new key");
150
151 il->stations[sta_id].sta.key.key_flags = key_flags;
152 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
153 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
154
155 D_INFO("hwcrypto: modify ucode station key info\n");
156
157 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
158
159 spin_unlock_irqrestore(&il->sta_lock, flags);
160
161 return ret;
162}
163
164static int
165il3945_set_tkip_dynamic_key_info(struct il_priv *il,
166 struct ieee80211_key_conf *keyconf, u8 sta_id)
167{
168 return -EOPNOTSUPP;
169}
170
171static int
172il3945_set_wep_dynamic_key_info(struct il_priv *il,
173 struct ieee80211_key_conf *keyconf, u8 sta_id)
174{
175 return -EOPNOTSUPP;
176}
177
178static int
179il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
180{
181 unsigned long flags;
182 struct il_addsta_cmd sta_cmd;
183
184 spin_lock_irqsave(&il->sta_lock, flags);
185 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
186 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
187 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
188 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
189 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
190 memcpy(&sta_cmd, &il->stations[sta_id].sta,
191 sizeof(struct il_addsta_cmd));
192 spin_unlock_irqrestore(&il->sta_lock, flags);
193
194 D_INFO("hwcrypto: clear ucode station key info\n");
195 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
196}
197
198static int
199il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
200 u8 sta_id)
201{
202 int ret = 0;
203
204 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
205
206 switch (keyconf->cipher) {
207 case WLAN_CIPHER_SUITE_CCMP:
208 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
209 break;
210 case WLAN_CIPHER_SUITE_TKIP:
211 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
212 break;
213 case WLAN_CIPHER_SUITE_WEP40:
214 case WLAN_CIPHER_SUITE_WEP104:
215 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
216 break;
217 default:
218 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
219 ret = -EINVAL;
220 }
221
222 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
223 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
224
225 return ret;
226}
227
228static int
229il3945_remove_static_key(struct il_priv *il)
230{
231 int ret = -EOPNOTSUPP;
232
233 return ret;
234}
235
236static int
237il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
238{
239 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
240 key->cipher == WLAN_CIPHER_SUITE_WEP104)
241 return -EOPNOTSUPP;
242
243 IL_ERR("Static key invalid: cipher %x\n", key->cipher);
244 return -EINVAL;
245}
246
247static void
248il3945_clear_free_frames(struct il_priv *il)
249{
250 struct list_head *element;
251
252 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
253
254 while (!list_empty(&il->free_frames)) {
255 element = il->free_frames.next;
256 list_del(element);
257 kfree(list_entry(element, struct il3945_frame, list));
258 il->frames_count--;
259 }
260
261 if (il->frames_count) {
262 IL_WARN("%d frames still in use. Did we lose one?\n",
263 il->frames_count);
264 il->frames_count = 0;
265 }
266}
267
268static struct il3945_frame *
269il3945_get_free_frame(struct il_priv *il)
270{
271 struct il3945_frame *frame;
272 struct list_head *element;
273 if (list_empty(&il->free_frames)) {
274 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
275 if (!frame) {
276 IL_ERR("Could not allocate frame!\n");
277 return NULL;
278 }
279
280 il->frames_count++;
281 return frame;
282 }
283
284 element = il->free_frames.next;
285 list_del(element);
286 return list_entry(element, struct il3945_frame, list);
287}
288
289static void
290il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
291{
292 memset(frame, 0, sizeof(*frame));
293 list_add(&frame->list, &il->free_frames);
294}
295
296unsigned int
297il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
298 int left)
299{
300
301 if (!il_is_associated(il) || !il->beacon_skb)
302 return 0;
303
304 if (il->beacon_skb->len > left)
305 return 0;
306
307 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
308
309 return il->beacon_skb->len;
310}
311
312static int
313il3945_send_beacon_cmd(struct il_priv *il)
314{
315 struct il3945_frame *frame;
316 unsigned int frame_size;
317 int rc;
318 u8 rate;
319
320 frame = il3945_get_free_frame(il);
321
322 if (!frame) {
323 IL_ERR("Could not obtain free frame buffer for beacon "
324 "command.\n");
325 return -ENOMEM;
326 }
327
328 rate = il_get_lowest_plcp(il);
329
330 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
331
332 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
333
334 il3945_free_frame(il, frame);
335
336 return rc;
337}
338
339static void
340il3945_unset_hw_params(struct il_priv *il)
341{
342 if (il->_3945.shared_virt)
343 dma_free_coherent(&il->pci_dev->dev,
344 sizeof(struct il3945_shared),
345 il->_3945.shared_virt, il->_3945.shared_phys);
346}
347
348static void
349il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
350 struct il_device_cmd *cmd,
351 struct sk_buff *skb_frag, int sta_id)
352{
353 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
354 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
355
356 tx_cmd->sec_ctl = 0;
357
358 switch (keyinfo->cipher) {
359 case WLAN_CIPHER_SUITE_CCMP:
360 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
361 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
362 D_TX("tx_cmd with AES hwcrypto\n");
363 break;
364
365 case WLAN_CIPHER_SUITE_TKIP:
366 break;
367
368 case WLAN_CIPHER_SUITE_WEP104:
369 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
370 /* fall through */
371 case WLAN_CIPHER_SUITE_WEP40:
372 tx_cmd->sec_ctl |=
373 TX_CMD_SEC_WEP | (info->control.hw_key->
374 hw_key_idx & TX_CMD_SEC_MSK) <<
375 TX_CMD_SEC_SHIFT;
376
377 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
378
379 D_TX("Configuring packet for WEP encryption " "with key %d\n",
380 info->control.hw_key->hw_key_idx);
381 break;
382
383 default:
384 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
385 break;
386 }
387}
388
389/*
390 * handle build C_TX command notification.
391 */
392static void
393il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
394 struct ieee80211_tx_info *info,
395 struct ieee80211_hdr *hdr, u8 std_id)
396{
397 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
398 __le32 tx_flags = tx_cmd->tx_flags;
399 __le16 fc = hdr->frame_control;
400
401 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
402 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
403 tx_flags |= TX_CMD_FLG_ACK_MSK;
404 if (ieee80211_is_mgmt(fc))
405 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
406 if (ieee80211_is_probe_resp(fc) &&
407 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
408 tx_flags |= TX_CMD_FLG_TSF_MSK;
409 } else {
410 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
411 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
412 }
413
414 tx_cmd->sta_id = std_id;
415 if (ieee80211_has_morefrags(fc))
416 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
417
418 if (ieee80211_is_data_qos(fc)) {
419 u8 *qc = ieee80211_get_qos_ctl(hdr);
420 tx_cmd->tid_tspec = qc[0] & 0xf;
421 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
422 } else {
423 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
424 }
425
426 il_tx_cmd_protection(il, info, fc, &tx_flags);
427
428 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
429 if (ieee80211_is_mgmt(fc)) {
430 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
431 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
432 else
433 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
434 } else {
435 tx_cmd->timeout.pm_frame_timeout = 0;
436 }
437
438 tx_cmd->driver_txop = 0;
439 tx_cmd->tx_flags = tx_flags;
440 tx_cmd->next_frame_len = 0;
441}
442
443/*
444 * start C_TX command process
445 */
446static int
447il3945_tx_skb(struct il_priv *il,
448 struct ieee80211_sta *sta,
449 struct sk_buff *skb)
450{
451 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
452 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
453 struct il3945_tx_cmd *tx_cmd;
454 struct il_tx_queue *txq = NULL;
455 struct il_queue *q = NULL;
456 struct il_device_cmd *out_cmd;
457 struct il_cmd_meta *out_meta;
458 dma_addr_t phys_addr;
459 dma_addr_t txcmd_phys;
460 int txq_id = skb_get_queue_mapping(skb);
461 u16 len, idx, hdr_len;
462 u16 firstlen, secondlen;
463 u8 sta_id;
464 u8 tid = 0;
465 __le16 fc;
466 u8 wait_write_ptr = 0;
467 unsigned long flags;
468
469 spin_lock_irqsave(&il->lock, flags);
470 if (il_is_rfkill(il)) {
471 D_DROP("Dropping - RF KILL\n");
472 goto drop_unlock;
473 }
474
475 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
476 IL_INVALID_RATE) {
477 IL_ERR("ERROR: No TX rate available.\n");
478 goto drop_unlock;
479 }
480
481 fc = hdr->frame_control;
482
483#ifdef CONFIG_IWLEGACY_DEBUG
484 if (ieee80211_is_auth(fc))
485 D_TX("Sending AUTH frame\n");
486 else if (ieee80211_is_assoc_req(fc))
487 D_TX("Sending ASSOC frame\n");
488 else if (ieee80211_is_reassoc_req(fc))
489 D_TX("Sending REASSOC frame\n");
490#endif
491
492 spin_unlock_irqrestore(&il->lock, flags);
493
494 hdr_len = ieee80211_hdrlen(fc);
495
496 /* Find idx into station table for destination station */
497 sta_id = il_sta_id_or_broadcast(il, sta);
498 if (sta_id == IL_INVALID_STATION) {
499 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
500 goto drop;
501 }
502
503 D_RATE("station Id %d\n", sta_id);
504
505 if (ieee80211_is_data_qos(fc)) {
506 u8 *qc = ieee80211_get_qos_ctl(hdr);
507 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
508 if (unlikely(tid >= MAX_TID_COUNT))
509 goto drop;
510 }
511
512 /* Descriptor for chosen Tx queue */
513 txq = &il->txq[txq_id];
514 q = &txq->q;
515
516 if ((il_queue_space(q) < q->high_mark))
517 goto drop;
518
519 spin_lock_irqsave(&il->lock, flags);
520
521 idx = il_get_cmd_idx(q, q->write_ptr, 0);
522
523 txq->skbs[q->write_ptr] = skb;
524
525 /* Init first empty entry in queue's array of Tx/cmd buffers */
526 out_cmd = txq->cmd[idx];
527 out_meta = &txq->meta[idx];
528 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
529 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
530 memset(tx_cmd, 0, sizeof(*tx_cmd));
531
532 /*
533 * Set up the Tx-command (not MAC!) header.
534 * Store the chosen Tx queue and TFD idx within the sequence field;
535 * after Tx, uCode's Tx response will return this value so driver can
536 * locate the frame within the tx queue and do post-tx processing.
537 */
538 out_cmd->hdr.cmd = C_TX;
539 out_cmd->hdr.sequence =
540 cpu_to_le16((u16)
541 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
542
543 /* Copy MAC header from skb into command buffer */
544 memcpy(tx_cmd->hdr, hdr, hdr_len);
545
546 if (info->control.hw_key)
547 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
548
549 /* TODO need this for burst mode later on */
550 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
551
552 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
553
554 /* Total # bytes to be transmitted */
555 tx_cmd->len = cpu_to_le16((u16) skb->len);
556
557 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
558 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
559
560 /*
561 * Use the first empty entry in this queue's command buffer array
562 * to contain the Tx command and MAC header concatenated together
563 * (payload data will be in another buffer).
564 * Size of this varies, due to varying MAC header length.
565 * If end is not dword aligned, we'll have 2 extra bytes at the end
566 * of the MAC header (device reads on dword boundaries).
567 * We'll tell device about this padding later.
568 */
569 len =
570 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
571 hdr_len;
572 firstlen = (len + 3) & ~3;
573
574 /* Physical address of this Tx command's header (not MAC header!),
575 * within command buffer array. */
576 txcmd_phys =
577 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
578 PCI_DMA_TODEVICE);
579 if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
580 goto drop_unlock;
581
582 /* Set up TFD's 2nd entry to point directly to remainder of skb,
583 * if any (802.11 null frames have no payload). */
584 secondlen = skb->len - hdr_len;
585 if (secondlen > 0) {
586 phys_addr =
587 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
588 PCI_DMA_TODEVICE);
589 if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
590 goto drop_unlock;
591 }
592
593 /* Add buffer containing Tx command and MAC(!) header to TFD's
594 * first entry */
595 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
596 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
597 dma_unmap_len_set(out_meta, len, firstlen);
598 if (secondlen > 0)
599 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
600 U32_PAD(secondlen));
601
602 if (!ieee80211_has_morefrags(hdr->frame_control)) {
603 txq->need_update = 1;
604 } else {
605 wait_write_ptr = 1;
606 txq->need_update = 0;
607 }
608
609 il_update_stats(il, true, fc, skb->len);
610
611 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
612 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
613 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
614 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
615 ieee80211_hdrlen(fc));
616
617 /* Tell device the write idx *just past* this latest filled TFD */
618 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
619 il_txq_update_write_ptr(il, txq);
620 spin_unlock_irqrestore(&il->lock, flags);
621
622 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
623 if (wait_write_ptr) {
624 spin_lock_irqsave(&il->lock, flags);
625 txq->need_update = 1;
626 il_txq_update_write_ptr(il, txq);
627 spin_unlock_irqrestore(&il->lock, flags);
628 }
629
630 il_stop_queue(il, txq);
631 }
632
633 return 0;
634
635drop_unlock:
636 spin_unlock_irqrestore(&il->lock, flags);
637drop:
638 return -1;
639}
640
641static int
642il3945_get_measurement(struct il_priv *il,
643 struct ieee80211_measurement_params *params, u8 type)
644{
645 struct il_spectrum_cmd spectrum;
646 struct il_rx_pkt *pkt;
647 struct il_host_cmd cmd = {
648 .id = C_SPECTRUM_MEASUREMENT,
649 .data = (void *)&spectrum,
650 .flags = CMD_WANT_SKB,
651 };
652 u32 add_time = le64_to_cpu(params->start_time);
653 int rc;
654 int spectrum_resp_status;
655 int duration = le16_to_cpu(params->duration);
656
657 if (il_is_associated(il))
658 add_time =
659 il_usecs_to_beacons(il,
660 le64_to_cpu(params->start_time) -
661 il->_3945.last_tsf,
662 le16_to_cpu(il->timing.beacon_interval));
663
664 memset(&spectrum, 0, sizeof(spectrum));
665
666 spectrum.channel_count = cpu_to_le16(1);
667 spectrum.flags =
668 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
669 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
670 cmd.len = sizeof(spectrum);
671 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
672
673 if (il_is_associated(il))
674 spectrum.start_time =
675 il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
676 le16_to_cpu(il->timing.beacon_interval));
677 else
678 spectrum.start_time = 0;
679
680 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
681 spectrum.channels[0].channel = params->channel;
682 spectrum.channels[0].type = type;
683 if (il->active.flags & RXON_FLG_BAND_24G_MSK)
684 spectrum.flags |=
685 RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
686 RXON_FLG_TGG_PROTECT_MSK;
687
688 rc = il_send_cmd_sync(il, &cmd);
689 if (rc)
690 return rc;
691
692 pkt = (struct il_rx_pkt *)cmd.reply_page;
693 if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
694 IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
695 rc = -EIO;
696 }
697
698 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
699 switch (spectrum_resp_status) {
700 case 0: /* Command will be handled */
701 if (pkt->u.spectrum.id != 0xff) {
702 D_INFO("Replaced existing measurement: %d\n",
703 pkt->u.spectrum.id);
704 il->measurement_status &= ~MEASUREMENT_READY;
705 }
706 il->measurement_status |= MEASUREMENT_ACTIVE;
707 rc = 0;
708 break;
709
710 case 1: /* Command will not be handled */
711 rc = -EAGAIN;
712 break;
713 }
714
715 il_free_pages(il, cmd.reply_page);
716
717 return rc;
718}
719
720static void
721il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
722{
723 struct il_rx_pkt *pkt = rxb_addr(rxb);
724 struct il_alive_resp *palive;
725 struct delayed_work *pwork;
726
727 palive = &pkt->u.alive_frame;
728
729 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
730 palive->is_valid, palive->ver_type, palive->ver_subtype);
731
732 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
733 D_INFO("Initialization Alive received.\n");
734 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
735 sizeof(struct il_alive_resp));
736 pwork = &il->init_alive_start;
737 } else {
738 D_INFO("Runtime Alive received.\n");
739 memcpy(&il->card_alive, &pkt->u.alive_frame,
740 sizeof(struct il_alive_resp));
741 pwork = &il->alive_start;
742 il3945_disable_events(il);
743 }
744
745 /* We delay the ALIVE response by 5ms to
746 * give the HW RF Kill time to activate... */
747 if (palive->is_valid == UCODE_VALID_OK)
748 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
749 else
750 IL_WARN("uCode did not respond OK.\n");
751}
752
753static void
754il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
755{
756#ifdef CONFIG_IWLEGACY_DEBUG
757 struct il_rx_pkt *pkt = rxb_addr(rxb);
758#endif
759
760 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
761}
762
763static void
764il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
765{
766 struct il_rx_pkt *pkt = rxb_addr(rxb);
767 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
768#ifdef CONFIG_IWLEGACY_DEBUG
769 u8 rate = beacon->beacon_notify_hdr.rate;
770
771 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
772 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
773 beacon->beacon_notify_hdr.failure_frame,
774 le32_to_cpu(beacon->ibss_mgr_status),
775 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
776#endif
777
778 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
779
780}
781
782/* Handle notification from uCode that card's power state is changing
783 * due to software, hardware, or critical temperature RFKILL */
784static void
785il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
786{
787 struct il_rx_pkt *pkt = rxb_addr(rxb);
788 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
789 unsigned long status = il->status;
790
791 IL_WARN("Card state received: HW:%s SW:%s\n",
792 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
793 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
794
795 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
796
797 if (flags & HW_CARD_DISABLED)
798 set_bit(S_RFKILL, &il->status);
799 else
800 clear_bit(S_RFKILL, &il->status);
801
802 il_scan_cancel(il);
803
804 if ((test_bit(S_RFKILL, &status) !=
805 test_bit(S_RFKILL, &il->status)))
806 wiphy_rfkill_set_hw_state(il->hw->wiphy,
807 test_bit(S_RFKILL, &il->status));
808 else
809 wake_up(&il->wait_command_queue);
810}
811
812/**
813 * il3945_setup_handlers - Initialize Rx handler callbacks
814 *
815 * Setup the RX handlers for each of the reply types sent from the uCode
816 * to the host.
817 *
818 * This function chains into the hardware specific files for them to setup
819 * any hardware specific handlers as well.
820 */
821static void
822il3945_setup_handlers(struct il_priv *il)
823{
824 il->handlers[N_ALIVE] = il3945_hdl_alive;
825 il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
826 il->handlers[N_ERROR] = il_hdl_error;
827 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
828 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
829 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
830 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
831 il->handlers[N_BEACON] = il3945_hdl_beacon;
832
833 /*
834 * The same handler is used for both the REPLY to a discrete
835 * stats request from the host as well as for the periodic
836 * stats notifications (after received beacons) from the uCode.
837 */
838 il->handlers[C_STATS] = il3945_hdl_c_stats;
839 il->handlers[N_STATS] = il3945_hdl_stats;
840
841 il_setup_rx_scan_handlers(il);
842 il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
843
844 /* Set up hardware specific Rx handlers */
845 il3945_hw_handler_setup(il);
846}
847
848/************************** RX-FUNCTIONS ****************************/
849/*
850 * Rx theory of operation
851 *
852 * The host allocates 32 DMA target addresses and passes the host address
853 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
854 * 0 to 31
855 *
856 * Rx Queue Indexes
857 * The host/firmware share two idx registers for managing the Rx buffers.
858 *
859 * The READ idx maps to the first position that the firmware may be writing
860 * to -- the driver can read up to (but not including) this position and get
861 * good data.
862 * The READ idx is managed by the firmware once the card is enabled.
863 *
864 * The WRITE idx maps to the last position the driver has read from -- the
865 * position preceding WRITE is the last slot the firmware can place a packet.
866 *
867 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
868 * WRITE = READ.
869 *
870 * During initialization, the host sets up the READ queue position to the first
871 * IDX position, and WRITE to the last (READ - 1 wrapped)
872 *
873 * When the firmware places a packet in a buffer, it will advance the READ idx
874 * and fire the RX interrupt. The driver can then query the READ idx and
875 * process as many packets as possible, moving the WRITE idx forward as it
876 * resets the Rx queue buffers with new memory.
877 *
878 * The management in the driver is as follows:
879 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
880 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
881 * to replenish the iwl->rxq->rx_free.
882 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
883 * iwl->rxq is replenished and the READ IDX is updated (updating the
884 * 'processed' and 'read' driver idxes as well)
885 * + A received packet is processed and handed to the kernel network stack,
886 * detached from the iwl->rxq. The driver 'processed' idx is updated.
887 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
888 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
889 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
890 * were enough free buffers and RX_STALLED is set it is cleared.
891 *
892 *
893 * Driver sequence:
894 *
895 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
896 * il3945_rx_queue_restock
897 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
898 * queue, updates firmware pointers, and updates
899 * the WRITE idx. If insufficient rx_free buffers
900 * are available, schedules il3945_rx_replenish
901 *
902 * -- enable interrupts --
903 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
904 * READ IDX, detaching the SKB from the pool.
905 * Moves the packet buffer from queue to rx_used.
906 * Calls il3945_rx_queue_restock to refill any empty
907 * slots.
908 * ...
909 *
910 */
911
912/**
913 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
914 */
915static inline __le32
916il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
917{
918 return cpu_to_le32((u32) dma_addr);
919}
920
921/**
922 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
923 *
924 * If there are slots in the RX queue that need to be restocked,
925 * and we have free pre-allocated buffers, fill the ranks as much
926 * as we can, pulling from rx_free.
927 *
928 * This moves the 'write' idx forward to catch up with 'processed', and
929 * also updates the memory address in the firmware to reference the new
930 * target buffer.
931 */
932static void
933il3945_rx_queue_restock(struct il_priv *il)
934{
935 struct il_rx_queue *rxq = &il->rxq;
936 struct list_head *element;
937 struct il_rx_buf *rxb;
938 unsigned long flags;
939
940 spin_lock_irqsave(&rxq->lock, flags);
941 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
942 /* Get next free Rx buffer, remove from free list */
943 element = rxq->rx_free.next;
944 rxb = list_entry(element, struct il_rx_buf, list);
945 list_del(element);
946
947 /* Point to Rx buffer via next RBD in circular buffer */
948 rxq->bd[rxq->write] =
949 il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
950 rxq->queue[rxq->write] = rxb;
951 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
952 rxq->free_count--;
953 }
954 spin_unlock_irqrestore(&rxq->lock, flags);
955 /* If the pre-allocated buffer pool is dropping low, schedule to
956 * refill it */
957 if (rxq->free_count <= RX_LOW_WATERMARK)
958 queue_work(il->workqueue, &il->rx_replenish);
959
960 /* If we've added more space for the firmware to place data, tell it.
961 * Increment device's write pointer in multiples of 8. */
962 if (rxq->write_actual != (rxq->write & ~0x7) ||
963 abs(rxq->write - rxq->read) > 7) {
964 spin_lock_irqsave(&rxq->lock, flags);
965 rxq->need_update = 1;
966 spin_unlock_irqrestore(&rxq->lock, flags);
967 il_rx_queue_update_write_ptr(il, rxq);
968 }
969}
970
971/**
972 * il3945_rx_replenish - Move all used packet from rx_used to rx_free
973 *
974 * When moving to rx_free an SKB is allocated for the slot.
975 *
976 * Also restock the Rx queue via il3945_rx_queue_restock.
977 * This is called as a scheduled work item (except for during initialization)
978 */
979static void
980il3945_rx_allocate(struct il_priv *il, gfp_t priority)
981{
982 struct il_rx_queue *rxq = &il->rxq;
983 struct list_head *element;
984 struct il_rx_buf *rxb;
985 struct page *page;
986 dma_addr_t page_dma;
987 unsigned long flags;
988 gfp_t gfp_mask = priority;
989
990 while (1) {
991 spin_lock_irqsave(&rxq->lock, flags);
992 if (list_empty(&rxq->rx_used)) {
993 spin_unlock_irqrestore(&rxq->lock, flags);
994 return;
995 }
996 spin_unlock_irqrestore(&rxq->lock, flags);
997
998 if (rxq->free_count > RX_LOW_WATERMARK)
999 gfp_mask |= __GFP_NOWARN;
1000
1001 if (il->hw_params.rx_page_order > 0)
1002 gfp_mask |= __GFP_COMP;
1003
1004 /* Alloc a new receive buffer */
1005 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
1006 if (!page) {
1007 if (net_ratelimit())
1008 D_INFO("Failed to allocate SKB buffer.\n");
1009 if (rxq->free_count <= RX_LOW_WATERMARK &&
1010 net_ratelimit())
1011 IL_ERR("Failed to allocate SKB buffer with %0x."
1012 "Only %u free buffers remaining.\n",
1013 priority, rxq->free_count);
1014 /* We don't reschedule replenish work here -- we will
1015 * call the restock method and if it still needs
1016 * more buffers it will schedule replenish */
1017 break;
1018 }
1019
1020 /* Get physical address of RB/SKB */
1021 page_dma =
1022 pci_map_page(il->pci_dev, page, 0,
1023 PAGE_SIZE << il->hw_params.rx_page_order,
1024 PCI_DMA_FROMDEVICE);
1025
1026 if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
1027 __free_pages(page, il->hw_params.rx_page_order);
1028 break;
1029 }
1030
1031 spin_lock_irqsave(&rxq->lock, flags);
1032
1033 if (list_empty(&rxq->rx_used)) {
1034 spin_unlock_irqrestore(&rxq->lock, flags);
1035 pci_unmap_page(il->pci_dev, page_dma,
1036 PAGE_SIZE << il->hw_params.rx_page_order,
1037 PCI_DMA_FROMDEVICE);
1038 __free_pages(page, il->hw_params.rx_page_order);
1039 return;
1040 }
1041
1042 element = rxq->rx_used.next;
1043 rxb = list_entry(element, struct il_rx_buf, list);
1044 list_del(element);
1045
1046 rxb->page = page;
1047 rxb->page_dma = page_dma;
1048 list_add_tail(&rxb->list, &rxq->rx_free);
1049 rxq->free_count++;
1050 il->alloc_rxb_page++;
1051
1052 spin_unlock_irqrestore(&rxq->lock, flags);
1053 }
1054}
1055
1056void
1057il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
1058{
1059 unsigned long flags;
1060 int i;
1061 spin_lock_irqsave(&rxq->lock, flags);
1062 INIT_LIST_HEAD(&rxq->rx_free);
1063 INIT_LIST_HEAD(&rxq->rx_used);
1064 /* Fill the rx_used queue with _all_ of the Rx buffers */
1065 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1066 /* In the reset function, these buffers may have been allocated
1067 * to an SKB, so we need to unmap and free potential storage */
1068 if (rxq->pool[i].page != NULL) {
1069 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1070 PAGE_SIZE << il->hw_params.rx_page_order,
1071 PCI_DMA_FROMDEVICE);
1072 __il_free_pages(il, rxq->pool[i].page);
1073 rxq->pool[i].page = NULL;
1074 }
1075 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1076 }
1077
1078 /* Set us so that we have processed and used all buffers, but have
1079 * not restocked the Rx queue with fresh buffers */
1080 rxq->read = rxq->write = 0;
1081 rxq->write_actual = 0;
1082 rxq->free_count = 0;
1083 spin_unlock_irqrestore(&rxq->lock, flags);
1084}
1085
1086void
1087il3945_rx_replenish(void *data)
1088{
1089 struct il_priv *il = data;
1090 unsigned long flags;
1091
1092 il3945_rx_allocate(il, GFP_KERNEL);
1093
1094 spin_lock_irqsave(&il->lock, flags);
1095 il3945_rx_queue_restock(il);
1096 spin_unlock_irqrestore(&il->lock, flags);
1097}
1098
1099static void
1100il3945_rx_replenish_now(struct il_priv *il)
1101{
1102 il3945_rx_allocate(il, GFP_ATOMIC);
1103
1104 il3945_rx_queue_restock(il);
1105}
1106
1107/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1108 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1109 * This free routine walks the list of POOL entries and if SKB is set to
1110 * non NULL it is unmapped and freed
1111 */
1112static void
1113il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
1114{
1115 int i;
1116 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1117 if (rxq->pool[i].page != NULL) {
1118 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
1119 PAGE_SIZE << il->hw_params.rx_page_order,
1120 PCI_DMA_FROMDEVICE);
1121 __il_free_pages(il, rxq->pool[i].page);
1122 rxq->pool[i].page = NULL;
1123 }
1124 }
1125
1126 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1127 rxq->bd_dma);
1128 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
1129 rxq->rb_stts, rxq->rb_stts_dma);
1130 rxq->bd = NULL;
1131 rxq->rb_stts = NULL;
1132}
1133
1134/* Convert linear signal-to-noise ratio into dB */
1135static u8 ratio2dB[100] = {
1136/* 0 1 2 3 4 5 6 7 8 9 */
1137 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1138 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1139 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1140 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1141 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1142 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1143 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1144 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1145 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1146 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1147};
1148
1149/* Calculates a relative dB value from a ratio of linear
1150 * (i.e. not dB) signal levels.
1151 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1152int
1153il3945_calc_db_from_ratio(int sig_ratio)
1154{
1155 /* 1000:1 or higher just report as 60 dB */
1156 if (sig_ratio >= 1000)
1157 return 60;
1158
1159 /* 100:1 or higher, divide by 10 and use table,
1160 * add 20 dB to make up for divide by 10 */
1161 if (sig_ratio >= 100)
1162 return 20 + (int)ratio2dB[sig_ratio / 10];
1163
1164 /* We shouldn't see this */
1165 if (sig_ratio < 1)
1166 return 0;
1167
1168 /* Use table for ratios 1:1 - 99:1 */
1169 return (int)ratio2dB[sig_ratio];
1170}
1171
1172/**
1173 * il3945_rx_handle - Main entry function for receiving responses from uCode
1174 *
1175 * Uses the il->handlers callback function array to invoke
1176 * the appropriate handlers, including command responses,
1177 * frame-received notifications, and other notifications.
1178 */
1179static void
1180il3945_rx_handle(struct il_priv *il)
1181{
1182 struct il_rx_buf *rxb;
1183 struct il_rx_pkt *pkt;
1184 struct il_rx_queue *rxq = &il->rxq;
1185 u32 r, i;
1186 int reclaim;
1187 unsigned long flags;
1188 u8 fill_rx = 0;
1189 u32 count = 8;
1190 int total_empty = 0;
1191
1192 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
1193 * buffer that the driver may process (last buffer filled by ucode). */
1194 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1195 i = rxq->read;
1196
1197 /* calculate total frames need to be restock after handling RX */
1198 total_empty = r - rxq->write_actual;
1199 if (total_empty < 0)
1200 total_empty += RX_QUEUE_SIZE;
1201
1202 if (total_empty > (RX_QUEUE_SIZE / 2))
1203 fill_rx = 1;
1204 /* Rx interrupt, but nothing sent from uCode */
1205 if (i == r)
1206 D_RX("r = %d, i = %d\n", r, i);
1207
1208 while (i != r) {
1209 int len;
1210
1211 rxb = rxq->queue[i];
1212
1213 /* If an RXB doesn't have a Rx queue slot associated with it,
1214 * then a bug has been introduced in the queue refilling
1215 * routines -- catch it here */
1216 BUG_ON(rxb == NULL);
1217
1218 rxq->queue[i] = NULL;
1219
1220 pci_unmap_page(il->pci_dev, rxb->page_dma,
1221 PAGE_SIZE << il->hw_params.rx_page_order,
1222 PCI_DMA_FROMDEVICE);
1223 pkt = rxb_addr(rxb);
1224
1225 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
1226 len += sizeof(u32); /* account for status word */
1227
1228 reclaim = il_need_reclaim(il, pkt);
1229
1230 /* Based on type of command response or notification,
1231 * handle those that need handling via function in
1232 * handlers table. See il3945_setup_handlers() */
1233 if (il->handlers[pkt->hdr.cmd]) {
1234 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
1235 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1236 il->isr_stats.handlers[pkt->hdr.cmd]++;
1237 il->handlers[pkt->hdr.cmd] (il, rxb);
1238 } else {
1239 /* No handling needed */
1240 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
1241 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1242 }
1243
1244 /*
1245 * XXX: After here, we should always check rxb->page
1246 * against NULL before touching it or its virtual
1247 * memory (pkt). Because some handler might have
1248 * already taken or freed the pages.
1249 */
1250
1251 if (reclaim) {
1252 /* Invoke any callbacks, transfer the buffer to caller,
1253 * and fire off the (possibly) blocking il_send_cmd()
1254 * as we reclaim the driver command queue */
1255 if (rxb->page)
1256 il_tx_cmd_complete(il, rxb);
1257 else
1258 IL_WARN("Claim null rxb?\n");
1259 }
1260
1261 /* Reuse the page if possible. For notification packets and
1262 * SKBs that fail to Rx correctly, add them back into the
1263 * rx_free list for reuse later. */
1264 spin_lock_irqsave(&rxq->lock, flags);
1265 if (rxb->page != NULL) {
1266 rxb->page_dma =
1267 pci_map_page(il->pci_dev, rxb->page, 0,
1268 PAGE_SIZE << il->hw_params.
1269 rx_page_order, PCI_DMA_FROMDEVICE);
1270 if (unlikely(pci_dma_mapping_error(il->pci_dev,
1271 rxb->page_dma))) {
1272 __il_free_pages(il, rxb->page);
1273 rxb->page = NULL;
1274 list_add_tail(&rxb->list, &rxq->rx_used);
1275 } else {
1276 list_add_tail(&rxb->list, &rxq->rx_free);
1277 rxq->free_count++;
1278 }
1279 } else
1280 list_add_tail(&rxb->list, &rxq->rx_used);
1281
1282 spin_unlock_irqrestore(&rxq->lock, flags);
1283
1284 i = (i + 1) & RX_QUEUE_MASK;
1285 /* If there are a lot of unused frames,
1286 * restock the Rx queue so ucode won't assert. */
1287 if (fill_rx) {
1288 count++;
1289 if (count >= 8) {
1290 rxq->read = i;
1291 il3945_rx_replenish_now(il);
1292 count = 0;
1293 }
1294 }
1295 }
1296
1297 /* Backtrack one entry */
1298 rxq->read = i;
1299 if (fill_rx)
1300 il3945_rx_replenish_now(il);
1301 else
1302 il3945_rx_queue_restock(il);
1303}
1304
1305/* call this function to flush any scheduled tasklet */
1306static inline void
1307il3945_synchronize_irq(struct il_priv *il)
1308{
1309 /* wait to make sure we flush pending tasklet */
1310 synchronize_irq(il->pci_dev->irq);
1311 tasklet_kill(&il->irq_tasklet);
1312}
1313
1314static const char *
1315il3945_desc_lookup(int i)
1316{
1317 switch (i) {
1318 case 1:
1319 return "FAIL";
1320 case 2:
1321 return "BAD_PARAM";
1322 case 3:
1323 return "BAD_CHECKSUM";
1324 case 4:
1325 return "NMI_INTERRUPT";
1326 case 5:
1327 return "SYSASSERT";
1328 case 6:
1329 return "FATAL_ERROR";
1330 }
1331
1332 return "UNKNOWN";
1333}
1334
1335#define ERROR_START_OFFSET (1 * sizeof(u32))
1336#define ERROR_ELEM_SIZE (7 * sizeof(u32))
1337
1338void
1339il3945_dump_nic_error_log(struct il_priv *il)
1340{
1341 u32 i;
1342 u32 desc, time, count, base, data1;
1343 u32 blink1, blink2, ilink1, ilink2;
1344
1345 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
1346
1347 if (!il3945_hw_valid_rtc_data_addr(base)) {
1348 IL_ERR("Not valid error log pointer 0x%08X\n", base);
1349 return;
1350 }
1351
1352 count = il_read_targ_mem(il, base);
1353
1354 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1355 IL_ERR("Start IWL Error Log Dump:\n");
1356 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
1357 }
1358
1359 IL_ERR("Desc Time asrtPC blink2 "
1360 "ilink1 nmiPC Line\n");
1361 for (i = ERROR_START_OFFSET;
1362 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1363 i += ERROR_ELEM_SIZE) {
1364 desc = il_read_targ_mem(il, base + i);
1365 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
1366 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
1367 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
1368 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
1369 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
1370 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
1371
1372 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1373 il3945_desc_lookup(desc), desc, time, blink1, blink2,
1374 ilink1, ilink2, data1);
1375 }
1376}
1377
1378static void
1379il3945_irq_tasklet(unsigned long data)
1380{
1381 struct il_priv *il = (struct il_priv *)data;
1382 u32 inta, handled = 0;
1383 u32 inta_fh;
1384 unsigned long flags;
1385#ifdef CONFIG_IWLEGACY_DEBUG
1386 u32 inta_mask;
1387#endif
1388
1389 spin_lock_irqsave(&il->lock, flags);
1390
1391 /* Ack/clear/reset pending uCode interrupts.
1392 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1393 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1394 inta = _il_rd(il, CSR_INT);
1395 _il_wr(il, CSR_INT, inta);
1396
1397 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1398 * Any new interrupts that happen after this, either while we're
1399 * in this tasklet, or later, will show up in next ISR/tasklet. */
1400 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1401 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
1402
1403#ifdef CONFIG_IWLEGACY_DEBUG
1404 if (il_get_debug_level(il) & IL_DL_ISR) {
1405 /* just for debug */
1406 inta_mask = _il_rd(il, CSR_INT_MASK);
1407 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
1408 inta_mask, inta_fh);
1409 }
1410#endif
1411
1412 spin_unlock_irqrestore(&il->lock, flags);
1413
1414 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1415 * atomic, make sure that inta covers all the interrupts that
1416 * we've discovered, even if FH interrupt came in just after
1417 * reading CSR_INT. */
1418 if (inta_fh & CSR39_FH_INT_RX_MASK)
1419 inta |= CSR_INT_BIT_FH_RX;
1420 if (inta_fh & CSR39_FH_INT_TX_MASK)
1421 inta |= CSR_INT_BIT_FH_TX;
1422
1423 /* Now service all interrupt bits discovered above. */
1424 if (inta & CSR_INT_BIT_HW_ERR) {
1425 IL_ERR("Hardware error detected. Restarting.\n");
1426
1427 /* Tell the device to stop sending interrupts */
1428 il_disable_interrupts(il);
1429
1430 il->isr_stats.hw++;
1431 il_irq_handle_error(il);
1432
1433 handled |= CSR_INT_BIT_HW_ERR;
1434
1435 return;
1436 }
1437#ifdef CONFIG_IWLEGACY_DEBUG
1438 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1439 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1440 if (inta & CSR_INT_BIT_SCD) {
1441 D_ISR("Scheduler finished to transmit "
1442 "the frame/frames.\n");
1443 il->isr_stats.sch++;
1444 }
1445
1446 /* Alive notification via Rx interrupt will do the real work */
1447 if (inta & CSR_INT_BIT_ALIVE) {
1448 D_ISR("Alive interrupt\n");
1449 il->isr_stats.alive++;
1450 }
1451 }
1452#endif
1453 /* Safely ignore these bits for debug checks below */
1454 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1455
1456 /* Error detected by uCode */
1457 if (inta & CSR_INT_BIT_SW_ERR) {
1458 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
1459 inta);
1460 il->isr_stats.sw++;
1461 il_irq_handle_error(il);
1462 handled |= CSR_INT_BIT_SW_ERR;
1463 }
1464
1465 /* uCode wakes up after power-down sleep */
1466 if (inta & CSR_INT_BIT_WAKEUP) {
1467 D_ISR("Wakeup interrupt\n");
1468 il_rx_queue_update_write_ptr(il, &il->rxq);
1469
1470 spin_lock_irqsave(&il->lock, flags);
1471 il_txq_update_write_ptr(il, &il->txq[0]);
1472 il_txq_update_write_ptr(il, &il->txq[1]);
1473 il_txq_update_write_ptr(il, &il->txq[2]);
1474 il_txq_update_write_ptr(il, &il->txq[3]);
1475 il_txq_update_write_ptr(il, &il->txq[4]);
1476 spin_unlock_irqrestore(&il->lock, flags);
1477
1478 il->isr_stats.wakeup++;
1479 handled |= CSR_INT_BIT_WAKEUP;
1480 }
1481
1482 /* All uCode command responses, including Tx command responses,
1483 * Rx "responses" (frame-received notification), and other
1484 * notifications from uCode come through here*/
1485 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1486 il3945_rx_handle(il);
1487 il->isr_stats.rx++;
1488 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1489 }
1490
1491 if (inta & CSR_INT_BIT_FH_TX) {
1492 D_ISR("Tx interrupt\n");
1493 il->isr_stats.tx++;
1494
1495 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
1496 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
1497 handled |= CSR_INT_BIT_FH_TX;
1498 }
1499
1500 if (inta & ~handled) {
1501 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
1502 il->isr_stats.unhandled++;
1503 }
1504
1505 if (inta & ~il->inta_mask) {
1506 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
1507 inta & ~il->inta_mask);
1508 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
1509 }
1510
1511 /* Re-enable all interrupts */
1512 /* only Re-enable if disabled by irq */
1513 if (test_bit(S_INT_ENABLED, &il->status))
1514 il_enable_interrupts(il);
1515
1516#ifdef CONFIG_IWLEGACY_DEBUG
1517 if (il_get_debug_level(il) & (IL_DL_ISR)) {
1518 inta = _il_rd(il, CSR_INT);
1519 inta_mask = _il_rd(il, CSR_INT_MASK);
1520 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
1521 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1522 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1523 }
1524#endif
1525}
1526
1527static int
1528il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
1529 u8 is_active, u8 n_probes,
1530 struct il3945_scan_channel *scan_ch,
1531 struct ieee80211_vif *vif)
1532{
1533 struct ieee80211_channel *chan;
1534 const struct ieee80211_supported_band *sband;
1535 const struct il_channel_info *ch_info;
1536 u16 passive_dwell = 0;
1537 u16 active_dwell = 0;
1538 int added, i;
1539
1540 sband = il_get_hw_mode(il, band);
1541 if (!sband)
1542 return 0;
1543
1544 active_dwell = il_get_active_dwell_time(il, band, n_probes);
1545 passive_dwell = il_get_passive_dwell_time(il, band, vif);
1546
1547 if (passive_dwell <= active_dwell)
1548 passive_dwell = active_dwell + 1;
1549
1550 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
1551 chan = il->scan_request->channels[i];
1552
1553 if (chan->band != band)
1554 continue;
1555
1556 scan_ch->channel = chan->hw_value;
1557
1558 ch_info = il_get_channel_info(il, band, scan_ch->channel);
1559 if (!il_is_channel_valid(ch_info)) {
1560 D_SCAN("Channel %d is INVALID for this band.\n",
1561 scan_ch->channel);
1562 continue;
1563 }
1564
1565 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1566 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1567 /* If passive , set up for auto-switch
1568 * and use long active_dwell time.
1569 */
1570 if (!is_active || il_is_channel_passive(ch_info) ||
1571 (chan->flags & IEEE80211_CHAN_NO_IR)) {
1572 scan_ch->type = 0; /* passive */
1573 if (IL_UCODE_API(il->ucode_ver) == 1)
1574 scan_ch->active_dwell =
1575 cpu_to_le16(passive_dwell - 1);
1576 } else {
1577 scan_ch->type = 1; /* active */
1578 }
1579
1580 /* Set direct probe bits. These may be used both for active
1581 * scan channels (probes gets sent right away),
1582 * or for passive channels (probes get se sent only after
1583 * hearing clear Rx packet).*/
1584 if (IL_UCODE_API(il->ucode_ver) >= 2) {
1585 if (n_probes)
1586 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1587 } else {
1588 /* uCode v1 does not allow setting direct probe bits on
1589 * passive channel. */
1590 if ((scan_ch->type & 1) && n_probes)
1591 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
1592 }
1593
1594 /* Set txpower levels to defaults */
1595 scan_ch->tpc.dsp_atten = 110;
1596 /* scan_pwr_info->tpc.dsp_atten; */
1597
1598 /*scan_pwr_info->tpc.tx_gain; */
1599 if (band == NL80211_BAND_5GHZ)
1600 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1601 else {
1602 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1603 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1604 * power level:
1605 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1606 */
1607 }
1608
1609 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
1610 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1611 (scan_ch->type & 1) ? active_dwell : passive_dwell);
1612
1613 scan_ch++;
1614 added++;
1615 }
1616
1617 D_SCAN("total channels to scan %d\n", added);
1618 return added;
1619}
1620
1621static void
1622il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
1623{
1624 int i;
1625
1626 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
1627 rates[i].bitrate = il3945_rates[i].ieee * 5;
1628 rates[i].hw_value = i; /* Rate scaling will work on idxes */
1629 rates[i].hw_value_short = i;
1630 rates[i].flags = 0;
1631 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
1632 /*
1633 * If CCK != 1M then set short preamble rate flag.
1634 */
1635 rates[i].flags |=
1636 (il3945_rates[i].plcp ==
1637 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1638 }
1639 }
1640}
1641
1642/******************************************************************************
1643 *
1644 * uCode download functions
1645 *
1646 ******************************************************************************/
1647
1648static void
1649il3945_dealloc_ucode_pci(struct il_priv *il)
1650{
1651 il_free_fw_desc(il->pci_dev, &il->ucode_code);
1652 il_free_fw_desc(il->pci_dev, &il->ucode_data);
1653 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
1654 il_free_fw_desc(il->pci_dev, &il->ucode_init);
1655 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
1656 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
1657}
1658
1659/**
1660 * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
1661 * looking at all data.
1662 */
1663static int
1664il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
1665{
1666 u32 val;
1667 u32 save_len = len;
1668 int rc = 0;
1669 u32 errcnt;
1670
1671 D_INFO("ucode inst image size is %u\n", len);
1672
1673 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
1674
1675 errcnt = 0;
1676 for (; len > 0; len -= sizeof(u32), image++) {
1677 /* read data comes through single port, auto-incr addr */
1678 /* NOTE: Use the debugless read so we don't flood kernel log
1679 * if IL_DL_IO is set */
1680 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1681 if (val != le32_to_cpu(*image)) {
1682 IL_ERR("uCode INST section is invalid at "
1683 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1684 save_len - len, val, le32_to_cpu(*image));
1685 rc = -EIO;
1686 errcnt++;
1687 if (errcnt >= 20)
1688 break;
1689 }
1690 }
1691
1692 if (!errcnt)
1693 D_INFO("ucode image in INSTRUCTION memory is good\n");
1694
1695 return rc;
1696}
1697
1698/**
1699 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1700 * using sample data 100 bytes apart. If these sample points are good,
1701 * it's a pretty good bet that everything between them is good, too.
1702 */
1703static int
1704il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
1705{
1706 u32 val;
1707 int rc = 0;
1708 u32 errcnt = 0;
1709 u32 i;
1710
1711 D_INFO("ucode inst image size is %u\n", len);
1712
1713 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
1714 /* read data comes through single port, auto-incr addr */
1715 /* NOTE: Use the debugless read so we don't flood kernel log
1716 * if IL_DL_IO is set */
1717 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
1718 val = _il_rd(il, HBUS_TARG_MEM_RDAT);
1719 if (val != le32_to_cpu(*image)) {
1720#if 0 /* Enable this if you want to see details */
1721 IL_ERR("uCode INST section is invalid at "
1722 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
1723 *image);
1724#endif
1725 rc = -EIO;
1726 errcnt++;
1727 if (errcnt >= 3)
1728 break;
1729 }
1730 }
1731
1732 return rc;
1733}
1734
1735/**
1736 * il3945_verify_ucode - determine which instruction image is in SRAM,
1737 * and verify its contents
1738 */
1739static int
1740il3945_verify_ucode(struct il_priv *il)
1741{
1742 __le32 *image;
1743 u32 len;
1744 int rc = 0;
1745
1746 /* Try bootstrap */
1747 image = (__le32 *) il->ucode_boot.v_addr;
1748 len = il->ucode_boot.len;
1749 rc = il3945_verify_inst_sparse(il, image, len);
1750 if (rc == 0) {
1751 D_INFO("Bootstrap uCode is good in inst SRAM\n");
1752 return 0;
1753 }
1754
1755 /* Try initialize */
1756 image = (__le32 *) il->ucode_init.v_addr;
1757 len = il->ucode_init.len;
1758 rc = il3945_verify_inst_sparse(il, image, len);
1759 if (rc == 0) {
1760 D_INFO("Initialize uCode is good in inst SRAM\n");
1761 return 0;
1762 }
1763
1764 /* Try runtime/protocol */
1765 image = (__le32 *) il->ucode_code.v_addr;
1766 len = il->ucode_code.len;
1767 rc = il3945_verify_inst_sparse(il, image, len);
1768 if (rc == 0) {
1769 D_INFO("Runtime uCode is good in inst SRAM\n");
1770 return 0;
1771 }
1772
1773 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1774
1775 /* Since nothing seems to match, show first several data entries in
1776 * instruction SRAM, so maybe visual inspection will give a clue.
1777 * Selection of bootstrap image (vs. other images) is arbitrary. */
1778 image = (__le32 *) il->ucode_boot.v_addr;
1779 len = il->ucode_boot.len;
1780 rc = il3945_verify_inst_full(il, image, len);
1781
1782 return rc;
1783}
1784
1785static void
1786il3945_nic_start(struct il_priv *il)
1787{
1788 /* Remove all resets to allow NIC to operate */
1789 _il_wr(il, CSR_RESET, 0);
1790}
1791
1792#define IL3945_UCODE_GET(item) \
1793static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1794{ \
1795 return le32_to_cpu(ucode->v1.item); \
1796}
1797
1798static u32
1799il3945_ucode_get_header_size(u32 api_ver)
1800{
1801 return 24;
1802}
1803
1804static u8 *
1805il3945_ucode_get_data(const struct il_ucode_header *ucode)
1806{
1807 return (u8 *) ucode->v1.data;
1808}
1809
1810IL3945_UCODE_GET(inst_size);
1811IL3945_UCODE_GET(data_size);
1812IL3945_UCODE_GET(init_size);
1813IL3945_UCODE_GET(init_data_size);
1814IL3945_UCODE_GET(boot_size);
1815
1816/**
1817 * il3945_read_ucode - Read uCode images from disk file.
1818 *
1819 * Copy into buffers for card to fetch via bus-mastering
1820 */
1821static int
1822il3945_read_ucode(struct il_priv *il)
1823{
1824 const struct il_ucode_header *ucode;
1825 int ret = -EINVAL, idx;
1826 const struct firmware *ucode_raw;
1827 /* firmware file name contains uCode/driver compatibility version */
1828 const char *name_pre = il->cfg->fw_name_pre;
1829 const unsigned int api_max = il->cfg->ucode_api_max;
1830 const unsigned int api_min = il->cfg->ucode_api_min;
1831 char buf[25];
1832 u8 *src;
1833 size_t len;
1834 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1835
1836 /* Ask kernel firmware_class module to get the boot firmware off disk.
1837 * request_firmware() is synchronous, file is in memory on return. */
1838 for (idx = api_max; idx >= api_min; idx--) {
1839 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
1840 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
1841 if (ret < 0) {
1842 IL_ERR("%s firmware file req failed: %d\n", buf, ret);
1843 if (ret == -ENOENT)
1844 continue;
1845 else
1846 goto error;
1847 } else {
1848 if (idx < api_max)
1849 IL_ERR("Loaded firmware %s, "
1850 "which is deprecated. "
1851 " Please use API v%u instead.\n", buf,
1852 api_max);
1853 D_INFO("Got firmware '%s' file "
1854 "(%zd bytes) from disk\n", buf, ucode_raw->size);
1855 break;
1856 }
1857 }
1858
1859 if (ret < 0)
1860 goto error;
1861
1862 /* Make sure that we got at least our header! */
1863 if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
1864 IL_ERR("File size way too small!\n");
1865 ret = -EINVAL;
1866 goto err_release;
1867 }
1868
1869 /* Data from ucode file: header followed by uCode images */
1870 ucode = (struct il_ucode_header *)ucode_raw->data;
1871
1872 il->ucode_ver = le32_to_cpu(ucode->ver);
1873 api_ver = IL_UCODE_API(il->ucode_ver);
1874 inst_size = il3945_ucode_get_inst_size(ucode);
1875 data_size = il3945_ucode_get_data_size(ucode);
1876 init_size = il3945_ucode_get_init_size(ucode);
1877 init_data_size = il3945_ucode_get_init_data_size(ucode);
1878 boot_size = il3945_ucode_get_boot_size(ucode);
1879 src = il3945_ucode_get_data(ucode);
1880
1881 /* api_ver should match the api version forming part of the
1882 * firmware filename ... but we don't check for that and only rely
1883 * on the API version read from firmware header from here on forward */
1884
1885 if (api_ver < api_min || api_ver > api_max) {
1886 IL_ERR("Driver unable to support your firmware API. "
1887 "Driver supports v%u, firmware is v%u.\n", api_max,
1888 api_ver);
1889 il->ucode_ver = 0;
1890 ret = -EINVAL;
1891 goto err_release;
1892 }
1893 if (api_ver != api_max)
1894 IL_ERR("Firmware has old API version. Expected %u, "
1895 "got %u. New firmware can be obtained "
1896 "from http://www.intellinuxwireless.org.\n", api_max,
1897 api_ver);
1898
1899 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
1900 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
1901 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
1902
1903 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
1904 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
1905 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
1906 IL_UCODE_SERIAL(il->ucode_ver));
1907
1908 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
1909 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
1910 D_INFO("f/w package hdr runtime data size = %u\n", data_size);
1911 D_INFO("f/w package hdr init inst size = %u\n", init_size);
1912 D_INFO("f/w package hdr init data size = %u\n", init_data_size);
1913 D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
1914
1915 /* Verify size of file vs. image size info in file's header */
1916 if (ucode_raw->size !=
1917 il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
1918 init_size + init_data_size + boot_size) {
1919
1920 D_INFO("uCode file size %zd does not match expected size\n",
1921 ucode_raw->size);
1922 ret = -EINVAL;
1923 goto err_release;
1924 }
1925
1926 /* Verify that uCode images will fit in card's SRAM */
1927 if (inst_size > IL39_MAX_INST_SIZE) {
1928 D_INFO("uCode instr len %d too large to fit in\n", inst_size);
1929 ret = -EINVAL;
1930 goto err_release;
1931 }
1932
1933 if (data_size > IL39_MAX_DATA_SIZE) {
1934 D_INFO("uCode data len %d too large to fit in\n", data_size);
1935 ret = -EINVAL;
1936 goto err_release;
1937 }
1938 if (init_size > IL39_MAX_INST_SIZE) {
1939 D_INFO("uCode init instr len %d too large to fit in\n",
1940 init_size);
1941 ret = -EINVAL;
1942 goto err_release;
1943 }
1944 if (init_data_size > IL39_MAX_DATA_SIZE) {
1945 D_INFO("uCode init data len %d too large to fit in\n",
1946 init_data_size);
1947 ret = -EINVAL;
1948 goto err_release;
1949 }
1950 if (boot_size > IL39_MAX_BSM_SIZE) {
1951 D_INFO("uCode boot instr len %d too large to fit in\n",
1952 boot_size);
1953 ret = -EINVAL;
1954 goto err_release;
1955 }
1956
1957 /* Allocate ucode buffers for card's bus-master loading ... */
1958
1959 /* Runtime instructions and 2 copies of data:
1960 * 1) unmodified from disk
1961 * 2) backup cache for save/restore during power-downs */
1962 il->ucode_code.len = inst_size;
1963 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
1964
1965 il->ucode_data.len = data_size;
1966 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
1967
1968 il->ucode_data_backup.len = data_size;
1969 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
1970
1971 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
1972 !il->ucode_data_backup.v_addr)
1973 goto err_pci_alloc;
1974
1975 /* Initialization instructions and data */
1976 if (init_size && init_data_size) {
1977 il->ucode_init.len = init_size;
1978 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
1979
1980 il->ucode_init_data.len = init_data_size;
1981 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
1982
1983 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
1984 goto err_pci_alloc;
1985 }
1986
1987 /* Bootstrap (instructions only, no data) */
1988 if (boot_size) {
1989 il->ucode_boot.len = boot_size;
1990 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
1991
1992 if (!il->ucode_boot.v_addr)
1993 goto err_pci_alloc;
1994 }
1995
1996 /* Copy images into buffers for card's bus-master reads ... */
1997
1998 /* Runtime instructions (first block of data in file) */
1999 len = inst_size;
2000 D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
2001 memcpy(il->ucode_code.v_addr, src, len);
2002 src += len;
2003
2004 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2005 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
2006
2007 /* Runtime data (2nd block)
2008 * NOTE: Copy into backup buffer will be done in il3945_up() */
2009 len = data_size;
2010 D_INFO("Copying (but not loading) uCode data len %zd\n", len);
2011 memcpy(il->ucode_data.v_addr, src, len);
2012 memcpy(il->ucode_data_backup.v_addr, src, len);
2013 src += len;
2014
2015 /* Initialization instructions (3rd block) */
2016 if (init_size) {
2017 len = init_size;
2018 D_INFO("Copying (but not loading) init instr len %zd\n", len);
2019 memcpy(il->ucode_init.v_addr, src, len);
2020 src += len;
2021 }
2022
2023 /* Initialization data (4th block) */
2024 if (init_data_size) {
2025 len = init_data_size;
2026 D_INFO("Copying (but not loading) init data len %zd\n", len);
2027 memcpy(il->ucode_init_data.v_addr, src, len);
2028 src += len;
2029 }
2030
2031 /* Bootstrap instructions (5th block) */
2032 len = boot_size;
2033 D_INFO("Copying (but not loading) boot instr len %zd\n", len);
2034 memcpy(il->ucode_boot.v_addr, src, len);
2035
2036 /* We have our copies now, allow OS release its copies */
2037 release_firmware(ucode_raw);
2038 return 0;
2039
2040err_pci_alloc:
2041 IL_ERR("failed to allocate pci memory\n");
2042 ret = -ENOMEM;
2043 il3945_dealloc_ucode_pci(il);
2044
2045err_release:
2046 release_firmware(ucode_raw);
2047
2048error:
2049 return ret;
2050}
2051
2052/**
2053 * il3945_set_ucode_ptrs - Set uCode address location
2054 *
2055 * Tell initialization uCode where to find runtime uCode.
2056 *
2057 * BSM registers initially contain pointers to initialization uCode.
2058 * We need to replace them to load runtime uCode inst and data,
2059 * and to save runtime data when powering down.
2060 */
2061static int
2062il3945_set_ucode_ptrs(struct il_priv *il)
2063{
2064 dma_addr_t pinst;
2065 dma_addr_t pdata;
2066
2067 /* bits 31:0 for 3945 */
2068 pinst = il->ucode_code.p_addr;
2069 pdata = il->ucode_data_backup.p_addr;
2070
2071 /* Tell bootstrap uCode where to find image to load */
2072 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
2073 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
2074 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
2075
2076 /* Inst byte count must be last to set up, bit 31 signals uCode
2077 * that all new ptr/size info is in place */
2078 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
2079 il->ucode_code.len | BSM_DRAM_INST_LOAD);
2080
2081 D_INFO("Runtime uCode pointers are set.\n");
2082
2083 return 0;
2084}
2085
2086/**
2087 * il3945_init_alive_start - Called after N_ALIVE notification received
2088 *
2089 * Called after N_ALIVE notification received from "initialize" uCode.
2090 *
2091 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2092 */
2093static void
2094il3945_init_alive_start(struct il_priv *il)
2095{
2096 /* Check alive response for "valid" sign from uCode */
2097 if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
2098 /* We had an error bringing up the hardware, so take it
2099 * all the way back down so we can try again */
2100 D_INFO("Initialize Alive failed.\n");
2101 goto restart;
2102 }
2103
2104 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2105 * This is a paranoid check, because we would not have gotten the
2106 * "initialize" alive if code weren't properly loaded. */
2107 if (il3945_verify_ucode(il)) {
2108 /* Runtime instruction load was bad;
2109 * take it all the way back down so we can try again */
2110 D_INFO("Bad \"initialize\" uCode load.\n");
2111 goto restart;
2112 }
2113
2114 /* Send pointers to protocol/runtime uCode image ... init code will
2115 * load and launch runtime uCode, which will send us another "Alive"
2116 * notification. */
2117 D_INFO("Initialization Alive received.\n");
2118 if (il3945_set_ucode_ptrs(il)) {
2119 /* Runtime instruction load won't happen;
2120 * take it all the way back down so we can try again */
2121 D_INFO("Couldn't set up uCode pointers.\n");
2122 goto restart;
2123 }
2124 return;
2125
2126restart:
2127 queue_work(il->workqueue, &il->restart);
2128}
2129
2130/**
2131 * il3945_alive_start - called after N_ALIVE notification received
2132 * from protocol/runtime uCode (initialization uCode's
2133 * Alive gets handled by il3945_init_alive_start()).
2134 */
2135static void
2136il3945_alive_start(struct il_priv *il)
2137{
2138 int thermal_spin = 0;
2139 u32 rfkill;
2140
2141 D_INFO("Runtime Alive received.\n");
2142
2143 if (il->card_alive.is_valid != UCODE_VALID_OK) {
2144 /* We had an error bringing up the hardware, so take it
2145 * all the way back down so we can try again */
2146 D_INFO("Alive failed.\n");
2147 goto restart;
2148 }
2149
2150 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2151 * This is a paranoid check, because we would not have gotten the
2152 * "runtime" alive if code weren't properly loaded. */
2153 if (il3945_verify_ucode(il)) {
2154 /* Runtime instruction load was bad;
2155 * take it all the way back down so we can try again */
2156 D_INFO("Bad runtime uCode load.\n");
2157 goto restart;
2158 }
2159
2160 rfkill = il_rd_prph(il, APMG_RFKILL_REG);
2161 D_INFO("RFKILL status: 0x%x\n", rfkill);
2162
2163 if (rfkill & 0x1) {
2164 clear_bit(S_RFKILL, &il->status);
2165 /* if RFKILL is not on, then wait for thermal
2166 * sensor in adapter to kick in */
2167 while (il3945_hw_get_temperature(il) == 0) {
2168 thermal_spin++;
2169 udelay(10);
2170 }
2171
2172 if (thermal_spin)
2173 D_INFO("Thermal calibration took %dus\n",
2174 thermal_spin * 10);
2175 } else
2176 set_bit(S_RFKILL, &il->status);
2177
2178 /* After the ALIVE response, we can send commands to 3945 uCode */
2179 set_bit(S_ALIVE, &il->status);
2180
2181 /* Enable watchdog to monitor the driver tx queues */
2182 il_setup_watchdog(il);
2183
2184 if (il_is_rfkill(il))
2185 return;
2186
2187 ieee80211_wake_queues(il->hw);
2188
2189 il->active_rate = RATES_MASK_3945;
2190
2191 il_power_update_mode(il, true);
2192
2193 if (il_is_associated(il)) {
2194 struct il3945_rxon_cmd *active_rxon =
2195 (struct il3945_rxon_cmd *)(&il->active);
2196
2197 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2198 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2199 } else {
2200 /* Initialize our rx_config data */
2201 il_connection_init_rx_config(il);
2202 }
2203
2204 /* Configure Bluetooth device coexistence support */
2205 il_send_bt_config(il);
2206
2207 set_bit(S_READY, &il->status);
2208
2209 /* Configure the adapter for unassociated operation */
2210 il3945_commit_rxon(il);
2211
2212 il3945_reg_txpower_periodic(il);
2213
2214 D_INFO("ALIVE processing complete.\n");
2215 wake_up(&il->wait_command_queue);
2216
2217 return;
2218
2219restart:
2220 queue_work(il->workqueue, &il->restart);
2221}
2222
2223static void il3945_cancel_deferred_work(struct il_priv *il);
2224
2225static void
2226__il3945_down(struct il_priv *il)
2227{
2228 unsigned long flags;
2229 int exit_pending;
2230
2231 D_INFO(DRV_NAME " is going down\n");
2232
2233 il_scan_cancel_timeout(il, 200);
2234
2235 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
2236
2237 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
2238 * to prevent rearm timer */
2239 del_timer_sync(&il->watchdog);
2240
2241 /* Station information will now be cleared in device */
2242 il_clear_ucode_stations(il);
2243 il_dealloc_bcast_stations(il);
2244 il_clear_driver_stations(il);
2245
2246 /* Unblock any waiting calls */
2247 wake_up_all(&il->wait_command_queue);
2248
2249 /* Wipe out the EXIT_PENDING status bit if we are not actually
2250 * exiting the module */
2251 if (!exit_pending)
2252 clear_bit(S_EXIT_PENDING, &il->status);
2253
2254 /* stop and reset the on-board processor */
2255 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2256
2257 /* tell the device to stop sending interrupts */
2258 spin_lock_irqsave(&il->lock, flags);
2259 il_disable_interrupts(il);
2260 spin_unlock_irqrestore(&il->lock, flags);
2261 il3945_synchronize_irq(il);
2262
2263 if (il->mac80211_registered)
2264 ieee80211_stop_queues(il->hw);
2265
2266 /* If we have not previously called il3945_init() then
2267 * clear all bits but the RF Kill bits and return */
2268 if (!il_is_init(il)) {
2269 il->status =
2270 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2271 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2272 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2273 goto exit;
2274 }
2275
2276 /* ...otherwise clear out all the status bits but the RF Kill
2277 * bit and continue taking the NIC down. */
2278 il->status &=
2279 test_bit(S_RFKILL, &il->status) << S_RFKILL |
2280 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
2281 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
2282 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
2283
2284 /*
2285 * We disabled and synchronized interrupt, and priv->mutex is taken, so
2286 * here is the only thread which will program device registers, but
2287 * still have lockdep assertions, so we are taking reg_lock.
2288 */
2289 spin_lock_irq(&il->reg_lock);
2290 /* FIXME: il_grab_nic_access if rfkill is off ? */
2291
2292 il3945_hw_txq_ctx_stop(il);
2293 il3945_hw_rxq_stop(il);
2294 /* Power-down device's busmaster DMA clocks */
2295 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2296 udelay(5);
2297 /* Stop the device, and put it in low power state */
2298 _il_apm_stop(il);
2299
2300 spin_unlock_irq(&il->reg_lock);
2301
2302 il3945_hw_txq_ctx_free(il);
2303exit:
2304 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
2305 dev_kfree_skb(il->beacon_skb);
2306 il->beacon_skb = NULL;
2307
2308 /* clear out any free frames */
2309 il3945_clear_free_frames(il);
2310}
2311
2312static void
2313il3945_down(struct il_priv *il)
2314{
2315 mutex_lock(&il->mutex);
2316 __il3945_down(il);
2317 mutex_unlock(&il->mutex);
2318
2319 il3945_cancel_deferred_work(il);
2320}
2321
2322#define MAX_HW_RESTARTS 5
2323
2324static int
2325il3945_alloc_bcast_station(struct il_priv *il)
2326{
2327 unsigned long flags;
2328 u8 sta_id;
2329
2330 spin_lock_irqsave(&il->sta_lock, flags);
2331 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
2332 if (sta_id == IL_INVALID_STATION) {
2333 IL_ERR("Unable to prepare broadcast station\n");
2334 spin_unlock_irqrestore(&il->sta_lock, flags);
2335
2336 return -EINVAL;
2337 }
2338
2339 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
2340 il->stations[sta_id].used |= IL_STA_BCAST;
2341 spin_unlock_irqrestore(&il->sta_lock, flags);
2342
2343 return 0;
2344}
2345
2346static int
2347__il3945_up(struct il_priv *il)
2348{
2349 int rc, i;
2350
2351 rc = il3945_alloc_bcast_station(il);
2352 if (rc)
2353 return rc;
2354
2355 if (test_bit(S_EXIT_PENDING, &il->status)) {
2356 IL_WARN("Exit pending; will not bring the NIC up\n");
2357 return -EIO;
2358 }
2359
2360 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
2361 IL_ERR("ucode not available for device bring up\n");
2362 return -EIO;
2363 }
2364
2365 /* If platform's RF_KILL switch is NOT set to KILL */
2366 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2367 clear_bit(S_RFKILL, &il->status);
2368 else {
2369 set_bit(S_RFKILL, &il->status);
2370 return -ERFKILL;
2371 }
2372
2373 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2374
2375 rc = il3945_hw_nic_init(il);
2376 if (rc) {
2377 IL_ERR("Unable to int nic\n");
2378 return rc;
2379 }
2380
2381 /* make sure rfkill handshake bits are cleared */
2382 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2383 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2384
2385 /* clear (again), then enable host interrupts */
2386 _il_wr(il, CSR_INT, 0xFFFFFFFF);
2387 il_enable_interrupts(il);
2388
2389 /* really make sure rfkill handshake bits are cleared */
2390 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2391 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2392
2393 /* Copy original ucode data image from disk into backup cache.
2394 * This will be used to initialize the on-board processor's
2395 * data SRAM for a clean start when the runtime program first loads. */
2396 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
2397 il->ucode_data.len);
2398
2399 /* We return success when we resume from suspend and rf_kill is on. */
2400 if (test_bit(S_RFKILL, &il->status))
2401 return 0;
2402
2403 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2404
2405 /* load bootstrap state machine,
2406 * load bootstrap program into processor's memory,
2407 * prepare to load the "initialize" uCode */
2408 rc = il->ops->load_ucode(il);
2409
2410 if (rc) {
2411 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
2412 continue;
2413 }
2414
2415 /* start card; "initialize" will load runtime ucode */
2416 il3945_nic_start(il);
2417
2418 D_INFO(DRV_NAME " is coming up\n");
2419
2420 return 0;
2421 }
2422
2423 set_bit(S_EXIT_PENDING, &il->status);
2424 __il3945_down(il);
2425 clear_bit(S_EXIT_PENDING, &il->status);
2426
2427 /* tried to restart and config the device for as long as our
2428 * patience could withstand */
2429 IL_ERR("Unable to initialize device after %d attempts.\n", i);
2430 return -EIO;
2431}
2432
2433/*****************************************************************************
2434 *
2435 * Workqueue callbacks
2436 *
2437 *****************************************************************************/
2438
2439static void
2440il3945_bg_init_alive_start(struct work_struct *data)
2441{
2442 struct il_priv *il =
2443 container_of(data, struct il_priv, init_alive_start.work);
2444
2445 mutex_lock(&il->mutex);
2446 if (test_bit(S_EXIT_PENDING, &il->status))
2447 goto out;
2448
2449 il3945_init_alive_start(il);
2450out:
2451 mutex_unlock(&il->mutex);
2452}
2453
2454static void
2455il3945_bg_alive_start(struct work_struct *data)
2456{
2457 struct il_priv *il =
2458 container_of(data, struct il_priv, alive_start.work);
2459
2460 mutex_lock(&il->mutex);
2461 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
2462 goto out;
2463
2464 il3945_alive_start(il);
2465out:
2466 mutex_unlock(&il->mutex);
2467}
2468
2469/*
2470 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2471 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2472 * *is* readable even when device has been SW_RESET into low power mode
2473 * (e.g. during RF KILL).
2474 */
2475static void
2476il3945_rfkill_poll(struct work_struct *data)
2477{
2478 struct il_priv *il =
2479 container_of(data, struct il_priv, _3945.rfkill_poll.work);
2480 bool old_rfkill = test_bit(S_RFKILL, &il->status);
2481 bool new_rfkill =
2482 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2483
2484 if (new_rfkill != old_rfkill) {
2485 if (new_rfkill)
2486 set_bit(S_RFKILL, &il->status);
2487 else
2488 clear_bit(S_RFKILL, &il->status);
2489
2490 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
2491
2492 D_RF_KILL("RF_KILL bit toggled to %s.\n",
2493 new_rfkill ? "disable radio" : "enable radio");
2494 }
2495
2496 /* Keep this running, even if radio now enabled. This will be
2497 * cancelled in mac_start() if system decides to start again */
2498 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2499 round_jiffies_relative(2 * HZ));
2500
2501}
2502
2503int
2504il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
2505{
2506 struct il_host_cmd cmd = {
2507 .id = C_SCAN,
2508 .len = sizeof(struct il3945_scan_cmd),
2509 .flags = CMD_SIZE_HUGE,
2510 };
2511 struct il3945_scan_cmd *scan;
2512 u8 n_probes = 0;
2513 enum nl80211_band band;
2514 bool is_active = false;
2515 int ret;
2516 u16 len;
2517
2518 lockdep_assert_held(&il->mutex);
2519
2520 if (!il->scan_cmd) {
2521 il->scan_cmd =
2522 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
2523 GFP_KERNEL);
2524 if (!il->scan_cmd) {
2525 D_SCAN("Fail to allocate scan memory\n");
2526 return -ENOMEM;
2527 }
2528 }
2529 scan = il->scan_cmd;
2530 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
2531
2532 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
2533 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
2534
2535 if (il_is_associated(il)) {
2536 u16 interval;
2537 u32 extra;
2538 u32 suspend_time = 100;
2539 u32 scan_suspend_time = 100;
2540
2541 D_INFO("Scanning while associated...\n");
2542
2543 interval = vif->bss_conf.beacon_int;
2544
2545 scan->suspend_time = 0;
2546 scan->max_out_time = cpu_to_le32(200 * 1024);
2547 if (!interval)
2548 interval = suspend_time;
2549 /*
2550 * suspend time format:
2551 * 0-19: beacon interval in usec (time before exec.)
2552 * 20-23: 0
2553 * 24-31: number of beacons (suspend between channels)
2554 */
2555
2556 extra = (suspend_time / interval) << 24;
2557 scan_suspend_time =
2558 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
2559
2560 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2561 D_SCAN("suspend_time 0x%X beacon interval %d\n",
2562 scan_suspend_time, interval);
2563 }
2564
2565 if (il->scan_request->n_ssids) {
2566 int i, p = 0;
2567 D_SCAN("Kicking off active scan\n");
2568 for (i = 0; i < il->scan_request->n_ssids; i++) {
2569 /* always does wildcard anyway */
2570 if (!il->scan_request->ssids[i].ssid_len)
2571 continue;
2572 scan->direct_scan[p].id = WLAN_EID_SSID;
2573 scan->direct_scan[p].len =
2574 il->scan_request->ssids[i].ssid_len;
2575 memcpy(scan->direct_scan[p].ssid,
2576 il->scan_request->ssids[i].ssid,
2577 il->scan_request->ssids[i].ssid_len);
2578 n_probes++;
2579 p++;
2580 }
2581 is_active = true;
2582 } else
2583 D_SCAN("Kicking off passive scan.\n");
2584
2585 /* We don't build a direct scan probe request; the uCode will do
2586 * that based on the direct_mask added to each channel entry */
2587 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2588 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
2589 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2590
2591 /* flags + rate selection */
2592
2593 switch (il->scan_band) {
2594 case NL80211_BAND_2GHZ:
2595 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2596 scan->tx_cmd.rate = RATE_1M_PLCP;
2597 band = NL80211_BAND_2GHZ;
2598 break;
2599 case NL80211_BAND_5GHZ:
2600 scan->tx_cmd.rate = RATE_6M_PLCP;
2601 band = NL80211_BAND_5GHZ;
2602 break;
2603 default:
2604 IL_WARN("Invalid scan band\n");
2605 return -EIO;
2606 }
2607
2608 /*
2609 * If active scaning is requested but a certain channel is marked
2610 * passive, we can do active scanning if we detect transmissions. For
2611 * passive only scanning disable switching to active on any channel.
2612 */
2613 scan->good_CRC_th =
2614 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
2615
2616 len =
2617 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
2618 vif->addr, il->scan_request->ie,
2619 il->scan_request->ie_len,
2620 IL_MAX_SCAN_SIZE - sizeof(*scan));
2621 scan->tx_cmd.len = cpu_to_le16(len);
2622
2623 /* select Rx antennas */
2624 scan->flags |= il3945_get_antenna_flags(il);
2625
2626 scan->channel_count =
2627 il3945_get_channels_for_scan(il, band, is_active, n_probes,
2628 (void *)&scan->data[len], vif);
2629 if (scan->channel_count == 0) {
2630 D_SCAN("channel count %d\n", scan->channel_count);
2631 return -EIO;
2632 }
2633
2634 cmd.len +=
2635 le16_to_cpu(scan->tx_cmd.len) +
2636 scan->channel_count * sizeof(struct il3945_scan_channel);
2637 cmd.data = scan;
2638 scan->len = cpu_to_le16(cmd.len);
2639
2640 set_bit(S_SCAN_HW, &il->status);
2641 ret = il_send_cmd_sync(il, &cmd);
2642 if (ret)
2643 clear_bit(S_SCAN_HW, &il->status);
2644 return ret;
2645}
2646
2647void
2648il3945_post_scan(struct il_priv *il)
2649{
2650 /*
2651 * Since setting the RXON may have been deferred while
2652 * performing the scan, fire one off if needed
2653 */
2654 if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
2655 il3945_commit_rxon(il);
2656}
2657
2658static void
2659il3945_bg_restart(struct work_struct *data)
2660{
2661 struct il_priv *il = container_of(data, struct il_priv, restart);
2662
2663 if (test_bit(S_EXIT_PENDING, &il->status))
2664 return;
2665
2666 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
2667 mutex_lock(&il->mutex);
2668 il->is_open = 0;
2669 mutex_unlock(&il->mutex);
2670 il3945_down(il);
2671 ieee80211_restart_hw(il->hw);
2672 } else {
2673 il3945_down(il);
2674
2675 mutex_lock(&il->mutex);
2676 if (test_bit(S_EXIT_PENDING, &il->status)) {
2677 mutex_unlock(&il->mutex);
2678 return;
2679 }
2680
2681 __il3945_up(il);
2682 mutex_unlock(&il->mutex);
2683 }
2684}
2685
2686static void
2687il3945_bg_rx_replenish(struct work_struct *data)
2688{
2689 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
2690
2691 mutex_lock(&il->mutex);
2692 if (test_bit(S_EXIT_PENDING, &il->status))
2693 goto out;
2694
2695 il3945_rx_replenish(il);
2696out:
2697 mutex_unlock(&il->mutex);
2698}
2699
2700void
2701il3945_post_associate(struct il_priv *il)
2702{
2703 int rc = 0;
2704
2705 if (!il->vif || !il->is_open)
2706 return;
2707
2708 D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
2709 il->active.bssid_addr);
2710
2711 if (test_bit(S_EXIT_PENDING, &il->status))
2712 return;
2713
2714 il_scan_cancel_timeout(il, 200);
2715
2716 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2717 il3945_commit_rxon(il);
2718
2719 rc = il_send_rxon_timing(il);
2720 if (rc)
2721 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
2722
2723 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2724
2725 il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
2726
2727 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
2728 il->vif->bss_conf.beacon_int);
2729
2730 if (il->vif->bss_conf.use_short_preamble)
2731 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2732 else
2733 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2734
2735 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2736 if (il->vif->bss_conf.use_short_slot)
2737 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2738 else
2739 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2740 }
2741
2742 il3945_commit_rxon(il);
2743
2744 switch (il->vif->type) {
2745 case NL80211_IFTYPE_STATION:
2746 il3945_rate_scale_init(il->hw, IL_AP_ID);
2747 break;
2748 case NL80211_IFTYPE_ADHOC:
2749 il3945_send_beacon_cmd(il);
2750 break;
2751 default:
2752 IL_ERR("%s Should not be called in %d mode\n", __func__,
2753 il->vif->type);
2754 break;
2755 }
2756}
2757
2758/*****************************************************************************
2759 *
2760 * mac80211 entry point functions
2761 *
2762 *****************************************************************************/
2763
2764#define UCODE_READY_TIMEOUT (2 * HZ)
2765
2766static int
2767il3945_mac_start(struct ieee80211_hw *hw)
2768{
2769 struct il_priv *il = hw->priv;
2770 int ret;
2771
2772 /* we should be verifying the device is ready to be opened */
2773 mutex_lock(&il->mutex);
2774 D_MAC80211("enter\n");
2775
2776 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2777 * ucode filename and max sizes are card-specific. */
2778
2779 if (!il->ucode_code.len) {
2780 ret = il3945_read_ucode(il);
2781 if (ret) {
2782 IL_ERR("Could not read microcode: %d\n", ret);
2783 mutex_unlock(&il->mutex);
2784 goto out_release_irq;
2785 }
2786 }
2787
2788 ret = __il3945_up(il);
2789
2790 mutex_unlock(&il->mutex);
2791
2792 if (ret)
2793 goto out_release_irq;
2794
2795 D_INFO("Start UP work.\n");
2796
2797 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2798 * mac80211 will not be run successfully. */
2799 ret = wait_event_timeout(il->wait_command_queue,
2800 test_bit(S_READY, &il->status),
2801 UCODE_READY_TIMEOUT);
2802 if (!ret) {
2803 if (!test_bit(S_READY, &il->status)) {
2804 IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
2805 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2806 ret = -ETIMEDOUT;
2807 goto out_release_irq;
2808 }
2809 }
2810
2811 /* ucode is running and will send rfkill notifications,
2812 * no need to poll the killswitch state anymore */
2813 cancel_delayed_work(&il->_3945.rfkill_poll);
2814
2815 il->is_open = 1;
2816 D_MAC80211("leave\n");
2817 return 0;
2818
2819out_release_irq:
2820 il->is_open = 0;
2821 D_MAC80211("leave - failed\n");
2822 return ret;
2823}
2824
2825static void
2826il3945_mac_stop(struct ieee80211_hw *hw)
2827{
2828 struct il_priv *il = hw->priv;
2829
2830 D_MAC80211("enter\n");
2831
2832 if (!il->is_open) {
2833 D_MAC80211("leave - skip\n");
2834 return;
2835 }
2836
2837 il->is_open = 0;
2838
2839 il3945_down(il);
2840
2841 flush_workqueue(il->workqueue);
2842
2843 /* start polling the killswitch state again */
2844 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
2845 round_jiffies_relative(2 * HZ));
2846
2847 D_MAC80211("leave\n");
2848}
2849
2850static void
2851il3945_mac_tx(struct ieee80211_hw *hw,
2852 struct ieee80211_tx_control *control,
2853 struct sk_buff *skb)
2854{
2855 struct il_priv *il = hw->priv;
2856
2857 D_MAC80211("enter\n");
2858
2859 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2860 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2861
2862 if (il3945_tx_skb(il, control->sta, skb))
2863 dev_kfree_skb_any(skb);
2864
2865 D_MAC80211("leave\n");
2866}
2867
2868void
2869il3945_config_ap(struct il_priv *il)
2870{
2871 struct ieee80211_vif *vif = il->vif;
2872 int rc = 0;
2873
2874 if (test_bit(S_EXIT_PENDING, &il->status))
2875 return;
2876
2877 /* The following should be done only at AP bring up */
2878 if (!(il_is_associated(il))) {
2879
2880 /* RXON - unassoc (to set timing command) */
2881 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2882 il3945_commit_rxon(il);
2883
2884 /* RXON Timing */
2885 rc = il_send_rxon_timing(il);
2886 if (rc)
2887 IL_WARN("C_RXON_TIMING failed - "
2888 "Attempting to continue.\n");
2889
2890 il->staging.assoc_id = 0;
2891
2892 if (vif->bss_conf.use_short_preamble)
2893 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2894 else
2895 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2896
2897 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
2898 if (vif->bss_conf.use_short_slot)
2899 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2900 else
2901 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2902 }
2903 /* restore RXON assoc */
2904 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2905 il3945_commit_rxon(il);
2906 }
2907 il3945_send_beacon_cmd(il);
2908}
2909
2910static int
2911il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2912 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2913 struct ieee80211_key_conf *key)
2914{
2915 struct il_priv *il = hw->priv;
2916 int ret = 0;
2917 u8 sta_id = IL_INVALID_STATION;
2918 u8 static_key;
2919
2920 D_MAC80211("enter\n");
2921
2922 if (il3945_mod_params.sw_crypto) {
2923 D_MAC80211("leave - hwcrypto disabled\n");
2924 return -EOPNOTSUPP;
2925 }
2926
2927 /*
2928 * To support IBSS RSN, don't program group keys in IBSS, the
2929 * hardware will then not attempt to decrypt the frames.
2930 */
2931 if (vif->type == NL80211_IFTYPE_ADHOC &&
2932 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
2933 D_MAC80211("leave - IBSS RSN\n");
2934 return -EOPNOTSUPP;
2935 }
2936
2937 static_key = !il_is_associated(il);
2938
2939 if (!static_key) {
2940 sta_id = il_sta_id_or_broadcast(il, sta);
2941 if (sta_id == IL_INVALID_STATION) {
2942 D_MAC80211("leave - station not found\n");
2943 return -EINVAL;
2944 }
2945 }
2946
2947 mutex_lock(&il->mutex);
2948 il_scan_cancel_timeout(il, 100);
2949
2950 switch (cmd) {
2951 case SET_KEY:
2952 if (static_key)
2953 ret = il3945_set_static_key(il, key);
2954 else
2955 ret = il3945_set_dynamic_key(il, key, sta_id);
2956 D_MAC80211("enable hwcrypto key\n");
2957 break;
2958 case DISABLE_KEY:
2959 if (static_key)
2960 ret = il3945_remove_static_key(il);
2961 else
2962 ret = il3945_clear_sta_key_info(il, sta_id);
2963 D_MAC80211("disable hwcrypto key\n");
2964 break;
2965 default:
2966 ret = -EINVAL;
2967 }
2968
2969 D_MAC80211("leave ret %d\n", ret);
2970 mutex_unlock(&il->mutex);
2971
2972 return ret;
2973}
2974
2975static int
2976il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2977 struct ieee80211_sta *sta)
2978{
2979 struct il_priv *il = hw->priv;
2980 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
2981 int ret;
2982 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
2983 u8 sta_id;
2984
2985 mutex_lock(&il->mutex);
2986 D_INFO("station %pM\n", sta->addr);
2987 sta_priv->common.sta_id = IL_INVALID_STATION;
2988
2989 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
2990 if (ret) {
2991 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
2992 /* Should we return success if return code is EEXIST ? */
2993 mutex_unlock(&il->mutex);
2994 return ret;
2995 }
2996
2997 sta_priv->common.sta_id = sta_id;
2998
2999 /* Initialize rate scaling */
3000 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
3001 il3945_rs_rate_init(il, sta, sta_id);
3002 mutex_unlock(&il->mutex);
3003
3004 return 0;
3005}
3006
3007static void
3008il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
3009 unsigned int *total_flags, u64 multicast)
3010{
3011 struct il_priv *il = hw->priv;
3012 __le32 filter_or = 0, filter_nand = 0;
3013
3014#define CHK(test, flag) do { \
3015 if (*total_flags & (test)) \
3016 filter_or |= (flag); \
3017 else \
3018 filter_nand |= (flag); \
3019 } while (0)
3020
3021 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
3022 *total_flags);
3023
3024 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
3025 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3026 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3027
3028#undef CHK
3029
3030 mutex_lock(&il->mutex);
3031
3032 il->staging.filter_flags &= ~filter_nand;
3033 il->staging.filter_flags |= filter_or;
3034
3035 /*
3036 * Not committing directly because hardware can perform a scan,
3037 * but even if hw is ready, committing here breaks for some reason,
3038 * we'll eventually commit the filter flags change anyway.
3039 */
3040
3041 mutex_unlock(&il->mutex);
3042
3043 /*
3044 * Receiving all multicast frames is always enabled by the
3045 * default flags setup in il_connection_init_rx_config()
3046 * since we currently do not support programming multicast
3047 * filters into the device.
3048 */
3049 *total_flags &=
3050 FIF_OTHER_BSS | FIF_ALLMULTI |
3051 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3052}
3053
3054/*****************************************************************************
3055 *
3056 * sysfs attributes
3057 *
3058 *****************************************************************************/
3059
3060#ifdef CONFIG_IWLEGACY_DEBUG
3061
3062/*
3063 * The following adds a new attribute to the sysfs representation
3064 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3065 * used for controlling the debug level.
3066 *
3067 * See the level definitions in iwl for details.
3068 *
3069 * The debug_level being managed using sysfs below is a per device debug
3070 * level that is used instead of the global debug level if it (the per
3071 * device debug level) is set.
3072 */
3073static ssize_t
3074il3945_show_debug_level(struct device *d, struct device_attribute *attr,
3075 char *buf)
3076{
3077 struct il_priv *il = dev_get_drvdata(d);
3078 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
3079}
3080
3081static ssize_t
3082il3945_store_debug_level(struct device *d, struct device_attribute *attr,
3083 const char *buf, size_t count)
3084{
3085 struct il_priv *il = dev_get_drvdata(d);
3086 unsigned long val;
3087 int ret;
3088
3089 ret = kstrtoul(buf, 0, &val);
3090 if (ret)
3091 IL_INFO("%s is not in hex or decimal form.\n", buf);
3092 else
3093 il->debug_level = val;
3094
3095 return strnlen(buf, count);
3096}
3097
3098static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
3099 il3945_store_debug_level);
3100
3101#endif /* CONFIG_IWLEGACY_DEBUG */
3102
3103static ssize_t
3104il3945_show_temperature(struct device *d, struct device_attribute *attr,
3105 char *buf)
3106{
3107 struct il_priv *il = dev_get_drvdata(d);
3108
3109 if (!il_is_alive(il))
3110 return -EAGAIN;
3111
3112 return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
3113}
3114
3115static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
3116
3117static ssize_t
3118il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
3119{
3120 struct il_priv *il = dev_get_drvdata(d);
3121 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
3122}
3123
3124static ssize_t
3125il3945_store_tx_power(struct device *d, struct device_attribute *attr,
3126 const char *buf, size_t count)
3127{
3128 struct il_priv *il = dev_get_drvdata(d);
3129 char *p = (char *)buf;
3130 u32 val;
3131
3132 val = simple_strtoul(p, &p, 10);
3133 if (p == buf)
3134 IL_INFO(": %s is not in decimal form.\n", buf);
3135 else
3136 il3945_hw_reg_set_txpower(il, val);
3137
3138 return count;
3139}
3140
3141static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
3142
3143static ssize_t
3144il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
3145{
3146 struct il_priv *il = dev_get_drvdata(d);
3147
3148 return sprintf(buf, "0x%04X\n", il->active.flags);
3149}
3150
3151static ssize_t
3152il3945_store_flags(struct device *d, struct device_attribute *attr,
3153 const char *buf, size_t count)
3154{
3155 struct il_priv *il = dev_get_drvdata(d);
3156 u32 flags = simple_strtoul(buf, NULL, 0);
3157
3158 mutex_lock(&il->mutex);
3159 if (le32_to_cpu(il->staging.flags) != flags) {
3160 /* Cancel any currently running scans... */
3161 if (il_scan_cancel_timeout(il, 100))
3162 IL_WARN("Could not cancel scan.\n");
3163 else {
3164 D_INFO("Committing rxon.flags = 0x%04X\n", flags);
3165 il->staging.flags = cpu_to_le32(flags);
3166 il3945_commit_rxon(il);
3167 }
3168 }
3169 mutex_unlock(&il->mutex);
3170
3171 return count;
3172}
3173
3174static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
3175
3176static ssize_t
3177il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
3178 char *buf)
3179{
3180 struct il_priv *il = dev_get_drvdata(d);
3181
3182 return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
3183}
3184
3185static ssize_t
3186il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
3187 const char *buf, size_t count)
3188{
3189 struct il_priv *il = dev_get_drvdata(d);
3190 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3191
3192 mutex_lock(&il->mutex);
3193 if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
3194 /* Cancel any currently running scans... */
3195 if (il_scan_cancel_timeout(il, 100))
3196 IL_WARN("Could not cancel scan.\n");
3197 else {
3198 D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
3199 filter_flags);
3200 il->staging.filter_flags = cpu_to_le32(filter_flags);
3201 il3945_commit_rxon(il);
3202 }
3203 }
3204 mutex_unlock(&il->mutex);
3205
3206 return count;
3207}
3208
3209static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
3210 il3945_store_filter_flags);
3211
3212static ssize_t
3213il3945_show_measurement(struct device *d, struct device_attribute *attr,
3214 char *buf)
3215{
3216 struct il_priv *il = dev_get_drvdata(d);
3217 struct il_spectrum_notification measure_report;
3218 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3219 u8 *data = (u8 *) &measure_report;
3220 unsigned long flags;
3221
3222 spin_lock_irqsave(&il->lock, flags);
3223 if (!(il->measurement_status & MEASUREMENT_READY)) {
3224 spin_unlock_irqrestore(&il->lock, flags);
3225 return 0;
3226 }
3227 memcpy(&measure_report, &il->measure_report, size);
3228 il->measurement_status = 0;
3229 spin_unlock_irqrestore(&il->lock, flags);
3230
3231 while (size && PAGE_SIZE - len) {
3232 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3233 PAGE_SIZE - len, true);
3234 len = strlen(buf);
3235 if (PAGE_SIZE - len)
3236 buf[len++] = '\n';
3237
3238 ofs += 16;
3239 size -= min(size, 16U);
3240 }
3241
3242 return len;
3243}
3244
3245static ssize_t
3246il3945_store_measurement(struct device *d, struct device_attribute *attr,
3247 const char *buf, size_t count)
3248{
3249 struct il_priv *il = dev_get_drvdata(d);
3250 struct ieee80211_measurement_params params = {
3251 .channel = le16_to_cpu(il->active.channel),
3252 .start_time = cpu_to_le64(il->_3945.last_tsf),
3253 .duration = cpu_to_le16(1),
3254 };
3255 u8 type = IL_MEASURE_BASIC;
3256 u8 buffer[32];
3257 u8 channel;
3258
3259 if (count) {
3260 char *p = buffer;
3261 strlcpy(buffer, buf, sizeof(buffer));
3262 channel = simple_strtoul(p, NULL, 0);
3263 if (channel)
3264 params.channel = channel;
3265
3266 p = buffer;
3267 while (*p && *p != ' ')
3268 p++;
3269 if (*p)
3270 type = simple_strtoul(p + 1, NULL, 0);
3271 }
3272
3273 D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
3274 type, params.channel, buf);
3275 il3945_get_measurement(il, &params, type);
3276
3277 return count;
3278}
3279
3280static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
3281 il3945_store_measurement);
3282
3283static ssize_t
3284il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
3285 const char *buf, size_t count)
3286{
3287 struct il_priv *il = dev_get_drvdata(d);
3288
3289 il->retry_rate = simple_strtoul(buf, NULL, 0);
3290 if (il->retry_rate <= 0)
3291 il->retry_rate = 1;
3292
3293 return count;
3294}
3295
3296static ssize_t
3297il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
3298 char *buf)
3299{
3300 struct il_priv *il = dev_get_drvdata(d);
3301 return sprintf(buf, "%d", il->retry_rate);
3302}
3303
3304static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
3305 il3945_store_retry_rate);
3306
3307static ssize_t
3308il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
3309{
3310 /* all this shit doesn't belong into sysfs anyway */
3311 return 0;
3312}
3313
3314static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
3315
3316static ssize_t
3317il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
3318{
3319 struct il_priv *il = dev_get_drvdata(d);
3320
3321 if (!il_is_alive(il))
3322 return -EAGAIN;
3323
3324 return sprintf(buf, "%d\n", il3945_mod_params.antenna);
3325}
3326
3327static ssize_t
3328il3945_store_antenna(struct device *d, struct device_attribute *attr,
3329 const char *buf, size_t count)
3330{
3331 struct il_priv *il __maybe_unused = dev_get_drvdata(d);
3332 int ant;
3333
3334 if (count == 0)
3335 return 0;
3336
3337 if (sscanf(buf, "%1i", &ant) != 1) {
3338 D_INFO("not in hex or decimal form.\n");
3339 return count;
3340 }
3341
3342 if (ant >= 0 && ant <= 2) {
3343 D_INFO("Setting antenna select to %d.\n", ant);
3344 il3945_mod_params.antenna = (enum il3945_antenna)ant;
3345 } else
3346 D_INFO("Bad antenna select value %d.\n", ant);
3347
3348 return count;
3349}
3350
3351static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
3352
3353static ssize_t
3354il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
3355{
3356 struct il_priv *il = dev_get_drvdata(d);
3357 if (!il_is_alive(il))
3358 return -EAGAIN;
3359 return sprintf(buf, "0x%08x\n", (int)il->status);
3360}
3361
3362static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
3363
3364static ssize_t
3365il3945_dump_error_log(struct device *d, struct device_attribute *attr,
3366 const char *buf, size_t count)
3367{
3368 struct il_priv *il = dev_get_drvdata(d);
3369 char *p = (char *)buf;
3370
3371 if (p[0] == '1')
3372 il3945_dump_nic_error_log(il);
3373
3374 return strnlen(buf, count);
3375}
3376
3377static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
3378
3379/*****************************************************************************
3380 *
3381 * driver setup and tear down
3382 *
3383 *****************************************************************************/
3384
3385static int
3386il3945_setup_deferred_work(struct il_priv *il)
3387{
3388 il->workqueue = create_singlethread_workqueue(DRV_NAME);
3389 if (!il->workqueue)
3390 return -ENOMEM;
3391
3392 init_waitqueue_head(&il->wait_command_queue);
3393
3394 INIT_WORK(&il->restart, il3945_bg_restart);
3395 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
3396 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
3397 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
3398 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
3399
3400 il_setup_scan_deferred_work(il);
3401
3402 il3945_hw_setup_deferred_work(il);
3403
3404 timer_setup(&il->watchdog, il_bg_watchdog, 0);
3405
3406 tasklet_init(&il->irq_tasklet,
3407 il3945_irq_tasklet,
3408 (unsigned long)il);
3409
3410 return 0;
3411}
3412
3413static void
3414il3945_cancel_deferred_work(struct il_priv *il)
3415{
3416 il3945_hw_cancel_deferred_work(il);
3417
3418 cancel_delayed_work_sync(&il->init_alive_start);
3419 cancel_delayed_work(&il->alive_start);
3420
3421 il_cancel_scan_deferred_work(il);
3422}
3423
3424static struct attribute *il3945_sysfs_entries[] = {
3425 &dev_attr_antenna.attr,
3426 &dev_attr_channels.attr,
3427 &dev_attr_dump_errors.attr,
3428 &dev_attr_flags.attr,
3429 &dev_attr_filter_flags.attr,
3430 &dev_attr_measurement.attr,
3431 &dev_attr_retry_rate.attr,
3432 &dev_attr_status.attr,
3433 &dev_attr_temperature.attr,
3434 &dev_attr_tx_power.attr,
3435#ifdef CONFIG_IWLEGACY_DEBUG
3436 &dev_attr_debug_level.attr,
3437#endif
3438 NULL
3439};
3440
3441static const struct attribute_group il3945_attribute_group = {
3442 .name = NULL, /* put in device directory */
3443 .attrs = il3945_sysfs_entries,
3444};
3445
3446static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
3447 .tx = il3945_mac_tx,
3448 .start = il3945_mac_start,
3449 .stop = il3945_mac_stop,
3450 .add_interface = il_mac_add_interface,
3451 .remove_interface = il_mac_remove_interface,
3452 .change_interface = il_mac_change_interface,
3453 .config = il_mac_config,
3454 .configure_filter = il3945_configure_filter,
3455 .set_key = il3945_mac_set_key,
3456 .conf_tx = il_mac_conf_tx,
3457 .reset_tsf = il_mac_reset_tsf,
3458 .bss_info_changed = il_mac_bss_info_changed,
3459 .hw_scan = il_mac_hw_scan,
3460 .sta_add = il3945_mac_sta_add,
3461 .sta_remove = il_mac_sta_remove,
3462 .tx_last_beacon = il_mac_tx_last_beacon,
3463 .flush = il_mac_flush,
3464};
3465
3466static int
3467il3945_init_drv(struct il_priv *il)
3468{
3469 int ret;
3470 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
3471
3472 il->retry_rate = 1;
3473 il->beacon_skb = NULL;
3474
3475 spin_lock_init(&il->sta_lock);
3476 spin_lock_init(&il->hcmd_lock);
3477
3478 INIT_LIST_HEAD(&il->free_frames);
3479
3480 mutex_init(&il->mutex);
3481
3482 il->ieee_channels = NULL;
3483 il->ieee_rates = NULL;
3484 il->band = NL80211_BAND_2GHZ;
3485
3486 il->iw_mode = NL80211_IFTYPE_STATION;
3487 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
3488
3489 /* initialize force reset */
3490 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
3491
3492 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3493 IL_WARN("Unsupported EEPROM version: 0x%04X\n",
3494 eeprom->version);
3495 ret = -EINVAL;
3496 goto err;
3497 }
3498 ret = il_init_channel_map(il);
3499 if (ret) {
3500 IL_ERR("initializing regulatory failed: %d\n", ret);
3501 goto err;
3502 }
3503
3504 /* Set up txpower settings in driver for all channels */
3505 if (il3945_txpower_set_from_eeprom(il)) {
3506 ret = -EIO;
3507 goto err_free_channel_map;
3508 }
3509
3510 ret = il_init_geos(il);
3511 if (ret) {
3512 IL_ERR("initializing geos failed: %d\n", ret);
3513 goto err_free_channel_map;
3514 }
3515 il3945_init_hw_rates(il, il->ieee_rates);
3516
3517 return 0;
3518
3519err_free_channel_map:
3520 il_free_channel_map(il);
3521err:
3522 return ret;
3523}
3524
3525#define IL3945_MAX_PROBE_REQUEST 200
3526
3527static int
3528il3945_setup_mac(struct il_priv *il)
3529{
3530 int ret;
3531 struct ieee80211_hw *hw = il->hw;
3532
3533 hw->rate_control_algorithm = "iwl-3945-rs";
3534 hw->sta_data_size = sizeof(struct il3945_sta_priv);
3535 hw->vif_data_size = sizeof(struct il_vif_priv);
3536
3537 /* Tell mac80211 our characteristics */
3538 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
3539 ieee80211_hw_set(hw, SUPPORTS_PS);
3540 ieee80211_hw_set(hw, SIGNAL_DBM);
3541 ieee80211_hw_set(hw, SPECTRUM_MGMT);
3542
3543 hw->wiphy->interface_modes =
3544 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
3545
3546 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
3547 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
3548 REGULATORY_DISABLE_BEACON_HINTS;
3549
3550 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
3551
3552 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3553 /* we create the 802.11 header and a zero-length SSID element */
3554 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
3555
3556 /* Default value; 4 EDCA QOS priorities */
3557 hw->queues = 4;
3558
3559 if (il->bands[NL80211_BAND_2GHZ].n_channels)
3560 il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
3561 &il->bands[NL80211_BAND_2GHZ];
3562
3563 if (il->bands[NL80211_BAND_5GHZ].n_channels)
3564 il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
3565 &il->bands[NL80211_BAND_5GHZ];
3566
3567 il_leds_init(il);
3568
3569 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3570
3571 ret = ieee80211_register_hw(il->hw);
3572 if (ret) {
3573 IL_ERR("Failed to register hw (error %d)\n", ret);
3574 return ret;
3575 }
3576 il->mac80211_registered = 1;
3577
3578 return 0;
3579}
3580
3581static int
3582il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3583{
3584 int err = 0;
3585 struct il_priv *il;
3586 struct ieee80211_hw *hw;
3587 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
3588 struct il3945_eeprom *eeprom;
3589 unsigned long flags;
3590
3591 /***********************
3592 * 1. Allocating HW data
3593 * ********************/
3594
3595 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
3596 if (!hw) {
3597 err = -ENOMEM;
3598 goto out;
3599 }
3600 il = hw->priv;
3601 il->hw = hw;
3602 SET_IEEE80211_DEV(hw, &pdev->dev);
3603
3604 il->cmd_queue = IL39_CMD_QUEUE_NUM;
3605
3606 D_INFO("*** LOAD DRIVER ***\n");
3607 il->cfg = cfg;
3608 il->ops = &il3945_ops;
3609#ifdef CONFIG_IWLEGACY_DEBUGFS
3610 il->debugfs_ops = &il3945_debugfs_ops;
3611#endif
3612 il->pci_dev = pdev;
3613 il->inta_mask = CSR_INI_SET_MASK;
3614
3615 /***************************
3616 * 2. Initializing PCI bus
3617 * *************************/
3618 pci_disable_link_state(pdev,
3619 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3620 PCIE_LINK_STATE_CLKPM);
3621
3622 if (pci_enable_device(pdev)) {
3623 err = -ENODEV;
3624 goto out_ieee80211_free_hw;
3625 }
3626
3627 pci_set_master(pdev);
3628
3629 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3630 if (!err)
3631 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3632 if (err) {
3633 IL_WARN("No suitable DMA available.\n");
3634 goto out_pci_disable_device;
3635 }
3636
3637 pci_set_drvdata(pdev, il);
3638 err = pci_request_regions(pdev, DRV_NAME);
3639 if (err)
3640 goto out_pci_disable_device;
3641
3642 /***********************
3643 * 3. Read REV Register
3644 * ********************/
3645 il->hw_base = pci_ioremap_bar(pdev, 0);
3646 if (!il->hw_base) {
3647 err = -ENODEV;
3648 goto out_pci_release_regions;
3649 }
3650
3651 D_INFO("pci_resource_len = 0x%08llx\n",
3652 (unsigned long long)pci_resource_len(pdev, 0));
3653 D_INFO("pci_resource_base = %p\n", il->hw_base);
3654
3655 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3656 * PCI Tx retries from interfering with C3 CPU state */
3657 pci_write_config_byte(pdev, 0x41, 0x00);
3658
3659 /* these spin locks will be used in apm_init and EEPROM access
3660 * we should init now
3661 */
3662 spin_lock_init(&il->reg_lock);
3663 spin_lock_init(&il->lock);
3664
3665 /*
3666 * stop and reset the on-board processor just in case it is in a
3667 * strange state ... like being left stranded by a primary kernel
3668 * and this is now the kdump kernel trying to start up
3669 */
3670 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3671
3672 /***********************
3673 * 4. Read EEPROM
3674 * ********************/
3675
3676 /* Read the EEPROM */
3677 err = il_eeprom_init(il);
3678 if (err) {
3679 IL_ERR("Unable to init EEPROM\n");
3680 goto out_iounmap;
3681 }
3682 /* MAC Address location in EEPROM same for 3945/4965 */
3683 eeprom = (struct il3945_eeprom *)il->eeprom;
3684 D_INFO("MAC address: %pM\n", eeprom->mac_address);
3685 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
3686
3687 /***********************
3688 * 5. Setup HW Constants
3689 * ********************/
3690 /* Device-specific setup */
3691 err = il3945_hw_set_hw_params(il);
3692 if (err) {
3693 IL_ERR("failed to set hw settings\n");
3694 goto out_eeprom_free;
3695 }
3696
3697 /***********************
3698 * 6. Setup il
3699 * ********************/
3700
3701 err = il3945_init_drv(il);
3702 if (err) {
3703 IL_ERR("initializing driver failed\n");
3704 goto out_unset_hw_params;
3705 }
3706
3707 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
3708
3709 /***********************
3710 * 7. Setup Services
3711 * ********************/
3712
3713 spin_lock_irqsave(&il->lock, flags);
3714 il_disable_interrupts(il);
3715 spin_unlock_irqrestore(&il->lock, flags);
3716
3717 pci_enable_msi(il->pci_dev);
3718
3719 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
3720 if (err) {
3721 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
3722 goto out_disable_msi;
3723 }
3724
3725 err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
3726 if (err) {
3727 IL_ERR("failed to create sysfs device attributes\n");
3728 goto out_release_irq;
3729 }
3730
3731 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
3732 err = il3945_setup_deferred_work(il);
3733 if (err)
3734 goto out_remove_sysfs;
3735
3736 il3945_setup_handlers(il);
3737 il_power_initialize(il);
3738
3739 /*********************************
3740 * 8. Setup and Register mac80211
3741 * *******************************/
3742
3743 il_enable_interrupts(il);
3744
3745 err = il3945_setup_mac(il);
3746 if (err)
3747 goto out_destroy_workqueue;
3748
3749 il_dbgfs_register(il, DRV_NAME);
3750
3751 /* Start monitoring the killswitch */
3752 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
3753
3754 return 0;
3755
3756out_destroy_workqueue:
3757 destroy_workqueue(il->workqueue);
3758 il->workqueue = NULL;
3759out_remove_sysfs:
3760 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3761out_release_irq:
3762 free_irq(il->pci_dev->irq, il);
3763out_disable_msi:
3764 pci_disable_msi(il->pci_dev);
3765 il_free_geos(il);
3766 il_free_channel_map(il);
3767out_unset_hw_params:
3768 il3945_unset_hw_params(il);
3769out_eeprom_free:
3770 il_eeprom_free(il);
3771out_iounmap:
3772 iounmap(il->hw_base);
3773out_pci_release_regions:
3774 pci_release_regions(pdev);
3775out_pci_disable_device:
3776 pci_disable_device(pdev);
3777out_ieee80211_free_hw:
3778 ieee80211_free_hw(il->hw);
3779out:
3780 return err;
3781}
3782
3783static void
3784il3945_pci_remove(struct pci_dev *pdev)
3785{
3786 struct il_priv *il = pci_get_drvdata(pdev);
3787 unsigned long flags;
3788
3789 if (!il)
3790 return;
3791
3792 D_INFO("*** UNLOAD DRIVER ***\n");
3793
3794 il_dbgfs_unregister(il);
3795
3796 set_bit(S_EXIT_PENDING, &il->status);
3797
3798 il_leds_exit(il);
3799
3800 if (il->mac80211_registered) {
3801 ieee80211_unregister_hw(il->hw);
3802 il->mac80211_registered = 0;
3803 } else {
3804 il3945_down(il);
3805 }
3806
3807 /*
3808 * Make sure device is reset to low power before unloading driver.
3809 * This may be redundant with il_down(), but there are paths to
3810 * run il_down() without calling apm_ops.stop(), and there are
3811 * paths to avoid running il_down() at all before leaving driver.
3812 * This (inexpensive) call *makes sure* device is reset.
3813 */
3814 il_apm_stop(il);
3815
3816 /* make sure we flush any pending irq or
3817 * tasklet for the driver
3818 */
3819 spin_lock_irqsave(&il->lock, flags);
3820 il_disable_interrupts(il);
3821 spin_unlock_irqrestore(&il->lock, flags);
3822
3823 il3945_synchronize_irq(il);
3824
3825 sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
3826
3827 cancel_delayed_work_sync(&il->_3945.rfkill_poll);
3828
3829 il3945_dealloc_ucode_pci(il);
3830
3831 if (il->rxq.bd)
3832 il3945_rx_queue_free(il, &il->rxq);
3833 il3945_hw_txq_ctx_free(il);
3834
3835 il3945_unset_hw_params(il);
3836
3837 /*netif_stop_queue(dev); */
3838 flush_workqueue(il->workqueue);
3839
3840 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
3841 * il->workqueue... so we can't take down the workqueue
3842 * until now... */
3843 destroy_workqueue(il->workqueue);
3844 il->workqueue = NULL;
3845
3846 free_irq(pdev->irq, il);
3847 pci_disable_msi(pdev);
3848
3849 iounmap(il->hw_base);
3850 pci_release_regions(pdev);
3851 pci_disable_device(pdev);
3852
3853 il_free_channel_map(il);
3854 il_free_geos(il);
3855 kfree(il->scan_cmd);
3856 dev_kfree_skb(il->beacon_skb);
3857 ieee80211_free_hw(il->hw);
3858}
3859
3860/*****************************************************************************
3861 *
3862 * driver and module entry point
3863 *
3864 *****************************************************************************/
3865
3866static struct pci_driver il3945_driver = {
3867 .name = DRV_NAME,
3868 .id_table = il3945_hw_card_ids,
3869 .probe = il3945_pci_probe,
3870 .remove = il3945_pci_remove,
3871 .driver.pm = IL_LEGACY_PM_OPS,
3872};
3873
3874static int __init
3875il3945_init(void)
3876{
3877
3878 int ret;
3879 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3880 pr_info(DRV_COPYRIGHT "\n");
3881
3882 /*
3883 * Disabling hardware scan means that mac80211 will perform scans
3884 * "the hard way", rather than using device's scan.
3885 */
3886 if (il3945_mod_params.disable_hw_scan) {
3887 pr_info("hw_scan is disabled\n");
3888 il3945_mac_ops.hw_scan = NULL;
3889 }
3890
3891 ret = il3945_rate_control_register();
3892 if (ret) {
3893 pr_err("Unable to register rate control algorithm: %d\n", ret);
3894 return ret;
3895 }
3896
3897 ret = pci_register_driver(&il3945_driver);
3898 if (ret) {
3899 pr_err("Unable to initialize PCI module\n");
3900 goto error_register;
3901 }
3902
3903 return ret;
3904
3905error_register:
3906 il3945_rate_control_unregister();
3907 return ret;
3908}
3909
3910static void __exit
3911il3945_exit(void)
3912{
3913 pci_unregister_driver(&il3945_driver);
3914 il3945_rate_control_unregister();
3915}
3916
3917MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
3918
3919module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
3920MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
3921module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
3922MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
3923module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
3924 0444);
3925MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
3926#ifdef CONFIG_IWLEGACY_DEBUG
3927module_param_named(debug, il_debug_level, uint, 0644);
3928MODULE_PARM_DESC(debug, "debug output mask");
3929#endif
3930module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
3931MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
3932
3933module_exit(il3945_exit);
3934module_init(il3945_init);