b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * PCI Express Hot Plug Controller Driver |
| 4 | * |
| 5 | * Copyright (C) 1995,2001 Compaq Computer Corporation |
| 6 | * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) |
| 7 | * Copyright (C) 2001 IBM Corp. |
| 8 | * Copyright (C) 2003-2004 Intel Corporation |
| 9 | * |
| 10 | * All rights reserved. |
| 11 | * |
| 12 | * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com> |
| 13 | * |
| 14 | */ |
| 15 | #ifndef _PCIEHP_H |
| 16 | #define _PCIEHP_H |
| 17 | |
| 18 | #include <linux/types.h> |
| 19 | #include <linux/pci.h> |
| 20 | #include <linux/pci_hotplug.h> |
| 21 | #include <linux/delay.h> |
| 22 | #include <linux/mutex.h> |
| 23 | #include <linux/rwsem.h> |
| 24 | #include <linux/workqueue.h> |
| 25 | |
| 26 | #include "../pcie/portdrv.h" |
| 27 | |
| 28 | extern bool pciehp_poll_mode; |
| 29 | extern int pciehp_poll_time; |
| 30 | |
| 31 | /* |
| 32 | * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to |
| 33 | * enable debug messages. |
| 34 | */ |
| 35 | #define ctrl_dbg(ctrl, format, arg...) \ |
| 36 | pci_dbg(ctrl->pcie->port, format, ## arg) |
| 37 | #define ctrl_err(ctrl, format, arg...) \ |
| 38 | pci_err(ctrl->pcie->port, format, ## arg) |
| 39 | #define ctrl_info(ctrl, format, arg...) \ |
| 40 | pci_info(ctrl->pcie->port, format, ## arg) |
| 41 | #define ctrl_warn(ctrl, format, arg...) \ |
| 42 | pci_warn(ctrl->pcie->port, format, ## arg) |
| 43 | |
| 44 | #define SLOT_NAME_SIZE 10 |
| 45 | |
| 46 | /** |
| 47 | * struct controller - PCIe hotplug controller |
| 48 | * @pcie: pointer to the controller's PCIe port service device |
| 49 | * @slot_cap: cached copy of the Slot Capabilities register |
| 50 | * @slot_ctrl: cached copy of the Slot Control register |
| 51 | * @ctrl_lock: serializes writes to the Slot Control register |
| 52 | * @cmd_started: jiffies when the Slot Control register was last written; |
| 53 | * the next write is allowed 1 second later, absent a Command Completed |
| 54 | * interrupt (PCIe r4.0, sec 6.7.3.2) |
| 55 | * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler |
| 56 | * on reception of a Command Completed event |
| 57 | * @queue: wait queue to wake up on reception of a Command Completed event, |
| 58 | * used for synchronous writes to the Slot Control register |
| 59 | * @pending_events: used by the IRQ handler to save events retrieved from the |
| 60 | * Slot Status register for later consumption by the IRQ thread |
| 61 | * @notification_enabled: whether the IRQ was requested successfully |
| 62 | * @power_fault_detected: whether a power fault was detected by the hardware |
| 63 | * that has not yet been cleared by the user |
| 64 | * @poll_thread: thread to poll for slot events if no IRQ is available, |
| 65 | * enabled with pciehp_poll_mode module parameter |
| 66 | * @state: current state machine position |
| 67 | * @state_lock: protects reads and writes of @state; |
| 68 | * protects scheduling, execution and cancellation of @button_work |
| 69 | * @button_work: work item to turn the slot on or off after 5 seconds |
| 70 | * in response to an Attention Button press |
| 71 | * @hotplug_slot: structure registered with the PCI hotplug core |
| 72 | * @reset_lock: prevents access to the Data Link Layer Link Active bit in the |
| 73 | * Link Status register and to the Presence Detect State bit in the Slot |
| 74 | * Status register during a slot reset which may cause them to flap |
| 75 | * @depth: Number of additional hotplug ports in the path to the root bus, |
| 76 | * used as lock subclass for @reset_lock |
| 77 | * @ist_running: flag to keep user request waiting while IRQ thread is running |
| 78 | * @request_result: result of last user request submitted to the IRQ thread |
| 79 | * @requester: wait queue to wake up on completion of user request, |
| 80 | * used for synchronous slot enable/disable request via sysfs |
| 81 | * |
| 82 | * PCIe hotplug has a 1:1 relationship between controller and slot, hence |
| 83 | * unlike other drivers, the two aren't represented by separate structures. |
| 84 | */ |
| 85 | struct controller { |
| 86 | struct pcie_device *pcie; |
| 87 | |
| 88 | u32 slot_cap; /* capabilities and quirks */ |
| 89 | |
| 90 | u16 slot_ctrl; /* control register access */ |
| 91 | struct mutex ctrl_lock; |
| 92 | unsigned long cmd_started; |
| 93 | unsigned int cmd_busy:1; |
| 94 | wait_queue_head_t queue; |
| 95 | |
| 96 | atomic_t pending_events; /* event handling */ |
| 97 | unsigned int notification_enabled:1; |
| 98 | unsigned int power_fault_detected; |
| 99 | struct task_struct *poll_thread; |
| 100 | |
| 101 | u8 state; /* state machine */ |
| 102 | struct mutex state_lock; |
| 103 | struct delayed_work button_work; |
| 104 | |
| 105 | struct hotplug_slot hotplug_slot; /* hotplug core interface */ |
| 106 | struct rw_semaphore reset_lock; |
| 107 | unsigned int depth; |
| 108 | unsigned int ist_running; |
| 109 | int request_result; |
| 110 | wait_queue_head_t requester; |
| 111 | }; |
| 112 | |
| 113 | /** |
| 114 | * DOC: Slot state |
| 115 | * |
| 116 | * @OFF_STATE: slot is powered off, no subordinate devices are enumerated |
| 117 | * @BLINKINGON_STATE: slot will be powered on after the 5 second delay, |
| 118 | * Power Indicator is blinking |
| 119 | * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay, |
| 120 | * Power Indicator is blinking |
| 121 | * @POWERON_STATE: slot is currently powering on |
| 122 | * @POWEROFF_STATE: slot is currently powering off |
| 123 | * @ON_STATE: slot is powered on, subordinate devices have been enumerated |
| 124 | */ |
| 125 | #define OFF_STATE 0 |
| 126 | #define BLINKINGON_STATE 1 |
| 127 | #define BLINKINGOFF_STATE 2 |
| 128 | #define POWERON_STATE 3 |
| 129 | #define POWEROFF_STATE 4 |
| 130 | #define ON_STATE 5 |
| 131 | |
| 132 | /** |
| 133 | * DOC: Flags to request an action from the IRQ thread |
| 134 | * |
| 135 | * These are stored together with events read from the Slot Status register, |
| 136 | * hence must be greater than its 16-bit width. |
| 137 | * |
| 138 | * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or |
| 139 | * an Attention Button press after the 5 second delay |
| 140 | * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the |
| 141 | * hotplug port was inaccessible when the interrupt occurred, requiring |
| 142 | * that the IRQ handler is rerun by the IRQ thread after it has made the |
| 143 | * hotplug port accessible by runtime resuming its parents to D0 |
| 144 | */ |
| 145 | #define DISABLE_SLOT (1 << 16) |
| 146 | #define RERUN_ISR (1 << 17) |
| 147 | |
| 148 | #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP) |
| 149 | #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP) |
| 150 | #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP) |
| 151 | #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP) |
| 152 | #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP) |
| 153 | #define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS) |
| 154 | #define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP) |
| 155 | #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS) |
| 156 | #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19) |
| 157 | |
| 158 | void pciehp_request(struct controller *ctrl, int action); |
| 159 | void pciehp_handle_button_press(struct controller *ctrl); |
| 160 | void pciehp_handle_disable_request(struct controller *ctrl); |
| 161 | void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events); |
| 162 | int pciehp_configure_device(struct controller *ctrl); |
| 163 | void pciehp_unconfigure_device(struct controller *ctrl, bool presence); |
| 164 | void pciehp_queue_pushbutton_work(struct work_struct *work); |
| 165 | struct controller *pcie_init(struct pcie_device *dev); |
| 166 | int pcie_init_notification(struct controller *ctrl); |
| 167 | void pcie_shutdown_notification(struct controller *ctrl); |
| 168 | void pcie_clear_hotplug_events(struct controller *ctrl); |
| 169 | void pcie_enable_interrupt(struct controller *ctrl); |
| 170 | void pcie_disable_interrupt(struct controller *ctrl); |
| 171 | int pciehp_power_on_slot(struct controller *ctrl); |
| 172 | void pciehp_power_off_slot(struct controller *ctrl); |
| 173 | void pciehp_get_power_status(struct controller *ctrl, u8 *status); |
| 174 | |
| 175 | #define INDICATOR_NOOP -1 /* Leave indicator unchanged */ |
| 176 | void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn); |
| 177 | |
| 178 | void pciehp_get_latch_status(struct controller *ctrl, u8 *status); |
| 179 | int pciehp_query_power_fault(struct controller *ctrl); |
| 180 | int pciehp_card_present(struct controller *ctrl); |
| 181 | int pciehp_card_present_or_link_active(struct controller *ctrl); |
| 182 | int pciehp_check_link_status(struct controller *ctrl); |
| 183 | int pciehp_check_link_active(struct controller *ctrl); |
| 184 | void pciehp_release_ctrl(struct controller *ctrl); |
| 185 | |
| 186 | int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot); |
| 187 | int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot); |
| 188 | int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe); |
| 189 | int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status); |
| 190 | int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status); |
| 191 | int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status); |
| 192 | |
| 193 | static inline const char *slot_name(struct controller *ctrl) |
| 194 | { |
| 195 | return hotplug_slot_name(&ctrl->hotplug_slot); |
| 196 | } |
| 197 | |
| 198 | static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot) |
| 199 | { |
| 200 | return container_of(hotplug_slot, struct controller, hotplug_slot); |
| 201 | } |
| 202 | |
| 203 | #endif /* _PCIEHP_H */ |