blob: 131c6d7e86f8f46aed01383e42faf460f04206b5 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
468 dev_rescan_store);
469
470static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
471 const char *buf, size_t count)
472{
473 unsigned long val;
474
475 if (kstrtoul(buf, 0, &val) < 0)
476 return -EINVAL;
477
478 if (val && device_remove_file_self(dev, attr))
479 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
480 return count;
481}
482static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
483 remove_store);
484
485static ssize_t bus_rescan_store(struct device *dev,
486 struct device_attribute *attr,
487 const char *buf, size_t count)
488{
489 unsigned long val;
490 struct pci_bus *bus = to_pci_bus(dev);
491
492 if (kstrtoul(buf, 0, &val) < 0)
493 return -EINVAL;
494
495 if (val) {
496 pci_lock_rescan_remove();
497 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
498 pci_rescan_bus_bridge_resize(bus->self);
499 else
500 pci_rescan_bus(bus);
501 pci_unlock_rescan_remove();
502 }
503 return count;
504}
505static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
506 bus_rescan_store);
507
508static ssize_t reset_subordinate_store(struct device *dev,
509 struct device_attribute *attr,
510 const char *buf, size_t count)
511{
512 struct pci_dev *pdev = to_pci_dev(dev);
513 struct pci_bus *bus = pdev->subordinate;
514 unsigned long val;
515
516 if (!capable(CAP_SYS_ADMIN))
517 return -EPERM;
518
519 if (kstrtoul(buf, 0, &val) < 0)
520 return -EINVAL;
521
522 if (val) {
523 int ret = __pci_reset_bus(bus);
524
525 if (ret)
526 return ret;
527 }
528
529 return count;
530}
531static DEVICE_ATTR_WO(reset_subordinate);
532
533#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
534static ssize_t d3cold_allowed_store(struct device *dev,
535 struct device_attribute *attr,
536 const char *buf, size_t count)
537{
538 struct pci_dev *pdev = to_pci_dev(dev);
539 unsigned long val;
540
541 if (kstrtoul(buf, 0, &val) < 0)
542 return -EINVAL;
543
544 pdev->d3cold_allowed = !!val;
545 pci_bridge_d3_update(pdev);
546
547 pm_runtime_resume(dev);
548
549 return count;
550}
551
552static ssize_t d3cold_allowed_show(struct device *dev,
553 struct device_attribute *attr, char *buf)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
557}
558static DEVICE_ATTR_RW(d3cold_allowed);
559#endif
560
561#ifdef CONFIG_OF
562static ssize_t devspec_show(struct device *dev,
563 struct device_attribute *attr, char *buf)
564{
565 struct pci_dev *pdev = to_pci_dev(dev);
566 struct device_node *np = pci_device_to_OF_node(pdev);
567
568 if (np == NULL)
569 return 0;
570 return sprintf(buf, "%pOF", np);
571}
572static DEVICE_ATTR_RO(devspec);
573#endif
574
575static ssize_t driver_override_store(struct device *dev,
576 struct device_attribute *attr,
577 const char *buf, size_t count)
578{
579 struct pci_dev *pdev = to_pci_dev(dev);
580 char *driver_override, *old, *cp;
581
582 /* We need to keep extra room for a newline */
583 if (count >= (PAGE_SIZE - 1))
584 return -EINVAL;
585
586 driver_override = kstrndup(buf, count, GFP_KERNEL);
587 if (!driver_override)
588 return -ENOMEM;
589
590 cp = strchr(driver_override, '\n');
591 if (cp)
592 *cp = '\0';
593
594 device_lock(dev);
595 old = pdev->driver_override;
596 if (strlen(driver_override)) {
597 pdev->driver_override = driver_override;
598 } else {
599 kfree(driver_override);
600 pdev->driver_override = NULL;
601 }
602 device_unlock(dev);
603
604 kfree(old);
605
606 return count;
607}
608
609static ssize_t driver_override_show(struct device *dev,
610 struct device_attribute *attr, char *buf)
611{
612 struct pci_dev *pdev = to_pci_dev(dev);
613 ssize_t len;
614
615 device_lock(dev);
616 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
617 device_unlock(dev);
618 return len;
619}
620static DEVICE_ATTR_RW(driver_override);
621
622static struct attribute *pci_dev_attrs[] = {
623 &dev_attr_resource.attr,
624 &dev_attr_vendor.attr,
625 &dev_attr_device.attr,
626 &dev_attr_subsystem_vendor.attr,
627 &dev_attr_subsystem_device.attr,
628 &dev_attr_revision.attr,
629 &dev_attr_class.attr,
630 &dev_attr_irq.attr,
631 &dev_attr_local_cpus.attr,
632 &dev_attr_local_cpulist.attr,
633 &dev_attr_modalias.attr,
634#ifdef CONFIG_NUMA
635 &dev_attr_numa_node.attr,
636#endif
637 &dev_attr_dma_mask_bits.attr,
638 &dev_attr_consistent_dma_mask_bits.attr,
639 &dev_attr_enable.attr,
640 &dev_attr_broken_parity_status.attr,
641 &dev_attr_msi_bus.attr,
642#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
643 &dev_attr_d3cold_allowed.attr,
644#endif
645#ifdef CONFIG_OF
646 &dev_attr_devspec.attr,
647#endif
648 &dev_attr_driver_override.attr,
649 &dev_attr_ari_enabled.attr,
650 NULL,
651};
652
653static struct attribute *pci_bridge_attrs[] = {
654 &dev_attr_subordinate_bus_number.attr,
655 &dev_attr_secondary_bus_number.attr,
656 &dev_attr_reset_subordinate.attr,
657 NULL,
658};
659
660static struct attribute *pcie_dev_attrs[] = {
661 &dev_attr_current_link_speed.attr,
662 &dev_attr_current_link_width.attr,
663 &dev_attr_max_link_width.attr,
664 &dev_attr_max_link_speed.attr,
665 NULL,
666};
667
668static struct attribute *pcibus_attrs[] = {
669 &dev_attr_bus_rescan.attr,
670 &dev_attr_cpuaffinity.attr,
671 &dev_attr_cpulistaffinity.attr,
672 NULL,
673};
674
675static const struct attribute_group pcibus_group = {
676 .attrs = pcibus_attrs,
677};
678
679const struct attribute_group *pcibus_groups[] = {
680 &pcibus_group,
681 NULL,
682};
683
684static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
685 char *buf)
686{
687 struct pci_dev *pdev = to_pci_dev(dev);
688 struct pci_dev *vga_dev = vga_default_device();
689
690 if (vga_dev)
691 return sprintf(buf, "%u\n", (pdev == vga_dev));
692
693 return sprintf(buf, "%u\n",
694 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
695 IORESOURCE_ROM_SHADOW));
696}
697static DEVICE_ATTR_RO(boot_vga);
698
699static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
700 struct bin_attribute *bin_attr, char *buf,
701 loff_t off, size_t count)
702{
703 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
704 unsigned int size = 64;
705 loff_t init_off = off;
706 u8 *data = (u8 *) buf;
707
708 /* Several chips lock up trying to read undefined config space */
709 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
710 size = dev->cfg_size;
711 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
712 size = 128;
713
714 if (off > size)
715 return 0;
716 if (off + count > size) {
717 size -= off;
718 count = size;
719 } else {
720 size = count;
721 }
722
723 pci_config_pm_runtime_get(dev);
724
725 if ((off & 1) && size) {
726 u8 val;
727 pci_user_read_config_byte(dev, off, &val);
728 data[off - init_off] = val;
729 off++;
730 size--;
731 }
732
733 if ((off & 3) && size > 2) {
734 u16 val;
735 pci_user_read_config_word(dev, off, &val);
736 data[off - init_off] = val & 0xff;
737 data[off - init_off + 1] = (val >> 8) & 0xff;
738 off += 2;
739 size -= 2;
740 }
741
742 while (size > 3) {
743 u32 val;
744 pci_user_read_config_dword(dev, off, &val);
745 data[off - init_off] = val & 0xff;
746 data[off - init_off + 1] = (val >> 8) & 0xff;
747 data[off - init_off + 2] = (val >> 16) & 0xff;
748 data[off - init_off + 3] = (val >> 24) & 0xff;
749 off += 4;
750 size -= 4;
751 }
752
753 if (size >= 2) {
754 u16 val;
755 pci_user_read_config_word(dev, off, &val);
756 data[off - init_off] = val & 0xff;
757 data[off - init_off + 1] = (val >> 8) & 0xff;
758 off += 2;
759 size -= 2;
760 }
761
762 if (size > 0) {
763 u8 val;
764 pci_user_read_config_byte(dev, off, &val);
765 data[off - init_off] = val;
766 off++;
767 --size;
768 }
769
770 pci_config_pm_runtime_put(dev);
771
772 return count;
773}
774
775static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
776 struct bin_attribute *bin_attr, char *buf,
777 loff_t off, size_t count)
778{
779 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
780 unsigned int size = count;
781 loff_t init_off = off;
782 u8 *data = (u8 *) buf;
783 int ret;
784
785 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
786 if (ret)
787 return ret;
788
789 if (off > dev->cfg_size)
790 return 0;
791 if (off + count > dev->cfg_size) {
792 size = dev->cfg_size - off;
793 count = size;
794 }
795
796 pci_config_pm_runtime_get(dev);
797
798 if ((off & 1) && size) {
799 pci_user_write_config_byte(dev, off, data[off - init_off]);
800 off++;
801 size--;
802 }
803
804 if ((off & 3) && size > 2) {
805 u16 val = data[off - init_off];
806 val |= (u16) data[off - init_off + 1] << 8;
807 pci_user_write_config_word(dev, off, val);
808 off += 2;
809 size -= 2;
810 }
811
812 while (size > 3) {
813 u32 val = data[off - init_off];
814 val |= (u32) data[off - init_off + 1] << 8;
815 val |= (u32) data[off - init_off + 2] << 16;
816 val |= (u32) data[off - init_off + 3] << 24;
817 pci_user_write_config_dword(dev, off, val);
818 off += 4;
819 size -= 4;
820 }
821
822 if (size >= 2) {
823 u16 val = data[off - init_off];
824 val |= (u16) data[off - init_off + 1] << 8;
825 pci_user_write_config_word(dev, off, val);
826 off += 2;
827 size -= 2;
828 }
829
830 if (size) {
831 pci_user_write_config_byte(dev, off, data[off - init_off]);
832 off++;
833 --size;
834 }
835
836 pci_config_pm_runtime_put(dev);
837
838 return count;
839}
840
841#ifdef HAVE_PCI_LEGACY
842/**
843 * pci_read_legacy_io - read byte(s) from legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer to store results
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to read
850 *
851 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_read).
853 */
854static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_read(bus, off, (u32 *)buf, count);
865}
866
867/**
868 * pci_write_legacy_io - write byte(s) to legacy I/O port space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to file to read from
871 * @bin_attr: struct bin_attribute for this file
872 * @buf: buffer containing value to be written
873 * @off: offset into legacy I/O port space
874 * @count: number of bytes to write
875 *
876 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
877 * callback routine (pci_legacy_write).
878 */
879static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
880 struct bin_attribute *bin_attr, char *buf,
881 loff_t off, size_t count)
882{
883 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
884
885 /* Only support 1, 2 or 4 byte accesses */
886 if (count != 1 && count != 2 && count != 4)
887 return -EINVAL;
888
889 return pci_legacy_write(bus, off, *(u32 *)buf, count);
890}
891
892/**
893 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
894 * @filp: open sysfs file
895 * @kobj: kobject corresponding to device to be mapped
896 * @attr: struct bin_attribute for this file
897 * @vma: struct vm_area_struct passed to mmap
898 *
899 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
900 * legacy memory space (first meg of bus space) into application virtual
901 * memory space.
902 */
903static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
904 struct bin_attribute *attr,
905 struct vm_area_struct *vma)
906{
907 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
908
909 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
910}
911
912/**
913 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
914 * @filp: open sysfs file
915 * @kobj: kobject corresponding to device to be mapped
916 * @attr: struct bin_attribute for this file
917 * @vma: struct vm_area_struct passed to mmap
918 *
919 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
920 * legacy IO space (first meg of bus space) into application virtual
921 * memory space. Returns -ENOSYS if the operation isn't supported
922 */
923static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
924 struct bin_attribute *attr,
925 struct vm_area_struct *vma)
926{
927 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
928
929 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
930}
931
932/**
933 * pci_adjust_legacy_attr - adjustment of legacy file attributes
934 * @b: bus to create files under
935 * @mmap_type: I/O port or memory
936 *
937 * Stub implementation. Can be overridden by arch if necessary.
938 */
939void __weak pci_adjust_legacy_attr(struct pci_bus *b,
940 enum pci_mmap_state mmap_type)
941{
942}
943
944/**
945 * pci_create_legacy_files - create legacy I/O port and memory files
946 * @b: bus to create files under
947 *
948 * Some platforms allow access to legacy I/O port and ISA memory space on
949 * a per-bus basis. This routine creates the files and ties them into
950 * their associated read, write and mmap files from pci-sysfs.c
951 *
952 * On error unwind, but don't propagate the error to the caller
953 * as it is ok to set up the PCI bus without these files.
954 */
955void pci_create_legacy_files(struct pci_bus *b)
956{
957 int error;
958
959 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
960 GFP_ATOMIC);
961 if (!b->legacy_io)
962 goto kzalloc_err;
963
964 sysfs_bin_attr_init(b->legacy_io);
965 b->legacy_io->attr.name = "legacy_io";
966 b->legacy_io->size = 0xffff;
967 b->legacy_io->attr.mode = 0600;
968 b->legacy_io->read = pci_read_legacy_io;
969 b->legacy_io->write = pci_write_legacy_io;
970 b->legacy_io->mmap = pci_mmap_legacy_io;
971 pci_adjust_legacy_attr(b, pci_mmap_io);
972 error = device_create_bin_file(&b->dev, b->legacy_io);
973 if (error)
974 goto legacy_io_err;
975
976 /* Allocated above after the legacy_io struct */
977 b->legacy_mem = b->legacy_io + 1;
978 sysfs_bin_attr_init(b->legacy_mem);
979 b->legacy_mem->attr.name = "legacy_mem";
980 b->legacy_mem->size = 1024*1024;
981 b->legacy_mem->attr.mode = 0600;
982 b->legacy_mem->mmap = pci_mmap_legacy_mem;
983 pci_adjust_legacy_attr(b, pci_mmap_mem);
984 error = device_create_bin_file(&b->dev, b->legacy_mem);
985 if (error)
986 goto legacy_mem_err;
987
988 return;
989
990legacy_mem_err:
991 device_remove_bin_file(&b->dev, b->legacy_io);
992legacy_io_err:
993 kfree(b->legacy_io);
994 b->legacy_io = NULL;
995kzalloc_err:
996 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
997}
998
999void pci_remove_legacy_files(struct pci_bus *b)
1000{
1001 if (b->legacy_io) {
1002 device_remove_bin_file(&b->dev, b->legacy_io);
1003 device_remove_bin_file(&b->dev, b->legacy_mem);
1004 kfree(b->legacy_io); /* both are allocated here */
1005 }
1006}
1007#endif /* HAVE_PCI_LEGACY */
1008
1009#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1010
1011int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1012 enum pci_mmap_api mmap_api)
1013{
1014 unsigned long nr, start, size;
1015 resource_size_t pci_start = 0, pci_end;
1016
1017 if (pci_resource_len(pdev, resno) == 0)
1018 return 0;
1019 nr = vma_pages(vma);
1020 start = vma->vm_pgoff;
1021 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1022 if (mmap_api == PCI_MMAP_PROCFS) {
1023 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1024 &pci_start, &pci_end);
1025 pci_start >>= PAGE_SHIFT;
1026 }
1027 if (start >= pci_start && start < pci_start + size &&
1028 start + nr <= pci_start + size)
1029 return 1;
1030 return 0;
1031}
1032
1033/**
1034 * pci_mmap_resource - map a PCI resource into user memory space
1035 * @kobj: kobject for mapping
1036 * @attr: struct bin_attribute for the file being mapped
1037 * @vma: struct vm_area_struct passed into the mmap
1038 * @write_combine: 1 for write_combine mapping
1039 *
1040 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1041 */
1042static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1043 struct vm_area_struct *vma, int write_combine)
1044{
1045 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1046 int bar = (unsigned long)attr->private;
1047 enum pci_mmap_state mmap_type;
1048 struct resource *res = &pdev->resource[bar];
1049 int ret;
1050
1051 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1052 if (ret)
1053 return ret;
1054
1055 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1056 return -EINVAL;
1057
1058 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1059 return -EINVAL;
1060
1061 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1062
1063 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1064}
1065
1066static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1067 struct bin_attribute *attr,
1068 struct vm_area_struct *vma)
1069{
1070 return pci_mmap_resource(kobj, attr, vma, 0);
1071}
1072
1073static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1074 struct bin_attribute *attr,
1075 struct vm_area_struct *vma)
1076{
1077 return pci_mmap_resource(kobj, attr, vma, 1);
1078}
1079
1080static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1081 struct bin_attribute *attr, char *buf,
1082 loff_t off, size_t count, bool write)
1083{
1084 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1085 int bar = (unsigned long)attr->private;
1086 unsigned long port = off;
1087
1088 port += pci_resource_start(pdev, bar);
1089
1090 if (port > pci_resource_end(pdev, bar))
1091 return 0;
1092
1093 if (port + count - 1 > pci_resource_end(pdev, bar))
1094 return -EINVAL;
1095
1096 switch (count) {
1097 case 1:
1098 if (write)
1099 outb(*(u8 *)buf, port);
1100 else
1101 *(u8 *)buf = inb(port);
1102 return 1;
1103 case 2:
1104 if (write)
1105 outw(*(u16 *)buf, port);
1106 else
1107 *(u16 *)buf = inw(port);
1108 return 2;
1109 case 4:
1110 if (write)
1111 outl(*(u32 *)buf, port);
1112 else
1113 *(u32 *)buf = inl(port);
1114 return 4;
1115 }
1116 return -EINVAL;
1117}
1118
1119static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1120 struct bin_attribute *attr, char *buf,
1121 loff_t off, size_t count)
1122{
1123 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1124}
1125
1126static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1127 struct bin_attribute *attr, char *buf,
1128 loff_t off, size_t count)
1129{
1130 int ret;
1131
1132 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1133 if (ret)
1134 return ret;
1135
1136 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1137}
1138
1139/**
1140 * pci_remove_resource_files - cleanup resource files
1141 * @pdev: dev to cleanup
1142 *
1143 * If we created resource files for @pdev, remove them from sysfs and
1144 * free their resources.
1145 */
1146static void pci_remove_resource_files(struct pci_dev *pdev)
1147{
1148 int i;
1149
1150 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1151 struct bin_attribute *res_attr;
1152
1153 res_attr = pdev->res_attr[i];
1154 if (res_attr) {
1155 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1156 kfree(res_attr);
1157 }
1158
1159 res_attr = pdev->res_attr_wc[i];
1160 if (res_attr) {
1161 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1162 kfree(res_attr);
1163 }
1164 }
1165}
1166
1167static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1168{
1169 /* allocate attribute structure, piggyback attribute name */
1170 int name_len = write_combine ? 13 : 10;
1171 struct bin_attribute *res_attr;
1172 char *res_attr_name;
1173 int retval;
1174
1175 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1176 if (!res_attr)
1177 return -ENOMEM;
1178
1179 res_attr_name = (char *)(res_attr + 1);
1180
1181 sysfs_bin_attr_init(res_attr);
1182 if (write_combine) {
1183 sprintf(res_attr_name, "resource%d_wc", num);
1184 res_attr->mmap = pci_mmap_resource_wc;
1185 } else {
1186 sprintf(res_attr_name, "resource%d", num);
1187 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1188 res_attr->read = pci_read_resource_io;
1189 res_attr->write = pci_write_resource_io;
1190 if (arch_can_pci_mmap_io())
1191 res_attr->mmap = pci_mmap_resource_uc;
1192 } else {
1193 res_attr->mmap = pci_mmap_resource_uc;
1194 }
1195 }
1196 res_attr->attr.name = res_attr_name;
1197 res_attr->attr.mode = 0600;
1198 res_attr->size = pci_resource_len(pdev, num);
1199 res_attr->private = (void *)(unsigned long)num;
1200 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1201 if (retval) {
1202 kfree(res_attr);
1203 return retval;
1204 }
1205
1206 if (write_combine)
1207 pdev->res_attr_wc[num] = res_attr;
1208 else
1209 pdev->res_attr[num] = res_attr;
1210
1211 return 0;
1212}
1213
1214/**
1215 * pci_create_resource_files - create resource files in sysfs for @dev
1216 * @pdev: dev in question
1217 *
1218 * Walk the resources in @pdev creating files for each resource available.
1219 */
1220static int pci_create_resource_files(struct pci_dev *pdev)
1221{
1222 int i;
1223 int retval;
1224
1225 /* Expose the PCI resources from this device as files */
1226 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1227
1228 /* skip empty resources */
1229 if (!pci_resource_len(pdev, i))
1230 continue;
1231
1232 retval = pci_create_attr(pdev, i, 0);
1233 /* for prefetchable resources, create a WC mappable file */
1234 if (!retval && arch_can_pci_mmap_wc() &&
1235 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1236 retval = pci_create_attr(pdev, i, 1);
1237 if (retval) {
1238 pci_remove_resource_files(pdev);
1239 return retval;
1240 }
1241 }
1242 return 0;
1243}
1244#else /* !HAVE_PCI_MMAP */
1245int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1246void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1247#endif /* HAVE_PCI_MMAP */
1248
1249/**
1250 * pci_write_rom - used to enable access to the PCI ROM display
1251 * @filp: sysfs file
1252 * @kobj: kernel object handle
1253 * @bin_attr: struct bin_attribute for this file
1254 * @buf: user input
1255 * @off: file offset
1256 * @count: number of byte in input
1257 *
1258 * writing anything except 0 enables it
1259 */
1260static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1261 struct bin_attribute *bin_attr, char *buf,
1262 loff_t off, size_t count)
1263{
1264 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1265
1266 if ((off == 0) && (*buf == '0') && (count == 2))
1267 pdev->rom_attr_enabled = 0;
1268 else
1269 pdev->rom_attr_enabled = 1;
1270
1271 return count;
1272}
1273
1274/**
1275 * pci_read_rom - read a PCI ROM
1276 * @filp: sysfs file
1277 * @kobj: kernel object handle
1278 * @bin_attr: struct bin_attribute for this file
1279 * @buf: where to put the data we read from the ROM
1280 * @off: file offset
1281 * @count: number of bytes to read
1282 *
1283 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1284 * device corresponding to @kobj.
1285 */
1286static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1287 struct bin_attribute *bin_attr, char *buf,
1288 loff_t off, size_t count)
1289{
1290 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1291 void __iomem *rom;
1292 size_t size;
1293
1294 if (!pdev->rom_attr_enabled)
1295 return -EINVAL;
1296
1297 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1298 if (!rom || !size)
1299 return -EIO;
1300
1301 if (off >= size)
1302 count = 0;
1303 else {
1304 if (off + count > size)
1305 count = size - off;
1306
1307 memcpy_fromio(buf, rom + off, count);
1308 }
1309 pci_unmap_rom(pdev, rom);
1310
1311 return count;
1312}
1313
1314static const struct bin_attribute pci_config_attr = {
1315 .attr = {
1316 .name = "config",
1317 .mode = 0644,
1318 },
1319 .size = PCI_CFG_SPACE_SIZE,
1320 .read = pci_read_config,
1321 .write = pci_write_config,
1322};
1323
1324static const struct bin_attribute pcie_config_attr = {
1325 .attr = {
1326 .name = "config",
1327 .mode = 0644,
1328 },
1329 .size = PCI_CFG_SPACE_EXP_SIZE,
1330 .read = pci_read_config,
1331 .write = pci_write_config,
1332};
1333
1334static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1335 const char *buf, size_t count)
1336{
1337 struct pci_dev *pdev = to_pci_dev(dev);
1338 unsigned long val;
1339 ssize_t result = kstrtoul(buf, 0, &val);
1340
1341 if (result < 0)
1342 return result;
1343
1344 if (val != 1)
1345 return -EINVAL;
1346
1347 pm_runtime_get_sync(dev);
1348 result = pci_reset_function(pdev);
1349 pm_runtime_put(dev);
1350 if (result < 0)
1351 return result;
1352
1353 return count;
1354}
1355
1356static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1357
1358static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1359{
1360 int retval;
1361
1362 pcie_vpd_create_sysfs_dev_files(dev);
1363 pcie_aspm_create_sysfs_dev_files(dev);
1364
1365 if (dev->reset_fn) {
1366 retval = device_create_file(&dev->dev, &dev_attr_reset);
1367 if (retval)
1368 goto error;
1369 }
1370 return 0;
1371
1372error:
1373 pcie_aspm_remove_sysfs_dev_files(dev);
1374 pcie_vpd_remove_sysfs_dev_files(dev);
1375 return retval;
1376}
1377
1378int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1379{
1380 int retval;
1381 int rom_size;
1382 struct bin_attribute *attr;
1383
1384 if (!sysfs_initialized)
1385 return -EACCES;
1386
1387 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1388 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1389 else
1390 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1391 if (retval)
1392 goto err;
1393
1394 retval = pci_create_resource_files(pdev);
1395 if (retval)
1396 goto err_config_file;
1397
1398 /* If the device has a ROM, try to expose it in sysfs. */
1399 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1400 if (rom_size) {
1401 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1402 if (!attr) {
1403 retval = -ENOMEM;
1404 goto err_resource_files;
1405 }
1406 sysfs_bin_attr_init(attr);
1407 attr->size = rom_size;
1408 attr->attr.name = "rom";
1409 attr->attr.mode = 0600;
1410 attr->read = pci_read_rom;
1411 attr->write = pci_write_rom;
1412 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1413 if (retval) {
1414 kfree(attr);
1415 goto err_resource_files;
1416 }
1417 pdev->rom_attr = attr;
1418 }
1419
1420 /* add sysfs entries for various capabilities */
1421 retval = pci_create_capabilities_sysfs(pdev);
1422 if (retval)
1423 goto err_rom_file;
1424
1425 pci_create_firmware_label_files(pdev);
1426
1427 return 0;
1428
1429err_rom_file:
1430 if (pdev->rom_attr) {
1431 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1432 kfree(pdev->rom_attr);
1433 pdev->rom_attr = NULL;
1434 }
1435err_resource_files:
1436 pci_remove_resource_files(pdev);
1437err_config_file:
1438 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1439 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1440 else
1441 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1442err:
1443 return retval;
1444}
1445
1446static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1447{
1448 pcie_vpd_remove_sysfs_dev_files(dev);
1449 pcie_aspm_remove_sysfs_dev_files(dev);
1450 if (dev->reset_fn) {
1451 device_remove_file(&dev->dev, &dev_attr_reset);
1452 dev->reset_fn = 0;
1453 }
1454}
1455
1456/**
1457 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1458 * @pdev: device whose entries we should free
1459 *
1460 * Cleanup when @pdev is removed from sysfs.
1461 */
1462void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1463{
1464 if (!sysfs_initialized)
1465 return;
1466
1467 pci_remove_capabilities_sysfs(pdev);
1468
1469 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1470 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1471 else
1472 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1473
1474 pci_remove_resource_files(pdev);
1475
1476 if (pdev->rom_attr) {
1477 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1478 kfree(pdev->rom_attr);
1479 pdev->rom_attr = NULL;
1480 }
1481
1482 pci_remove_firmware_label_files(pdev);
1483}
1484
1485static int __init pci_sysfs_init(void)
1486{
1487 struct pci_dev *pdev = NULL;
1488 int retval;
1489
1490 sysfs_initialized = 1;
1491 for_each_pci_dev(pdev) {
1492 retval = pci_create_sysfs_dev_files(pdev);
1493 if (retval) {
1494 pci_dev_put(pdev);
1495 return retval;
1496 }
1497 }
1498
1499 return 0;
1500}
1501late_initcall(pci_sysfs_init);
1502
1503static struct attribute *pci_dev_dev_attrs[] = {
1504 &dev_attr_boot_vga.attr,
1505 NULL,
1506};
1507
1508static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1509 struct attribute *a, int n)
1510{
1511 struct device *dev = kobj_to_dev(kobj);
1512 struct pci_dev *pdev = to_pci_dev(dev);
1513
1514 if (a == &dev_attr_boot_vga.attr)
1515 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1516 return 0;
1517
1518 return a->mode;
1519}
1520
1521static struct attribute *pci_dev_hp_attrs[] = {
1522 &dev_attr_remove.attr,
1523 &dev_attr_dev_rescan.attr,
1524 NULL,
1525};
1526
1527static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1528 struct attribute *a, int n)
1529{
1530 struct device *dev = kobj_to_dev(kobj);
1531 struct pci_dev *pdev = to_pci_dev(dev);
1532
1533 if (pdev->is_virtfn)
1534 return 0;
1535
1536 return a->mode;
1537}
1538
1539static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1540 struct attribute *a, int n)
1541{
1542 struct device *dev = kobj_to_dev(kobj);
1543 struct pci_dev *pdev = to_pci_dev(dev);
1544
1545 if (pci_is_bridge(pdev))
1546 return a->mode;
1547
1548 return 0;
1549}
1550
1551static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1552 struct attribute *a, int n)
1553{
1554 struct device *dev = kobj_to_dev(kobj);
1555 struct pci_dev *pdev = to_pci_dev(dev);
1556
1557 if (pci_is_pcie(pdev))
1558 return a->mode;
1559
1560 return 0;
1561}
1562
1563static const struct attribute_group pci_dev_group = {
1564 .attrs = pci_dev_attrs,
1565};
1566
1567const struct attribute_group *pci_dev_groups[] = {
1568 &pci_dev_group,
1569 NULL,
1570};
1571
1572static const struct attribute_group pci_bridge_group = {
1573 .attrs = pci_bridge_attrs,
1574};
1575
1576const struct attribute_group *pci_bridge_groups[] = {
1577 &pci_bridge_group,
1578 NULL,
1579};
1580
1581static const struct attribute_group pcie_dev_group = {
1582 .attrs = pcie_dev_attrs,
1583};
1584
1585const struct attribute_group *pcie_dev_groups[] = {
1586 &pcie_dev_group,
1587 NULL,
1588};
1589
1590static const struct attribute_group pci_dev_hp_attr_group = {
1591 .attrs = pci_dev_hp_attrs,
1592 .is_visible = pci_dev_hp_attrs_are_visible,
1593};
1594
1595static const struct attribute_group pci_dev_attr_group = {
1596 .attrs = pci_dev_dev_attrs,
1597 .is_visible = pci_dev_attrs_are_visible,
1598};
1599
1600static const struct attribute_group pci_bridge_attr_group = {
1601 .attrs = pci_bridge_attrs,
1602 .is_visible = pci_bridge_attrs_are_visible,
1603};
1604
1605static const struct attribute_group pcie_dev_attr_group = {
1606 .attrs = pcie_dev_attrs,
1607 .is_visible = pcie_dev_attrs_are_visible,
1608};
1609
1610static const struct attribute_group *pci_dev_attr_groups[] = {
1611 &pci_dev_attr_group,
1612 &pci_dev_hp_attr_group,
1613#ifdef CONFIG_PCI_IOV
1614 &sriov_dev_attr_group,
1615#endif
1616 &pci_bridge_attr_group,
1617 &pcie_dev_attr_group,
1618#ifdef CONFIG_PCIEAER
1619 &aer_stats_attr_group,
1620#endif
1621 NULL,
1622};
1623
1624const struct device_type pci_dev_type = {
1625 .groups = pci_dev_attr_groups,
1626};