b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
| 4 | * |
| 5 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> |
| 6 | * Copyright (C) 2006 Tower Technologies |
| 7 | * Copyright (C) 2008 Paul Mundt |
| 8 | */ |
| 9 | |
| 10 | #include <linux/i2c.h> |
| 11 | #include <linux/rtc.h> |
| 12 | #include <linux/bcd.h> |
| 13 | #include <linux/slab.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/of_device.h> |
| 16 | |
| 17 | /* |
| 18 | * Ricoh has a family of I2C based RTCs, which differ only slightly from |
| 19 | * each other. Differences center on pinout (e.g. how many interrupts, |
| 20 | * output clock, etc) and how the control registers are used. The '372 |
| 21 | * is significant only because that's the one this driver first supported. |
| 22 | */ |
| 23 | #define RS5C372_REG_SECS 0 |
| 24 | #define RS5C372_REG_MINS 1 |
| 25 | #define RS5C372_REG_HOURS 2 |
| 26 | #define RS5C372_REG_WDAY 3 |
| 27 | #define RS5C372_REG_DAY 4 |
| 28 | #define RS5C372_REG_MONTH 5 |
| 29 | #define RS5C372_REG_YEAR 6 |
| 30 | #define RS5C372_REG_TRIM 7 |
| 31 | # define RS5C372_TRIM_XSL 0x80 |
| 32 | # define RS5C372_TRIM_MASK 0x7F |
| 33 | |
| 34 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ |
| 35 | #define RS5C_REG_ALARM_A_HOURS 9 |
| 36 | #define RS5C_REG_ALARM_A_WDAY 10 |
| 37 | |
| 38 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ |
| 39 | #define RS5C_REG_ALARM_B_HOURS 12 |
| 40 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ |
| 41 | |
| 42 | #define RS5C_REG_CTRL1 14 |
| 43 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ |
| 44 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ |
| 45 | # define RV5C387_CTRL1_24 (1 << 5) |
| 46 | # define RS5C372A_CTRL1_SL1 (1 << 5) |
| 47 | # define RS5C_CTRL1_CT_MASK (7 << 0) |
| 48 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ |
| 49 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ |
| 50 | #define RS5C_REG_CTRL2 15 |
| 51 | # define RS5C372_CTRL2_24 (1 << 5) |
| 52 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2x2x */ |
| 53 | # define R2x2x_CTRL2_VDET (1 << 6) /* only if R2x2x */ |
| 54 | # define R2x2x_CTRL2_XSTP (1 << 5) /* only if R2x2x */ |
| 55 | # define R2x2x_CTRL2_PON (1 << 4) /* only if R2x2x */ |
| 56 | # define RS5C_CTRL2_CTFG (1 << 2) |
| 57 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ |
| 58 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ |
| 59 | |
| 60 | |
| 61 | /* to read (style 1) or write registers starting at R */ |
| 62 | #define RS5C_ADDR(R) (((R) << 4) | 0) |
| 63 | |
| 64 | |
| 65 | enum rtc_type { |
| 66 | rtc_undef = 0, |
| 67 | rtc_r2025sd, |
| 68 | rtc_r2221tl, |
| 69 | rtc_rs5c372a, |
| 70 | rtc_rs5c372b, |
| 71 | rtc_rv5c386, |
| 72 | rtc_rv5c387a, |
| 73 | }; |
| 74 | |
| 75 | static const struct i2c_device_id rs5c372_id[] = { |
| 76 | { "r2025sd", rtc_r2025sd }, |
| 77 | { "r2221tl", rtc_r2221tl }, |
| 78 | { "rs5c372a", rtc_rs5c372a }, |
| 79 | { "rs5c372b", rtc_rs5c372b }, |
| 80 | { "rv5c386", rtc_rv5c386 }, |
| 81 | { "rv5c387a", rtc_rv5c387a }, |
| 82 | { } |
| 83 | }; |
| 84 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); |
| 85 | |
| 86 | static const struct of_device_id rs5c372_of_match[] = { |
| 87 | { |
| 88 | .compatible = "ricoh,r2025sd", |
| 89 | .data = (void *)rtc_r2025sd |
| 90 | }, |
| 91 | { |
| 92 | .compatible = "ricoh,r2221tl", |
| 93 | .data = (void *)rtc_r2221tl |
| 94 | }, |
| 95 | { |
| 96 | .compatible = "ricoh,rs5c372a", |
| 97 | .data = (void *)rtc_rs5c372a |
| 98 | }, |
| 99 | { |
| 100 | .compatible = "ricoh,rs5c372b", |
| 101 | .data = (void *)rtc_rs5c372b |
| 102 | }, |
| 103 | { |
| 104 | .compatible = "ricoh,rv5c386", |
| 105 | .data = (void *)rtc_rv5c386 |
| 106 | }, |
| 107 | { |
| 108 | .compatible = "ricoh,rv5c387a", |
| 109 | .data = (void *)rtc_rv5c387a |
| 110 | }, |
| 111 | { } |
| 112 | }; |
| 113 | MODULE_DEVICE_TABLE(of, rs5c372_of_match); |
| 114 | |
| 115 | /* REVISIT: this assumes that: |
| 116 | * - we're in the 21st century, so it's safe to ignore the century |
| 117 | * bit for rv5c38[67] (REG_MONTH bit 7); |
| 118 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) |
| 119 | */ |
| 120 | struct rs5c372 { |
| 121 | struct i2c_client *client; |
| 122 | struct rtc_device *rtc; |
| 123 | enum rtc_type type; |
| 124 | unsigned time24:1; |
| 125 | unsigned has_irq:1; |
| 126 | unsigned smbus:1; |
| 127 | char buf[17]; |
| 128 | char *regs; |
| 129 | }; |
| 130 | |
| 131 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
| 132 | { |
| 133 | struct i2c_client *client = rs5c->client; |
| 134 | struct i2c_msg msgs[] = { |
| 135 | { |
| 136 | .addr = client->addr, |
| 137 | .flags = I2C_M_RD, |
| 138 | .len = sizeof(rs5c->buf), |
| 139 | .buf = rs5c->buf |
| 140 | }, |
| 141 | }; |
| 142 | |
| 143 | /* This implements the third reading method from the datasheet, using |
| 144 | * an internal address that's reset after each transaction (by STOP) |
| 145 | * to 0x0f ... so we read extra registers, and skip the first one. |
| 146 | * |
| 147 | * The first method doesn't work with the iop3xx adapter driver, on at |
| 148 | * least 80219 chips; this works around that bug. |
| 149 | * |
| 150 | * The third method on the other hand doesn't work for the SMBus-only |
| 151 | * configurations, so we use the the first method there, stripping off |
| 152 | * the extra register in the process. |
| 153 | */ |
| 154 | if (rs5c->smbus) { |
| 155 | int addr = RS5C_ADDR(RS5C372_REG_SECS); |
| 156 | int size = sizeof(rs5c->buf) - 1; |
| 157 | |
| 158 | if (i2c_smbus_read_i2c_block_data(client, addr, size, |
| 159 | rs5c->buf + 1) != size) { |
| 160 | dev_warn(&client->dev, "can't read registers\n"); |
| 161 | return -EIO; |
| 162 | } |
| 163 | } else { |
| 164 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { |
| 165 | dev_warn(&client->dev, "can't read registers\n"); |
| 166 | return -EIO; |
| 167 | } |
| 168 | } |
| 169 | |
| 170 | dev_dbg(&client->dev, |
| 171 | "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n", |
| 172 | rs5c->regs + 0, rs5c->regs[3], |
| 173 | rs5c->regs + 4, rs5c->regs[7], |
| 174 | rs5c->regs + 8, rs5c->regs + 11, |
| 175 | rs5c->regs[14], rs5c->regs[15]); |
| 176 | |
| 177 | return 0; |
| 178 | } |
| 179 | |
| 180 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
| 181 | { |
| 182 | unsigned hour; |
| 183 | |
| 184 | if (rs5c->time24) |
| 185 | return bcd2bin(reg & 0x3f); |
| 186 | |
| 187 | hour = bcd2bin(reg & 0x1f); |
| 188 | if (hour == 12) |
| 189 | hour = 0; |
| 190 | if (reg & 0x20) |
| 191 | hour += 12; |
| 192 | return hour; |
| 193 | } |
| 194 | |
| 195 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) |
| 196 | { |
| 197 | if (rs5c->time24) |
| 198 | return bin2bcd(hour); |
| 199 | |
| 200 | if (hour > 12) |
| 201 | return 0x20 | bin2bcd(hour - 12); |
| 202 | if (hour == 12) |
| 203 | return 0x20 | bin2bcd(12); |
| 204 | if (hour == 0) |
| 205 | return bin2bcd(12); |
| 206 | return bin2bcd(hour); |
| 207 | } |
| 208 | |
| 209 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) |
| 210 | { |
| 211 | struct i2c_client *client = to_i2c_client(dev); |
| 212 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 213 | int status = rs5c_get_regs(rs5c); |
| 214 | unsigned char ctrl2 = rs5c->regs[RS5C_REG_CTRL2]; |
| 215 | |
| 216 | if (status < 0) |
| 217 | return status; |
| 218 | |
| 219 | switch (rs5c->type) { |
| 220 | case rtc_r2025sd: |
| 221 | case rtc_r2221tl: |
| 222 | if ((rs5c->type == rtc_r2025sd && !(ctrl2 & R2x2x_CTRL2_XSTP)) || |
| 223 | (rs5c->type == rtc_r2221tl && (ctrl2 & R2x2x_CTRL2_XSTP))) { |
| 224 | dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n"); |
| 225 | return -EINVAL; |
| 226 | } |
| 227 | break; |
| 228 | default: |
| 229 | if (ctrl2 & RS5C_CTRL2_XSTP) { |
| 230 | dev_warn(&client->dev, "rtc oscillator interruption detected. Please reset the rtc clock.\n"); |
| 231 | return -EINVAL; |
| 232 | } |
| 233 | } |
| 234 | |
| 235 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
| 236 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); |
| 237 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
| 238 | |
| 239 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
| 240 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); |
| 241 | |
| 242 | /* tm->tm_mon is zero-based */ |
| 243 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
| 244 | |
| 245 | /* year is 1900 + tm->tm_year */ |
| 246 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
| 247 | |
| 248 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
| 249 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 250 | __func__, |
| 251 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 252 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 253 | |
| 254 | return 0; |
| 255 | } |
| 256 | |
| 257 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) |
| 258 | { |
| 259 | struct i2c_client *client = to_i2c_client(dev); |
| 260 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 261 | unsigned char buf[7]; |
| 262 | unsigned char ctrl2; |
| 263 | int addr; |
| 264 | |
| 265 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
| 266 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
| 267 | __func__, |
| 268 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
| 269 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
| 270 | |
| 271 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
| 272 | buf[0] = bin2bcd(tm->tm_sec); |
| 273 | buf[1] = bin2bcd(tm->tm_min); |
| 274 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
| 275 | buf[3] = bin2bcd(tm->tm_wday); |
| 276 | buf[4] = bin2bcd(tm->tm_mday); |
| 277 | buf[5] = bin2bcd(tm->tm_mon + 1); |
| 278 | buf[6] = bin2bcd(tm->tm_year - 100); |
| 279 | |
| 280 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
| 281 | dev_dbg(&client->dev, "%s: write error in line %i\n", |
| 282 | __func__, __LINE__); |
| 283 | return -EIO; |
| 284 | } |
| 285 | |
| 286 | addr = RS5C_ADDR(RS5C_REG_CTRL2); |
| 287 | ctrl2 = i2c_smbus_read_byte_data(client, addr); |
| 288 | |
| 289 | /* clear rtc warning bits */ |
| 290 | switch (rs5c->type) { |
| 291 | case rtc_r2025sd: |
| 292 | case rtc_r2221tl: |
| 293 | ctrl2 &= ~(R2x2x_CTRL2_VDET | R2x2x_CTRL2_PON); |
| 294 | if (rs5c->type == rtc_r2025sd) |
| 295 | ctrl2 |= R2x2x_CTRL2_XSTP; |
| 296 | else |
| 297 | ctrl2 &= ~R2x2x_CTRL2_XSTP; |
| 298 | break; |
| 299 | default: |
| 300 | ctrl2 &= ~RS5C_CTRL2_XSTP; |
| 301 | break; |
| 302 | } |
| 303 | |
| 304 | if (i2c_smbus_write_byte_data(client, addr, ctrl2) < 0) { |
| 305 | dev_dbg(&client->dev, "%s: write error in line %i\n", |
| 306 | __func__, __LINE__); |
| 307 | return -EIO; |
| 308 | } |
| 309 | |
| 310 | return 0; |
| 311 | } |
| 312 | |
| 313 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
| 314 | #define NEED_TRIM |
| 315 | #endif |
| 316 | |
| 317 | #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) |
| 318 | #define NEED_TRIM |
| 319 | #endif |
| 320 | |
| 321 | #ifdef NEED_TRIM |
| 322 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
| 323 | { |
| 324 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
| 325 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
| 326 | |
| 327 | if (osc) |
| 328 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
| 329 | |
| 330 | if (trim) { |
| 331 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
| 332 | tmp &= RS5C372_TRIM_MASK; |
| 333 | if (tmp & 0x3e) { |
| 334 | int t = tmp & 0x3f; |
| 335 | |
| 336 | if (tmp & 0x40) |
| 337 | t = (~t | (s8)0xc0) + 1; |
| 338 | else |
| 339 | t = t - 1; |
| 340 | |
| 341 | tmp = t * 2; |
| 342 | } else |
| 343 | tmp = 0; |
| 344 | *trim = tmp; |
| 345 | } |
| 346 | |
| 347 | return 0; |
| 348 | } |
| 349 | #endif |
| 350 | |
| 351 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 352 | { |
| 353 | struct i2c_client *client = to_i2c_client(dev); |
| 354 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 355 | unsigned char buf; |
| 356 | int status, addr; |
| 357 | |
| 358 | buf = rs5c->regs[RS5C_REG_CTRL1]; |
| 359 | |
| 360 | if (!rs5c->has_irq) |
| 361 | return -EINVAL; |
| 362 | |
| 363 | status = rs5c_get_regs(rs5c); |
| 364 | if (status < 0) |
| 365 | return status; |
| 366 | |
| 367 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 368 | if (enabled) |
| 369 | buf |= RS5C_CTRL1_AALE; |
| 370 | else |
| 371 | buf &= ~RS5C_CTRL1_AALE; |
| 372 | |
| 373 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { |
| 374 | dev_warn(dev, "can't update alarm\n"); |
| 375 | status = -EIO; |
| 376 | } else |
| 377 | rs5c->regs[RS5C_REG_CTRL1] = buf; |
| 378 | |
| 379 | return status; |
| 380 | } |
| 381 | |
| 382 | |
| 383 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
| 384 | * which only exposes a polled programming interface; and since |
| 385 | * these calls map directly to those EFI requests; we don't demand |
| 386 | * we have an IRQ for this chip when we go through this API. |
| 387 | * |
| 388 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs |
| 389 | * though, managed through RTC_AIE_{ON,OFF} requests. |
| 390 | */ |
| 391 | |
| 392 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 393 | { |
| 394 | struct i2c_client *client = to_i2c_client(dev); |
| 395 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 396 | int status, wday_offs; |
| 397 | struct rtc_time rtc; |
| 398 | unsigned long alarm_secs; |
| 399 | |
| 400 | status = rs5c_get_regs(rs5c); |
| 401 | if (status < 0) |
| 402 | return status; |
| 403 | |
| 404 | /* report alarm time */ |
| 405 | t->time.tm_sec = 0; |
| 406 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
| 407 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
| 408 | t->time.tm_wday = ffs(rs5c->regs[RS5C_REG_ALARM_A_WDAY] & 0x7f) - 1; |
| 409 | |
| 410 | /* determine the day, month and year based on alarm wday, taking as a |
| 411 | * reference the current time from the rtc |
| 412 | */ |
| 413 | status = rs5c372_rtc_read_time(dev, &rtc); |
| 414 | if (status < 0) |
| 415 | return status; |
| 416 | |
| 417 | wday_offs = t->time.tm_wday - rtc.tm_wday; |
| 418 | alarm_secs = mktime64(rtc.tm_year + 1900, |
| 419 | rtc.tm_mon + 1, |
| 420 | rtc.tm_mday + wday_offs, |
| 421 | t->time.tm_hour, |
| 422 | t->time.tm_min, |
| 423 | t->time.tm_sec); |
| 424 | |
| 425 | if (wday_offs < 0 || (wday_offs == 0 && |
| 426 | (t->time.tm_hour < rtc.tm_hour || |
| 427 | (t->time.tm_hour == rtc.tm_hour && |
| 428 | t->time.tm_min <= rtc.tm_min)))) |
| 429 | alarm_secs += 7 * 86400; |
| 430 | |
| 431 | rtc_time64_to_tm(alarm_secs, &t->time); |
| 432 | |
| 433 | /* ... and status */ |
| 434 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); |
| 435 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); |
| 436 | |
| 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
| 441 | { |
| 442 | struct i2c_client *client = to_i2c_client(dev); |
| 443 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
| 444 | int status, addr, i; |
| 445 | unsigned char buf[3]; |
| 446 | struct rtc_time rtc_tm; |
| 447 | unsigned long rtc_secs, alarm_secs; |
| 448 | |
| 449 | /* chip only can handle alarms up to one week in the future*/ |
| 450 | status = rs5c372_rtc_read_time(dev, &rtc_tm); |
| 451 | if (status) |
| 452 | return status; |
| 453 | rtc_secs = rtc_tm_to_time64(&rtc_tm); |
| 454 | alarm_secs = rtc_tm_to_time64(&t->time); |
| 455 | if (alarm_secs >= rtc_secs + 7 * 86400) { |
| 456 | dev_err(dev, "%s: alarm maximum is one week in the future (%d)\n", |
| 457 | __func__, status); |
| 458 | return -EINVAL; |
| 459 | } |
| 460 | |
| 461 | /* REVISIT: round up tm_sec */ |
| 462 | |
| 463 | /* if needed, disable irq (clears pending status) */ |
| 464 | status = rs5c_get_regs(rs5c); |
| 465 | if (status < 0) |
| 466 | return status; |
| 467 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { |
| 468 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 469 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; |
| 470 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { |
| 471 | dev_dbg(dev, "can't disable alarm\n"); |
| 472 | return -EIO; |
| 473 | } |
| 474 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
| 475 | } |
| 476 | |
| 477 | /* set alarm */ |
| 478 | buf[0] = bin2bcd(t->time.tm_min); |
| 479 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
| 480 | /* each bit is the day of the week, 0x7f means all days */ |
| 481 | buf[2] = (t->time.tm_wday >= 0 && t->time.tm_wday < 7) ? |
| 482 | BIT(t->time.tm_wday) : 0x7f; |
| 483 | |
| 484 | for (i = 0; i < sizeof(buf); i++) { |
| 485 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); |
| 486 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { |
| 487 | dev_dbg(dev, "can't set alarm time\n"); |
| 488 | return -EIO; |
| 489 | } |
| 490 | } |
| 491 | |
| 492 | /* ... and maybe enable its irq */ |
| 493 | if (t->enabled) { |
| 494 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 495 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; |
| 496 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) |
| 497 | dev_warn(dev, "can't enable alarm\n"); |
| 498 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
| 499 | } |
| 500 | |
| 501 | return 0; |
| 502 | } |
| 503 | |
| 504 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
| 505 | |
| 506 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
| 507 | { |
| 508 | int err, osc, trim; |
| 509 | |
| 510 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
| 511 | if (err == 0) { |
| 512 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
| 513 | osc / 1000, osc % 1000); |
| 514 | seq_printf(seq, "trim\t\t: %d\n", trim); |
| 515 | } |
| 516 | |
| 517 | return 0; |
| 518 | } |
| 519 | |
| 520 | #else |
| 521 | #define rs5c372_rtc_proc NULL |
| 522 | #endif |
| 523 | |
| 524 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
| 525 | .proc = rs5c372_rtc_proc, |
| 526 | .read_time = rs5c372_rtc_read_time, |
| 527 | .set_time = rs5c372_rtc_set_time, |
| 528 | .read_alarm = rs5c_read_alarm, |
| 529 | .set_alarm = rs5c_set_alarm, |
| 530 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
| 531 | }; |
| 532 | |
| 533 | #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) |
| 534 | |
| 535 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
| 536 | struct device_attribute *attr, char *buf) |
| 537 | { |
| 538 | int err, trim; |
| 539 | |
| 540 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
| 541 | if (err) |
| 542 | return err; |
| 543 | |
| 544 | return sprintf(buf, "%d\n", trim); |
| 545 | } |
| 546 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); |
| 547 | |
| 548 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, |
| 549 | struct device_attribute *attr, char *buf) |
| 550 | { |
| 551 | int err, osc; |
| 552 | |
| 553 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
| 554 | if (err) |
| 555 | return err; |
| 556 | |
| 557 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
| 558 | } |
| 559 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); |
| 560 | |
| 561 | static int rs5c_sysfs_register(struct device *dev) |
| 562 | { |
| 563 | int err; |
| 564 | |
| 565 | err = device_create_file(dev, &dev_attr_trim); |
| 566 | if (err) |
| 567 | return err; |
| 568 | err = device_create_file(dev, &dev_attr_osc); |
| 569 | if (err) |
| 570 | device_remove_file(dev, &dev_attr_trim); |
| 571 | |
| 572 | return err; |
| 573 | } |
| 574 | |
| 575 | static void rs5c_sysfs_unregister(struct device *dev) |
| 576 | { |
| 577 | device_remove_file(dev, &dev_attr_trim); |
| 578 | device_remove_file(dev, &dev_attr_osc); |
| 579 | } |
| 580 | |
| 581 | #else |
| 582 | static int rs5c_sysfs_register(struct device *dev) |
| 583 | { |
| 584 | return 0; |
| 585 | } |
| 586 | |
| 587 | static void rs5c_sysfs_unregister(struct device *dev) |
| 588 | { |
| 589 | /* nothing */ |
| 590 | } |
| 591 | #endif /* SYSFS */ |
| 592 | |
| 593 | static struct i2c_driver rs5c372_driver; |
| 594 | |
| 595 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
| 596 | { |
| 597 | unsigned char buf[2]; |
| 598 | int addr, i, ret = 0; |
| 599 | |
| 600 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
| 601 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; |
| 602 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; |
| 603 | |
| 604 | switch (rs5c372->type) { |
| 605 | case rtc_r2025sd: |
| 606 | if (buf[1] & R2x2x_CTRL2_XSTP) |
| 607 | return ret; |
| 608 | break; |
| 609 | case rtc_r2221tl: |
| 610 | if (!(buf[1] & R2x2x_CTRL2_XSTP)) |
| 611 | return ret; |
| 612 | break; |
| 613 | default: |
| 614 | if (!(buf[1] & RS5C_CTRL2_XSTP)) |
| 615 | return ret; |
| 616 | break; |
| 617 | } |
| 618 | |
| 619 | /* use 24hr mode */ |
| 620 | switch (rs5c372->type) { |
| 621 | case rtc_rs5c372a: |
| 622 | case rtc_rs5c372b: |
| 623 | buf[1] |= RS5C372_CTRL2_24; |
| 624 | rs5c372->time24 = 1; |
| 625 | break; |
| 626 | case rtc_r2025sd: |
| 627 | case rtc_r2221tl: |
| 628 | case rtc_rv5c386: |
| 629 | case rtc_rv5c387a: |
| 630 | buf[0] |= RV5C387_CTRL1_24; |
| 631 | rs5c372->time24 = 1; |
| 632 | break; |
| 633 | default: |
| 634 | /* impossible */ |
| 635 | break; |
| 636 | } |
| 637 | |
| 638 | for (i = 0; i < sizeof(buf); i++) { |
| 639 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); |
| 640 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); |
| 641 | if (unlikely(ret < 0)) |
| 642 | return ret; |
| 643 | } |
| 644 | |
| 645 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; |
| 646 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; |
| 647 | |
| 648 | return 0; |
| 649 | } |
| 650 | |
| 651 | static int rs5c372_probe(struct i2c_client *client, |
| 652 | const struct i2c_device_id *id) |
| 653 | { |
| 654 | int err = 0; |
| 655 | int smbus_mode = 0; |
| 656 | struct rs5c372 *rs5c372; |
| 657 | bool rs5c372_can_wakeup_device = false; |
| 658 | |
| 659 | dev_dbg(&client->dev, "%s\n", __func__); |
| 660 | |
| 661 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
| 662 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { |
| 663 | /* |
| 664 | * If we don't have any master mode adapter, try breaking |
| 665 | * it down in to the barest of capabilities. |
| 666 | */ |
| 667 | if (i2c_check_functionality(client->adapter, |
| 668 | I2C_FUNC_SMBUS_BYTE_DATA | |
| 669 | I2C_FUNC_SMBUS_I2C_BLOCK)) |
| 670 | smbus_mode = 1; |
| 671 | else { |
| 672 | /* Still no good, give up */ |
| 673 | err = -ENODEV; |
| 674 | goto exit; |
| 675 | } |
| 676 | } |
| 677 | |
| 678 | rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372), |
| 679 | GFP_KERNEL); |
| 680 | if (!rs5c372) { |
| 681 | err = -ENOMEM; |
| 682 | goto exit; |
| 683 | } |
| 684 | |
| 685 | rs5c372->client = client; |
| 686 | i2c_set_clientdata(client, rs5c372); |
| 687 | if (client->dev.of_node) |
| 688 | rs5c372->type = (enum rtc_type) |
| 689 | of_device_get_match_data(&client->dev); |
| 690 | else |
| 691 | rs5c372->type = id->driver_data; |
| 692 | |
| 693 | #ifdef CONFIG_OF |
| 694 | if(of_property_read_bool(client->dev.of_node, |
| 695 | "wakeup-source")) |
| 696 | rs5c372_can_wakeup_device = true; |
| 697 | #endif |
| 698 | |
| 699 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
| 700 | rs5c372->regs = &rs5c372->buf[1]; |
| 701 | rs5c372->smbus = smbus_mode; |
| 702 | |
| 703 | err = rs5c_get_regs(rs5c372); |
| 704 | if (err < 0) |
| 705 | goto exit; |
| 706 | |
| 707 | /* clock may be set for am/pm or 24 hr time */ |
| 708 | switch (rs5c372->type) { |
| 709 | case rtc_rs5c372a: |
| 710 | case rtc_rs5c372b: |
| 711 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. |
| 712 | * so does periodic irq, except some 327a modes. |
| 713 | */ |
| 714 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) |
| 715 | rs5c372->time24 = 1; |
| 716 | break; |
| 717 | case rtc_r2025sd: |
| 718 | case rtc_r2221tl: |
| 719 | case rtc_rv5c386: |
| 720 | case rtc_rv5c387a: |
| 721 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) |
| 722 | rs5c372->time24 = 1; |
| 723 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic |
| 724 | * irq, on both 386 and 387 |
| 725 | */ |
| 726 | break; |
| 727 | default: |
| 728 | dev_err(&client->dev, "unknown RTC type\n"); |
| 729 | goto exit; |
| 730 | } |
| 731 | |
| 732 | rs5c372->has_irq = 1; |
| 733 | |
| 734 | /* if the oscillator lost power and no other software (like |
| 735 | * the bootloader) set it up, do it here. |
| 736 | * |
| 737 | * The R2025S/D does this a little differently than the other |
| 738 | * parts, so we special case that.. |
| 739 | */ |
| 740 | err = rs5c_oscillator_setup(rs5c372); |
| 741 | if (unlikely(err < 0)) { |
| 742 | dev_err(&client->dev, "setup error\n"); |
| 743 | goto exit; |
| 744 | } |
| 745 | |
| 746 | dev_info(&client->dev, "%s found, %s\n", |
| 747 | ({ char *s; switch (rs5c372->type) { |
| 748 | case rtc_r2025sd: s = "r2025sd"; break; |
| 749 | case rtc_r2221tl: s = "r2221tl"; break; |
| 750 | case rtc_rs5c372a: s = "rs5c372a"; break; |
| 751 | case rtc_rs5c372b: s = "rs5c372b"; break; |
| 752 | case rtc_rv5c386: s = "rv5c386"; break; |
| 753 | case rtc_rv5c387a: s = "rv5c387a"; break; |
| 754 | default: s = "chip"; break; |
| 755 | }; s;}), |
| 756 | rs5c372->time24 ? "24hr" : "am/pm" |
| 757 | ); |
| 758 | |
| 759 | /* REVISIT use client->irq to register alarm irq ... */ |
| 760 | if (rs5c372_can_wakeup_device) { |
| 761 | device_init_wakeup(&client->dev, true); |
| 762 | } |
| 763 | |
| 764 | rs5c372->rtc = devm_rtc_device_register(&client->dev, |
| 765 | rs5c372_driver.driver.name, |
| 766 | &rs5c372_rtc_ops, THIS_MODULE); |
| 767 | |
| 768 | if (IS_ERR(rs5c372->rtc)) { |
| 769 | err = PTR_ERR(rs5c372->rtc); |
| 770 | goto exit; |
| 771 | } |
| 772 | |
| 773 | err = rs5c_sysfs_register(&client->dev); |
| 774 | if (err) |
| 775 | goto exit; |
| 776 | |
| 777 | /* the rs5c372 alarm only supports a minute accuracy */ |
| 778 | rs5c372->rtc->uie_unsupported = 1; |
| 779 | |
| 780 | return 0; |
| 781 | |
| 782 | exit: |
| 783 | return err; |
| 784 | } |
| 785 | |
| 786 | static int rs5c372_remove(struct i2c_client *client) |
| 787 | { |
| 788 | rs5c_sysfs_unregister(&client->dev); |
| 789 | return 0; |
| 790 | } |
| 791 | |
| 792 | static struct i2c_driver rs5c372_driver = { |
| 793 | .driver = { |
| 794 | .name = "rtc-rs5c372", |
| 795 | .of_match_table = of_match_ptr(rs5c372_of_match), |
| 796 | }, |
| 797 | .probe = rs5c372_probe, |
| 798 | .remove = rs5c372_remove, |
| 799 | .id_table = rs5c372_id, |
| 800 | }; |
| 801 | |
| 802 | module_i2c_driver(rs5c372_driver); |
| 803 | |
| 804 | MODULE_AUTHOR( |
| 805 | "Pavel Mironchik <pmironchik@optifacio.net>, " |
| 806 | "Alessandro Zummo <a.zummo@towertech.it>, " |
| 807 | "Paul Mundt <lethal@linux-sh.org>"); |
| 808 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
| 809 | MODULE_LICENSE("GPL"); |