blob: 3b3f909407c39cbeee25d4c03aa2ba029c6f17ee [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2// Copyright(c) 2015-18 Intel Corporation.
3
4/*
5 * stream.c - SoundWire Bus stream operations.
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/mod_devicetable.h>
13#include <linux/slab.h>
14#include <linux/soundwire/sdw_registers.h>
15#include <linux/soundwire/sdw.h>
16#include "bus.h"
17
18/*
19 * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
20 *
21 * The rows are arranged as per the array index value programmed
22 * in register. The index 15 has dummy value 0 in order to fill hole.
23 */
24int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
25 96, 100, 120, 128, 150, 160, 250, 0,
26 192, 200, 240, 256, 72, 144, 90, 180};
27
28int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
29
30int sdw_find_col_index(int col)
31{
32 int i;
33
34 for (i = 0; i < SDW_FRAME_COLS; i++) {
35 if (sdw_cols[i] == col)
36 return i;
37 }
38
39 pr_warn("Requested column not found, selecting lowest column no: 2\n");
40 return 0;
41}
42EXPORT_SYMBOL(sdw_find_col_index);
43
44int sdw_find_row_index(int row)
45{
46 int i;
47
48 for (i = 0; i < SDW_FRAME_ROWS; i++) {
49 if (sdw_rows[i] == row)
50 return i;
51 }
52
53 pr_warn("Requested row not found, selecting lowest row no: 48\n");
54 return 0;
55}
56EXPORT_SYMBOL(sdw_find_row_index);
57
58static int _sdw_program_slave_port_params(struct sdw_bus *bus,
59 struct sdw_slave *slave,
60 struct sdw_transport_params *t_params,
61 enum sdw_dpn_type type)
62{
63 u32 addr1, addr2, addr3, addr4;
64 int ret;
65 u16 wbuf;
66
67 if (bus->params.next_bank) {
68 addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
69 addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
70 addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
71 addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
72 } else {
73 addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
74 addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
75 addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
76 addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
77 }
78
79 /* Program DPN_OffsetCtrl2 registers */
80 ret = sdw_write(slave, addr1, t_params->offset2);
81 if (ret < 0) {
82 dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
83 return ret;
84 }
85
86 /* Program DPN_BlockCtrl3 register */
87 ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
88 if (ret < 0) {
89 dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
90 return ret;
91 }
92
93 /*
94 * Data ports are FULL, SIMPLE and REDUCED. This function handles
95 * FULL and REDUCED only and beyond this point only FULL is
96 * handled, so bail out if we are not FULL data port type
97 */
98 if (type != SDW_DPN_FULL)
99 return ret;
100
101 /* Program DPN_SampleCtrl2 register */
102 wbuf = (t_params->sample_interval - 1);
103 wbuf &= SDW_DPN_SAMPLECTRL_HIGH;
104 wbuf >>= SDW_REG_SHIFT(SDW_DPN_SAMPLECTRL_HIGH);
105
106 ret = sdw_write(slave, addr3, wbuf);
107 if (ret < 0) {
108 dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
109 return ret;
110 }
111
112 /* Program DPN_HCtrl register */
113 wbuf = t_params->hstart;
114 wbuf <<= SDW_REG_SHIFT(SDW_DPN_HCTRL_HSTART);
115 wbuf |= t_params->hstop;
116
117 ret = sdw_write(slave, addr4, wbuf);
118 if (ret < 0)
119 dev_err(bus->dev, "DPN_HCtrl register write failed\n");
120
121 return ret;
122}
123
124static int sdw_program_slave_port_params(struct sdw_bus *bus,
125 struct sdw_slave_runtime *s_rt,
126 struct sdw_port_runtime *p_rt)
127{
128 struct sdw_transport_params *t_params = &p_rt->transport_params;
129 struct sdw_port_params *p_params = &p_rt->port_params;
130 struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
131 u32 addr1, addr2, addr3, addr4, addr5, addr6;
132 struct sdw_dpn_prop *dpn_prop;
133 int ret;
134 u8 wbuf;
135
136 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
137 s_rt->direction,
138 t_params->port_num);
139 if (!dpn_prop)
140 return -EINVAL;
141
142 addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
143 addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
144
145 if (bus->params.next_bank) {
146 addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
147 addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
148 addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
149 addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
150
151 } else {
152 addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
153 addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
154 addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
155 addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
156 }
157
158 /* Program DPN_PortCtrl register */
159 wbuf = p_params->data_mode << SDW_REG_SHIFT(SDW_DPN_PORTCTRL_DATAMODE);
160 wbuf |= p_params->flow_mode;
161
162 ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
163 if (ret < 0) {
164 dev_err(&s_rt->slave->dev,
165 "DPN_PortCtrl register write failed for port %d\n",
166 t_params->port_num);
167 return ret;
168 }
169
170 /* Program DPN_BlockCtrl1 register */
171 ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
172 if (ret < 0) {
173 dev_err(&s_rt->slave->dev,
174 "DPN_BlockCtrl1 register write failed for port %d\n",
175 t_params->port_num);
176 return ret;
177 }
178
179 /* Program DPN_SampleCtrl1 register */
180 wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
181 ret = sdw_write(s_rt->slave, addr3, wbuf);
182 if (ret < 0) {
183 dev_err(&s_rt->slave->dev,
184 "DPN_SampleCtrl1 register write failed for port %d\n",
185 t_params->port_num);
186 return ret;
187 }
188
189 /* Program DPN_OffsetCtrl1 registers */
190 ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
191 if (ret < 0) {
192 dev_err(&s_rt->slave->dev,
193 "DPN_OffsetCtrl1 register write failed for port %d\n",
194 t_params->port_num);
195 return ret;
196 }
197
198 /* Program DPN_BlockCtrl2 register*/
199 if (t_params->blk_grp_ctrl_valid) {
200 ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
201 if (ret < 0) {
202 dev_err(&s_rt->slave->dev,
203 "DPN_BlockCtrl2 reg write failed for port %d\n",
204 t_params->port_num);
205 return ret;
206 }
207 }
208
209 /* program DPN_LaneCtrl register */
210 if (slave_prop->lane_control_support) {
211 ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
212 if (ret < 0) {
213 dev_err(&s_rt->slave->dev,
214 "DPN_LaneCtrl register write failed for port %d\n",
215 t_params->port_num);
216 return ret;
217 }
218 }
219
220 if (dpn_prop->type != SDW_DPN_SIMPLE) {
221 ret = _sdw_program_slave_port_params(bus, s_rt->slave,
222 t_params, dpn_prop->type);
223 if (ret < 0)
224 dev_err(&s_rt->slave->dev,
225 "Transport reg write failed for port: %d\n",
226 t_params->port_num);
227 }
228
229 return ret;
230}
231
232static int sdw_program_master_port_params(struct sdw_bus *bus,
233 struct sdw_port_runtime *p_rt)
234{
235 int ret;
236
237 /*
238 * we need to set transport and port parameters for the port.
239 * Transport parameters refers to the sample interval, offsets and
240 * hstart/stop etc of the data. Port parameters refers to word
241 * length, flow mode etc of the port
242 */
243 ret = bus->port_ops->dpn_set_port_transport_params(bus,
244 &p_rt->transport_params,
245 bus->params.next_bank);
246 if (ret < 0)
247 return ret;
248
249 return bus->port_ops->dpn_set_port_params(bus,
250 &p_rt->port_params,
251 bus->params.next_bank);
252}
253
254/**
255 * sdw_program_port_params() - Programs transport parameters of Master(s)
256 * and Slave(s)
257 *
258 * @m_rt: Master stream runtime
259 */
260static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
261{
262 struct sdw_slave_runtime *s_rt = NULL;
263 struct sdw_bus *bus = m_rt->bus;
264 struct sdw_port_runtime *p_rt;
265 int ret = 0;
266
267 /* Program transport & port parameters for Slave(s) */
268 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
269 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
270 ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
271 if (ret < 0)
272 return ret;
273 }
274 }
275
276 /* Program transport & port parameters for Master(s) */
277 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
278 ret = sdw_program_master_port_params(bus, p_rt);
279 if (ret < 0)
280 return ret;
281 }
282
283 return 0;
284}
285
286/**
287 * sdw_enable_disable_slave_ports: Enable/disable slave data port
288 *
289 * @bus: bus instance
290 * @s_rt: slave runtime
291 * @p_rt: port runtime
292 * @en: enable or disable operation
293 *
294 * This function only sets the enable/disable bits in the relevant bank, the
295 * actual enable/disable is done with a bank switch
296 */
297static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
298 struct sdw_slave_runtime *s_rt,
299 struct sdw_port_runtime *p_rt,
300 bool en)
301{
302 struct sdw_transport_params *t_params = &p_rt->transport_params;
303 u32 addr;
304 int ret;
305
306 if (bus->params.next_bank)
307 addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
308 else
309 addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
310
311 /*
312 * Since bus doesn't support sharing a port across two streams,
313 * it is safe to reset this register
314 */
315 if (en)
316 ret = sdw_update(s_rt->slave, addr, 0xFF, p_rt->ch_mask);
317 else
318 ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0);
319
320 if (ret < 0)
321 dev_err(&s_rt->slave->dev,
322 "Slave chn_en reg write failed:%d port:%d\n",
323 ret, t_params->port_num);
324
325 return ret;
326}
327
328static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
329 struct sdw_port_runtime *p_rt,
330 bool en)
331{
332 struct sdw_transport_params *t_params = &p_rt->transport_params;
333 struct sdw_bus *bus = m_rt->bus;
334 struct sdw_enable_ch enable_ch;
335 int ret;
336
337 enable_ch.port_num = p_rt->num;
338 enable_ch.ch_mask = p_rt->ch_mask;
339 enable_ch.enable = en;
340
341 /* Perform Master port channel(s) enable/disable */
342 if (bus->port_ops->dpn_port_enable_ch) {
343 ret = bus->port_ops->dpn_port_enable_ch(bus,
344 &enable_ch,
345 bus->params.next_bank);
346 if (ret < 0) {
347 dev_err(bus->dev,
348 "Master chn_en write failed:%d port:%d\n",
349 ret, t_params->port_num);
350 return ret;
351 }
352 } else {
353 dev_err(bus->dev,
354 "dpn_port_enable_ch not supported, %s failed\n",
355 en ? "enable" : "disable");
356 return -EINVAL;
357 }
358
359 return 0;
360}
361
362/**
363 * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
364 * Slave(s)
365 *
366 * @m_rt: Master stream runtime
367 * @en: mode (enable/disable)
368 */
369static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
370{
371 struct sdw_port_runtime *s_port, *m_port;
372 struct sdw_slave_runtime *s_rt;
373 int ret = 0;
374
375 /* Enable/Disable Slave port(s) */
376 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
377 list_for_each_entry(s_port, &s_rt->port_list, port_node) {
378 ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
379 s_port, en);
380 if (ret < 0)
381 return ret;
382 }
383 }
384
385 /* Enable/Disable Master port(s) */
386 list_for_each_entry(m_port, &m_rt->port_list, port_node) {
387 ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
388 if (ret < 0)
389 return ret;
390 }
391
392 return 0;
393}
394
395static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
396 struct sdw_prepare_ch prep_ch,
397 enum sdw_port_prep_ops cmd)
398{
399 const struct sdw_slave_ops *ops = s_rt->slave->ops;
400 int ret;
401
402 if (ops->port_prep) {
403 ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
404 if (ret < 0) {
405 dev_err(&s_rt->slave->dev,
406 "Slave Port Prep cmd %d failed: %d\n",
407 cmd, ret);
408 return ret;
409 }
410 }
411
412 return 0;
413}
414
415static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
416 struct sdw_slave_runtime *s_rt,
417 struct sdw_port_runtime *p_rt,
418 bool prep)
419{
420 struct completion *port_ready;
421 struct sdw_dpn_prop *dpn_prop;
422 struct sdw_prepare_ch prep_ch;
423 bool intr = false;
424 int ret = 0, val;
425 u32 addr;
426
427 prep_ch.num = p_rt->num;
428 prep_ch.ch_mask = p_rt->ch_mask;
429
430 dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
431 s_rt->direction,
432 prep_ch.num);
433 if (!dpn_prop) {
434 dev_err(bus->dev,
435 "Slave Port:%d properties not found\n", prep_ch.num);
436 return -EINVAL;
437 }
438
439 prep_ch.prepare = prep;
440
441 prep_ch.bank = bus->params.next_bank;
442
443 if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm)
444 intr = true;
445
446 /*
447 * Enable interrupt before Port prepare.
448 * For Port de-prepare, it is assumed that port
449 * was prepared earlier
450 */
451 if (prep && intr) {
452 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
453 dpn_prop->imp_def_interrupts);
454 if (ret < 0)
455 return ret;
456 }
457
458 /* Inform slave about the impending port prepare */
459 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
460
461 /* Prepare Slave port implementing CP_SM */
462 if (!dpn_prop->simple_ch_prep_sm) {
463 addr = SDW_DPN_PREPARECTRL(p_rt->num);
464
465 if (prep)
466 ret = sdw_update(s_rt->slave, addr,
467 0xFF, p_rt->ch_mask);
468 else
469 ret = sdw_update(s_rt->slave, addr, 0xFF, 0x0);
470
471 if (ret < 0) {
472 dev_err(&s_rt->slave->dev,
473 "Slave prep_ctrl reg write failed\n");
474 return ret;
475 }
476
477 /* Wait for completion on port ready */
478 port_ready = &s_rt->slave->port_ready[prep_ch.num];
479 wait_for_completion_timeout(port_ready,
480 msecs_to_jiffies(dpn_prop->ch_prep_timeout));
481
482 val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
483 if ((val < 0) || (val & p_rt->ch_mask)) {
484 ret = (val < 0) ? val : -ETIMEDOUT;
485 dev_err(&s_rt->slave->dev,
486 "Chn prep failed for port %d: %d\n", prep_ch.num, ret);
487 return ret;
488 }
489 }
490
491 /* Inform slaves about ports prepared */
492 sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
493
494 /* Disable interrupt after Port de-prepare */
495 if (!prep && intr)
496 ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
497 dpn_prop->imp_def_interrupts);
498
499 return ret;
500}
501
502static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
503 struct sdw_port_runtime *p_rt,
504 bool prep)
505{
506 struct sdw_transport_params *t_params = &p_rt->transport_params;
507 struct sdw_bus *bus = m_rt->bus;
508 const struct sdw_master_port_ops *ops = bus->port_ops;
509 struct sdw_prepare_ch prep_ch;
510 int ret = 0;
511
512 prep_ch.num = p_rt->num;
513 prep_ch.ch_mask = p_rt->ch_mask;
514 prep_ch.prepare = prep; /* Prepare/De-prepare */
515 prep_ch.bank = bus->params.next_bank;
516
517 /* Pre-prepare/Pre-deprepare port(s) */
518 if (ops->dpn_port_prep) {
519 ret = ops->dpn_port_prep(bus, &prep_ch);
520 if (ret < 0) {
521 dev_err(bus->dev, "Port prepare failed for port:%d\n",
522 t_params->port_num);
523 return ret;
524 }
525 }
526
527 return ret;
528}
529
530/**
531 * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
532 * Slave(s)
533 *
534 * @m_rt: Master runtime handle
535 * @prep: Prepare or De-prepare
536 */
537static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
538{
539 struct sdw_slave_runtime *s_rt;
540 struct sdw_port_runtime *p_rt;
541 int ret = 0;
542
543 /* Prepare/De-prepare Slave port(s) */
544 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
545 list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
546 ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
547 p_rt, prep);
548 if (ret < 0)
549 return ret;
550 }
551 }
552
553 /* Prepare/De-prepare Master port(s) */
554 list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
555 ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
556 if (ret < 0)
557 return ret;
558 }
559
560 return ret;
561}
562
563/**
564 * sdw_notify_config() - Notify bus configuration
565 *
566 * @m_rt: Master runtime handle
567 *
568 * This function notifies the Master(s) and Slave(s) of the
569 * new bus configuration.
570 */
571static int sdw_notify_config(struct sdw_master_runtime *m_rt)
572{
573 struct sdw_slave_runtime *s_rt;
574 struct sdw_bus *bus = m_rt->bus;
575 struct sdw_slave *slave;
576 int ret = 0;
577
578 if (bus->ops->set_bus_conf) {
579 ret = bus->ops->set_bus_conf(bus, &bus->params);
580 if (ret < 0)
581 return ret;
582 }
583
584 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
585 slave = s_rt->slave;
586
587 if (slave->ops->bus_config) {
588 ret = slave->ops->bus_config(slave, &bus->params);
589 if (ret < 0)
590 dev_err(bus->dev, "Notify Slave: %d failed\n",
591 slave->dev_num);
592 return ret;
593 }
594 }
595
596 return ret;
597}
598
599/**
600 * sdw_program_params() - Program transport and port parameters for Master(s)
601 * and Slave(s)
602 *
603 * @bus: SDW bus instance
604 */
605static int sdw_program_params(struct sdw_bus *bus)
606{
607 struct sdw_master_runtime *m_rt;
608 int ret = 0;
609
610 list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
611 ret = sdw_program_port_params(m_rt);
612 if (ret < 0) {
613 dev_err(bus->dev,
614 "Program transport params failed: %d\n", ret);
615 return ret;
616 }
617
618 ret = sdw_notify_config(m_rt);
619 if (ret < 0) {
620 dev_err(bus->dev,
621 "Notify bus config failed: %d\n", ret);
622 return ret;
623 }
624
625 /* Enable port(s) on alternate bank for all active streams */
626 if (m_rt->stream->state != SDW_STREAM_ENABLED)
627 continue;
628
629 ret = sdw_enable_disable_ports(m_rt, true);
630 if (ret < 0) {
631 dev_err(bus->dev, "Enable channel failed: %d\n", ret);
632 return ret;
633 }
634 }
635
636 return ret;
637}
638
639static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
640{
641 int col_index, row_index;
642 bool multi_link;
643 struct sdw_msg *wr_msg;
644 u8 *wbuf;
645 int ret;
646 u16 addr;
647
648 wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
649 if (!wr_msg)
650 return -ENOMEM;
651
652 bus->defer_msg.msg = wr_msg;
653
654 wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
655 if (!wbuf) {
656 ret = -ENOMEM;
657 goto error_1;
658 }
659
660 /* Get row and column index to program register */
661 col_index = sdw_find_col_index(bus->params.col);
662 row_index = sdw_find_row_index(bus->params.row);
663 wbuf[0] = col_index | (row_index << 3);
664
665 if (bus->params.next_bank)
666 addr = SDW_SCP_FRAMECTRL_B1;
667 else
668 addr = SDW_SCP_FRAMECTRL_B0;
669
670 sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
671 SDW_MSG_FLAG_WRITE, wbuf);
672 wr_msg->ssp_sync = true;
673
674 /*
675 * Set the multi_link flag only when both the hardware supports
676 * and there is a stream handled by multiple masters
677 */
678 multi_link = bus->multi_link && (m_rt_count > 1);
679
680 if (multi_link)
681 ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
682 else
683 ret = sdw_transfer(bus, wr_msg);
684
685 if (ret < 0) {
686 dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
687 goto error;
688 }
689
690 if (!multi_link) {
691 kfree(wr_msg);
692 kfree(wbuf);
693 bus->defer_msg.msg = NULL;
694 bus->params.curr_bank = !bus->params.curr_bank;
695 bus->params.next_bank = !bus->params.next_bank;
696 }
697
698 return 0;
699
700error:
701 kfree(wbuf);
702error_1:
703 kfree(wr_msg);
704 bus->defer_msg.msg = NULL;
705 return ret;
706}
707
708/**
709 * sdw_ml_sync_bank_switch: Multilink register bank switch
710 *
711 * @bus: SDW bus instance
712 * @multi_link: whether this is a multi-link stream with hardware-based sync
713 *
714 * Caller function should free the buffers on error
715 */
716static int sdw_ml_sync_bank_switch(struct sdw_bus *bus, bool multi_link)
717{
718 unsigned long time_left;
719
720 if (!multi_link)
721 return 0;
722
723 /* Wait for completion of transfer */
724 time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
725 bus->bank_switch_timeout);
726
727 if (!time_left) {
728 dev_err(bus->dev, "Controller Timed out on bank switch\n");
729 return -ETIMEDOUT;
730 }
731
732 bus->params.curr_bank = !bus->params.curr_bank;
733 bus->params.next_bank = !bus->params.next_bank;
734
735 if (bus->defer_msg.msg) {
736 kfree(bus->defer_msg.msg->buf);
737 kfree(bus->defer_msg.msg);
738 }
739
740 return 0;
741}
742
743static int do_bank_switch(struct sdw_stream_runtime *stream)
744{
745 struct sdw_master_runtime *m_rt;
746 const struct sdw_master_ops *ops;
747 struct sdw_bus *bus;
748 bool multi_link = false;
749 int ret = 0;
750
751 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
752 bus = m_rt->bus;
753 ops = bus->ops;
754
755 if (bus->multi_link) {
756 multi_link = true;
757 mutex_lock(&bus->msg_lock);
758 }
759
760 /* Pre-bank switch */
761 if (ops->pre_bank_switch) {
762 ret = ops->pre_bank_switch(bus);
763 if (ret < 0) {
764 dev_err(bus->dev,
765 "Pre bank switch op failed: %d\n", ret);
766 goto msg_unlock;
767 }
768 }
769
770 /*
771 * Perform Bank switch operation.
772 * For multi link cases, the actual bank switch is
773 * synchronized across all Masters and happens later as a
774 * part of post_bank_switch ops.
775 */
776 ret = sdw_bank_switch(bus, stream->m_rt_count);
777 if (ret < 0) {
778 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
779 goto error;
780 }
781 }
782
783 /*
784 * For multi link cases, it is expected that the bank switch is
785 * triggered by the post_bank_switch for the first Master in the list
786 * and for the other Masters the post_bank_switch() should return doing
787 * nothing.
788 */
789 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
790 bus = m_rt->bus;
791 ops = bus->ops;
792
793 /* Post-bank switch */
794 if (ops->post_bank_switch) {
795 ret = ops->post_bank_switch(bus);
796 if (ret < 0) {
797 dev_err(bus->dev,
798 "Post bank switch op failed: %d\n",
799 ret);
800 goto error;
801 }
802 } else if (bus->multi_link && stream->m_rt_count > 1) {
803 dev_err(bus->dev,
804 "Post bank switch ops not implemented\n");
805 goto error;
806 }
807
808 /* Set the bank switch timeout to default, if not set */
809 if (!bus->bank_switch_timeout)
810 bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
811
812 /* Check if bank switch was successful */
813 ret = sdw_ml_sync_bank_switch(bus, multi_link);
814 if (ret < 0) {
815 dev_err(bus->dev,
816 "multi link bank switch failed: %d\n", ret);
817 goto error;
818 }
819
820 if (bus->multi_link)
821 mutex_unlock(&bus->msg_lock);
822 }
823
824 return ret;
825
826error:
827 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
828 bus = m_rt->bus;
829 if (bus->defer_msg.msg) {
830 kfree(bus->defer_msg.msg->buf);
831 kfree(bus->defer_msg.msg);
832 }
833 }
834
835msg_unlock:
836
837 if (multi_link) {
838 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
839 bus = m_rt->bus;
840 if (mutex_is_locked(&bus->msg_lock))
841 mutex_unlock(&bus->msg_lock);
842 }
843 }
844
845 return ret;
846}
847
848/**
849 * sdw_release_stream() - Free the assigned stream runtime
850 *
851 * @stream: SoundWire stream runtime
852 *
853 * sdw_release_stream should be called only once per stream
854 */
855void sdw_release_stream(struct sdw_stream_runtime *stream)
856{
857 kfree(stream);
858}
859EXPORT_SYMBOL(sdw_release_stream);
860
861/**
862 * sdw_alloc_stream() - Allocate and return stream runtime
863 *
864 * @stream_name: SoundWire stream name
865 *
866 * Allocates a SoundWire stream runtime instance.
867 * sdw_alloc_stream should be called only once per stream. Typically
868 * invoked from ALSA/ASoC machine/platform driver.
869 */
870struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
871{
872 struct sdw_stream_runtime *stream;
873
874 stream = kzalloc(sizeof(*stream), GFP_KERNEL);
875 if (!stream)
876 return NULL;
877
878 stream->name = stream_name;
879 INIT_LIST_HEAD(&stream->master_list);
880 stream->state = SDW_STREAM_ALLOCATED;
881 stream->m_rt_count = 0;
882
883 return stream;
884}
885EXPORT_SYMBOL(sdw_alloc_stream);
886
887static struct sdw_master_runtime
888*sdw_find_master_rt(struct sdw_bus *bus,
889 struct sdw_stream_runtime *stream)
890{
891 struct sdw_master_runtime *m_rt;
892
893 /* Retrieve Bus handle if already available */
894 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
895 if (m_rt->bus == bus)
896 return m_rt;
897 }
898
899 return NULL;
900}
901
902/**
903 * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
904 *
905 * @bus: SDW bus instance
906 * @stream_config: Stream configuration
907 * @stream: Stream runtime handle.
908 *
909 * This function is to be called with bus_lock held.
910 */
911static struct sdw_master_runtime
912*sdw_alloc_master_rt(struct sdw_bus *bus,
913 struct sdw_stream_config *stream_config,
914 struct sdw_stream_runtime *stream)
915{
916 struct sdw_master_runtime *m_rt;
917
918 /*
919 * check if Master is already allocated (as a result of Slave adding
920 * it first), if so skip allocation and go to configure
921 */
922 m_rt = sdw_find_master_rt(bus, stream);
923 if (m_rt)
924 goto stream_config;
925
926 m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
927 if (!m_rt)
928 return NULL;
929
930 /* Initialization of Master runtime handle */
931 INIT_LIST_HEAD(&m_rt->port_list);
932 INIT_LIST_HEAD(&m_rt->slave_rt_list);
933 list_add_tail(&m_rt->stream_node, &stream->master_list);
934
935 list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
936
937stream_config:
938 m_rt->ch_count = stream_config->ch_count;
939 m_rt->bus = bus;
940 m_rt->stream = stream;
941 m_rt->direction = stream_config->direction;
942
943 return m_rt;
944}
945
946/**
947 * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
948 *
949 * @slave: Slave handle
950 * @stream_config: Stream configuration
951 * @stream: Stream runtime handle
952 *
953 * This function is to be called with bus_lock held.
954 */
955static struct sdw_slave_runtime
956*sdw_alloc_slave_rt(struct sdw_slave *slave,
957 struct sdw_stream_config *stream_config,
958 struct sdw_stream_runtime *stream)
959{
960 struct sdw_slave_runtime *s_rt;
961
962 s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
963 if (!s_rt)
964 return NULL;
965
966 INIT_LIST_HEAD(&s_rt->port_list);
967 s_rt->ch_count = stream_config->ch_count;
968 s_rt->direction = stream_config->direction;
969 s_rt->slave = slave;
970
971 return s_rt;
972}
973
974static void sdw_master_port_release(struct sdw_bus *bus,
975 struct sdw_master_runtime *m_rt)
976{
977 struct sdw_port_runtime *p_rt, *_p_rt;
978
979 list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
980 list_del(&p_rt->port_node);
981 kfree(p_rt);
982 }
983}
984
985static void sdw_slave_port_release(struct sdw_bus *bus,
986 struct sdw_slave *slave,
987 struct sdw_stream_runtime *stream)
988{
989 struct sdw_port_runtime *p_rt, *_p_rt;
990 struct sdw_master_runtime *m_rt;
991 struct sdw_slave_runtime *s_rt;
992
993 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
994 list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
995 if (s_rt->slave != slave)
996 continue;
997
998 list_for_each_entry_safe(p_rt, _p_rt,
999 &s_rt->port_list, port_node) {
1000 list_del(&p_rt->port_node);
1001 kfree(p_rt);
1002 }
1003 }
1004 }
1005}
1006
1007/**
1008 * sdw_release_slave_stream() - Free Slave(s) runtime handle
1009 *
1010 * @slave: Slave handle.
1011 * @stream: Stream runtime handle.
1012 *
1013 * This function is to be called with bus_lock held.
1014 */
1015static void sdw_release_slave_stream(struct sdw_slave *slave,
1016 struct sdw_stream_runtime *stream)
1017{
1018 struct sdw_slave_runtime *s_rt, *_s_rt;
1019 struct sdw_master_runtime *m_rt;
1020
1021 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1022 /* Retrieve Slave runtime handle */
1023 list_for_each_entry_safe(s_rt, _s_rt,
1024 &m_rt->slave_rt_list, m_rt_node) {
1025 if (s_rt->slave == slave) {
1026 list_del(&s_rt->m_rt_node);
1027 kfree(s_rt);
1028 return;
1029 }
1030 }
1031 }
1032}
1033
1034/**
1035 * sdw_release_master_stream() - Free Master runtime handle
1036 *
1037 * @m_rt: Master runtime node
1038 * @stream: Stream runtime handle.
1039 *
1040 * This function is to be called with bus_lock held
1041 * It frees the Master runtime handle and associated Slave(s) runtime
1042 * handle. If this is called first then sdw_release_slave_stream() will have
1043 * no effect as Slave(s) runtime handle would already be freed up.
1044 */
1045static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
1046 struct sdw_stream_runtime *stream)
1047{
1048 struct sdw_slave_runtime *s_rt, *_s_rt;
1049
1050 list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
1051 sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
1052 sdw_release_slave_stream(s_rt->slave, stream);
1053 }
1054
1055 list_del(&m_rt->stream_node);
1056 list_del(&m_rt->bus_node);
1057 kfree(m_rt);
1058}
1059
1060/**
1061 * sdw_stream_remove_master() - Remove master from sdw_stream
1062 *
1063 * @bus: SDW Bus instance
1064 * @stream: SoundWire stream
1065 *
1066 * This removes and frees port_rt and master_rt from a stream
1067 */
1068int sdw_stream_remove_master(struct sdw_bus *bus,
1069 struct sdw_stream_runtime *stream)
1070{
1071 struct sdw_master_runtime *m_rt, *_m_rt;
1072
1073 mutex_lock(&bus->bus_lock);
1074
1075 list_for_each_entry_safe(m_rt, _m_rt,
1076 &stream->master_list, stream_node) {
1077 if (m_rt->bus != bus)
1078 continue;
1079
1080 sdw_master_port_release(bus, m_rt);
1081 sdw_release_master_stream(m_rt, stream);
1082 stream->m_rt_count--;
1083 }
1084
1085 if (list_empty(&stream->master_list))
1086 stream->state = SDW_STREAM_RELEASED;
1087
1088 mutex_unlock(&bus->bus_lock);
1089
1090 return 0;
1091}
1092EXPORT_SYMBOL(sdw_stream_remove_master);
1093
1094/**
1095 * sdw_stream_remove_slave() - Remove slave from sdw_stream
1096 *
1097 * @slave: SDW Slave instance
1098 * @stream: SoundWire stream
1099 *
1100 * This removes and frees port_rt and slave_rt from a stream
1101 */
1102int sdw_stream_remove_slave(struct sdw_slave *slave,
1103 struct sdw_stream_runtime *stream)
1104{
1105 mutex_lock(&slave->bus->bus_lock);
1106
1107 sdw_slave_port_release(slave->bus, slave, stream);
1108 sdw_release_slave_stream(slave, stream);
1109
1110 mutex_unlock(&slave->bus->bus_lock);
1111
1112 return 0;
1113}
1114EXPORT_SYMBOL(sdw_stream_remove_slave);
1115
1116/**
1117 * sdw_config_stream() - Configure the allocated stream
1118 *
1119 * @dev: SDW device
1120 * @stream: SoundWire stream
1121 * @stream_config: Stream configuration for audio stream
1122 * @is_slave: is API called from Slave or Master
1123 *
1124 * This function is to be called with bus_lock held.
1125 */
1126static int sdw_config_stream(struct device *dev,
1127 struct sdw_stream_runtime *stream,
1128 struct sdw_stream_config *stream_config,
1129 bool is_slave)
1130{
1131 /*
1132 * Update the stream rate, channel and bps based on data
1133 * source. For more than one data source (multilink),
1134 * match the rate, bps, stream type and increment number of channels.
1135 *
1136 * If rate/bps is zero, it means the values are not set, so skip
1137 * comparison and allow the value to be set and stored in stream
1138 */
1139 if (stream->params.rate &&
1140 stream->params.rate != stream_config->frame_rate) {
1141 dev_err(dev, "rate not matching, stream:%s\n", stream->name);
1142 return -EINVAL;
1143 }
1144
1145 if (stream->params.bps &&
1146 stream->params.bps != stream_config->bps) {
1147 dev_err(dev, "bps not matching, stream:%s\n", stream->name);
1148 return -EINVAL;
1149 }
1150
1151 stream->type = stream_config->type;
1152 stream->params.rate = stream_config->frame_rate;
1153 stream->params.bps = stream_config->bps;
1154
1155 /* TODO: Update this check during Device-device support */
1156 if (is_slave)
1157 stream->params.ch_count += stream_config->ch_count;
1158
1159 return 0;
1160}
1161
1162static int sdw_is_valid_port_range(struct device *dev,
1163 struct sdw_port_runtime *p_rt)
1164{
1165 if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1166 dev_err(dev,
1167 "SoundWire: Invalid port number :%d\n", p_rt->num);
1168 return -EINVAL;
1169 }
1170
1171 return 0;
1172}
1173
1174static struct sdw_port_runtime
1175*sdw_port_alloc(struct device *dev,
1176 struct sdw_port_config *port_config,
1177 int port_index)
1178{
1179 struct sdw_port_runtime *p_rt;
1180
1181 p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1182 if (!p_rt)
1183 return NULL;
1184
1185 p_rt->ch_mask = port_config[port_index].ch_mask;
1186 p_rt->num = port_config[port_index].num;
1187
1188 return p_rt;
1189}
1190
1191static int sdw_master_port_config(struct sdw_bus *bus,
1192 struct sdw_master_runtime *m_rt,
1193 struct sdw_port_config *port_config,
1194 unsigned int num_ports)
1195{
1196 struct sdw_port_runtime *p_rt;
1197 int i;
1198
1199 /* Iterate for number of ports to perform initialization */
1200 for (i = 0; i < num_ports; i++) {
1201 p_rt = sdw_port_alloc(bus->dev, port_config, i);
1202 if (!p_rt)
1203 return -ENOMEM;
1204
1205 /*
1206 * TODO: Check port capabilities for requested
1207 * configuration (audio mode support)
1208 */
1209
1210 list_add_tail(&p_rt->port_node, &m_rt->port_list);
1211 }
1212
1213 return 0;
1214}
1215
1216static int sdw_slave_port_config(struct sdw_slave *slave,
1217 struct sdw_slave_runtime *s_rt,
1218 struct sdw_port_config *port_config,
1219 unsigned int num_config)
1220{
1221 struct sdw_port_runtime *p_rt;
1222 int i, ret;
1223
1224 /* Iterate for number of ports to perform initialization */
1225 for (i = 0; i < num_config; i++) {
1226 p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1227 if (!p_rt)
1228 return -ENOMEM;
1229
1230 /*
1231 * TODO: Check valid port range as defined by DisCo/
1232 * slave
1233 */
1234 ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1235 if (ret < 0) {
1236 kfree(p_rt);
1237 return ret;
1238 }
1239
1240 /*
1241 * TODO: Check port capabilities for requested
1242 * configuration (audio mode support)
1243 */
1244
1245 list_add_tail(&p_rt->port_node, &s_rt->port_list);
1246 }
1247
1248 return 0;
1249}
1250
1251/**
1252 * sdw_stream_add_master() - Allocate and add master runtime to a stream
1253 *
1254 * @bus: SDW Bus instance
1255 * @stream_config: Stream configuration for audio stream
1256 * @port_config: Port configuration for audio stream
1257 * @num_ports: Number of ports
1258 * @stream: SoundWire stream
1259 */
1260int sdw_stream_add_master(struct sdw_bus *bus,
1261 struct sdw_stream_config *stream_config,
1262 struct sdw_port_config *port_config,
1263 unsigned int num_ports,
1264 struct sdw_stream_runtime *stream)
1265{
1266 struct sdw_master_runtime *m_rt;
1267 int ret;
1268
1269 mutex_lock(&bus->bus_lock);
1270
1271 /*
1272 * For multi link streams, add the second master only if
1273 * the bus supports it.
1274 * Check if bus->multi_link is set
1275 */
1276 if (!bus->multi_link && stream->m_rt_count > 0) {
1277 dev_err(bus->dev,
1278 "Multilink not supported, link %d\n", bus->link_id);
1279 ret = -EINVAL;
1280 goto unlock;
1281 }
1282
1283 m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
1284 if (!m_rt) {
1285 dev_err(bus->dev,
1286 "Master runtime config failed for stream:%s\n",
1287 stream->name);
1288 ret = -ENOMEM;
1289 goto unlock;
1290 }
1291
1292 ret = sdw_config_stream(bus->dev, stream, stream_config, false);
1293 if (ret)
1294 goto stream_error;
1295
1296 ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1297 if (ret)
1298 goto stream_error;
1299
1300 stream->m_rt_count++;
1301
1302 goto unlock;
1303
1304stream_error:
1305 sdw_release_master_stream(m_rt, stream);
1306unlock:
1307 mutex_unlock(&bus->bus_lock);
1308 return ret;
1309}
1310EXPORT_SYMBOL(sdw_stream_add_master);
1311
1312/**
1313 * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
1314 *
1315 * @slave: SDW Slave instance
1316 * @stream_config: Stream configuration for audio stream
1317 * @stream: SoundWire stream
1318 * @port_config: Port configuration for audio stream
1319 * @num_ports: Number of ports
1320 *
1321 * It is expected that Slave is added before adding Master
1322 * to the Stream.
1323 *
1324 */
1325int sdw_stream_add_slave(struct sdw_slave *slave,
1326 struct sdw_stream_config *stream_config,
1327 struct sdw_port_config *port_config,
1328 unsigned int num_ports,
1329 struct sdw_stream_runtime *stream)
1330{
1331 struct sdw_slave_runtime *s_rt;
1332 struct sdw_master_runtime *m_rt;
1333 int ret;
1334
1335 mutex_lock(&slave->bus->bus_lock);
1336
1337 /*
1338 * If this API is invoked by Slave first then m_rt is not valid.
1339 * So, allocate m_rt and add Slave to it.
1340 */
1341 m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
1342 if (!m_rt) {
1343 dev_err(&slave->dev,
1344 "alloc master runtime failed for stream:%s\n",
1345 stream->name);
1346 ret = -ENOMEM;
1347 goto error;
1348 }
1349
1350 s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
1351 if (!s_rt) {
1352 dev_err(&slave->dev,
1353 "Slave runtime config failed for stream:%s\n",
1354 stream->name);
1355 ret = -ENOMEM;
1356 goto stream_error;
1357 }
1358
1359 ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
1360 if (ret) {
1361 /*
1362 * sdw_release_master_stream will release s_rt in slave_rt_list in
1363 * stream_error case, but s_rt is only added to slave_rt_list
1364 * when sdw_config_stream is successful, so free s_rt explicitly
1365 * when sdw_config_stream is failed.
1366 */
1367 kfree(s_rt);
1368 goto stream_error;
1369 }
1370
1371 list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
1372
1373 ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1374 if (ret)
1375 goto stream_error;
1376
1377 /*
1378 * Change stream state to CONFIGURED on first Slave add.
1379 * Bus is not aware of number of Slave(s) in a stream at this
1380 * point so cannot depend on all Slave(s) to be added in order to
1381 * change stream state to CONFIGURED.
1382 */
1383 stream->state = SDW_STREAM_CONFIGURED;
1384 goto error;
1385
1386stream_error:
1387 /*
1388 * we hit error so cleanup the stream, release all Slave(s) and
1389 * Master runtime
1390 */
1391 sdw_release_master_stream(m_rt, stream);
1392error:
1393 mutex_unlock(&slave->bus->bus_lock);
1394 return ret;
1395}
1396EXPORT_SYMBOL(sdw_stream_add_slave);
1397
1398/**
1399 * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1400 *
1401 * @slave: Slave handle
1402 * @direction: Data direction.
1403 * @port_num: Port number
1404 */
1405struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
1406 enum sdw_data_direction direction,
1407 unsigned int port_num)
1408{
1409 struct sdw_dpn_prop *dpn_prop;
1410 u8 num_ports;
1411 int i;
1412
1413 if (direction == SDW_DATA_DIR_TX) {
1414 num_ports = hweight32(slave->prop.source_ports);
1415 dpn_prop = slave->prop.src_dpn_prop;
1416 } else {
1417 num_ports = hweight32(slave->prop.sink_ports);
1418 dpn_prop = slave->prop.sink_dpn_prop;
1419 }
1420
1421 for (i = 0; i < num_ports; i++) {
1422 if (dpn_prop[i].num == port_num)
1423 return &dpn_prop[i];
1424 }
1425
1426 return NULL;
1427}
1428
1429/**
1430 * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
1431 *
1432 * @stream: SoundWire stream
1433 *
1434 * Acquire bus_lock for each of the master runtime(m_rt) part of this
1435 * stream to reconfigure the bus.
1436 * NOTE: This function is called from SoundWire stream ops and is
1437 * expected that a global lock is held before acquiring bus_lock.
1438 */
1439static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
1440{
1441 struct sdw_master_runtime *m_rt;
1442 struct sdw_bus *bus = NULL;
1443
1444 /* Iterate for all Master(s) in Master list */
1445 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1446 bus = m_rt->bus;
1447
1448 mutex_lock(&bus->bus_lock);
1449 }
1450}
1451
1452/**
1453 * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
1454 *
1455 * @stream: SoundWire stream
1456 *
1457 * Release the previously held bus_lock after reconfiguring the bus.
1458 * NOTE: This function is called from SoundWire stream ops and is
1459 * expected that a global lock is held before releasing bus_lock.
1460 */
1461static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
1462{
1463 struct sdw_master_runtime *m_rt = NULL;
1464 struct sdw_bus *bus = NULL;
1465
1466 /* Iterate for all Master(s) in Master list */
1467 list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
1468 bus = m_rt->bus;
1469 mutex_unlock(&bus->bus_lock);
1470 }
1471}
1472
1473static int _sdw_prepare_stream(struct sdw_stream_runtime *stream)
1474{
1475 struct sdw_master_runtime *m_rt;
1476 struct sdw_bus *bus = NULL;
1477 struct sdw_master_prop *prop;
1478 struct sdw_bus_params params;
1479 int ret;
1480
1481 /* Prepare Master(s) and Slave(s) port(s) associated with stream */
1482 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1483 bus = m_rt->bus;
1484 prop = &bus->prop;
1485 memcpy(&params, &bus->params, sizeof(params));
1486
1487 /* TODO: Support Asynchronous mode */
1488 if ((prop->max_clk_freq % stream->params.rate) != 0) {
1489 dev_err(bus->dev, "Async mode not supported\n");
1490 return -EINVAL;
1491 }
1492
1493 /* Increment cumulative bus bandwidth */
1494 /* TODO: Update this during Device-Device support */
1495 bus->params.bandwidth += m_rt->stream->params.rate *
1496 m_rt->ch_count * m_rt->stream->params.bps;
1497
1498 /* Compute params */
1499 if (bus->compute_params) {
1500 ret = bus->compute_params(bus);
1501 if (ret < 0) {
1502 dev_err(bus->dev, "Compute params failed: %d",
1503 ret);
1504 return ret;
1505 }
1506 }
1507
1508 /* Program params */
1509 ret = sdw_program_params(bus);
1510 if (ret < 0) {
1511 dev_err(bus->dev, "Program params failed: %d\n", ret);
1512 goto restore_params;
1513 }
1514 }
1515
1516 if (!bus) {
1517 pr_err("Configuration error in %s\n", __func__);
1518 return -EINVAL;
1519 }
1520
1521 ret = do_bank_switch(stream);
1522 if (ret < 0) {
1523 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
1524 goto restore_params;
1525 }
1526
1527 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1528 bus = m_rt->bus;
1529
1530 /* Prepare port(s) on the new clock configuration */
1531 ret = sdw_prep_deprep_ports(m_rt, true);
1532 if (ret < 0) {
1533 dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
1534 ret);
1535 return ret;
1536 }
1537 }
1538
1539 stream->state = SDW_STREAM_PREPARED;
1540
1541 return ret;
1542
1543restore_params:
1544 memcpy(&bus->params, &params, sizeof(params));
1545 return ret;
1546}
1547
1548/**
1549 * sdw_prepare_stream() - Prepare SoundWire stream
1550 *
1551 * @stream: Soundwire stream
1552 *
1553 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1554 */
1555int sdw_prepare_stream(struct sdw_stream_runtime *stream)
1556{
1557 int ret = 0;
1558
1559 if (!stream) {
1560 pr_err("SoundWire: Handle not found for stream\n");
1561 return -EINVAL;
1562 }
1563
1564 sdw_acquire_bus_lock(stream);
1565
1566 ret = _sdw_prepare_stream(stream);
1567 if (ret < 0)
1568 pr_err("Prepare for stream:%s failed: %d\n", stream->name, ret);
1569
1570 sdw_release_bus_lock(stream);
1571 return ret;
1572}
1573EXPORT_SYMBOL(sdw_prepare_stream);
1574
1575static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
1576{
1577 struct sdw_master_runtime *m_rt;
1578 struct sdw_bus *bus = NULL;
1579 int ret;
1580
1581 /* Enable Master(s) and Slave(s) port(s) associated with stream */
1582 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1583 bus = m_rt->bus;
1584
1585 /* Program params */
1586 ret = sdw_program_params(bus);
1587 if (ret < 0) {
1588 dev_err(bus->dev, "Program params failed: %d\n", ret);
1589 return ret;
1590 }
1591
1592 /* Enable port(s) */
1593 ret = sdw_enable_disable_ports(m_rt, true);
1594 if (ret < 0) {
1595 dev_err(bus->dev,
1596 "Enable port(s) failed ret: %d\n", ret);
1597 return ret;
1598 }
1599 }
1600
1601 if (!bus) {
1602 pr_err("Configuration error in %s\n", __func__);
1603 return -EINVAL;
1604 }
1605
1606 ret = do_bank_switch(stream);
1607 if (ret < 0) {
1608 dev_err(bus->dev, "Bank switch failed: %d\n", ret);
1609 return ret;
1610 }
1611
1612 stream->state = SDW_STREAM_ENABLED;
1613 return 0;
1614}
1615
1616/**
1617 * sdw_enable_stream() - Enable SoundWire stream
1618 *
1619 * @stream: Soundwire stream
1620 *
1621 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1622 */
1623int sdw_enable_stream(struct sdw_stream_runtime *stream)
1624{
1625 int ret;
1626
1627 if (!stream) {
1628 pr_err("SoundWire: Handle not found for stream\n");
1629 return -EINVAL;
1630 }
1631
1632 sdw_acquire_bus_lock(stream);
1633
1634 ret = _sdw_enable_stream(stream);
1635 if (ret < 0)
1636 pr_err("Enable for stream:%s failed: %d\n", stream->name, ret);
1637
1638 sdw_release_bus_lock(stream);
1639 return ret;
1640}
1641EXPORT_SYMBOL(sdw_enable_stream);
1642
1643static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
1644{
1645 struct sdw_master_runtime *m_rt;
1646 int ret;
1647
1648 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1649 struct sdw_bus *bus = m_rt->bus;
1650
1651 /* Disable port(s) */
1652 ret = sdw_enable_disable_ports(m_rt, false);
1653 if (ret < 0) {
1654 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1655 return ret;
1656 }
1657 }
1658 stream->state = SDW_STREAM_DISABLED;
1659
1660 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1661 struct sdw_bus *bus = m_rt->bus;
1662
1663 /* Program params */
1664 ret = sdw_program_params(bus);
1665 if (ret < 0) {
1666 dev_err(bus->dev, "Program params failed: %d\n", ret);
1667 return ret;
1668 }
1669 }
1670
1671 ret = do_bank_switch(stream);
1672 if (ret < 0) {
1673 pr_err("Bank switch failed: %d\n", ret);
1674 return ret;
1675 }
1676
1677 /* make sure alternate bank (previous current) is also disabled */
1678 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1679 struct sdw_bus *bus = m_rt->bus;
1680
1681 /* Disable port(s) */
1682 ret = sdw_enable_disable_ports(m_rt, false);
1683 if (ret < 0) {
1684 dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1685 return ret;
1686 }
1687 }
1688
1689 return 0;
1690}
1691
1692/**
1693 * sdw_disable_stream() - Disable SoundWire stream
1694 *
1695 * @stream: Soundwire stream
1696 *
1697 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1698 */
1699int sdw_disable_stream(struct sdw_stream_runtime *stream)
1700{
1701 int ret;
1702
1703 if (!stream) {
1704 pr_err("SoundWire: Handle not found for stream\n");
1705 return -EINVAL;
1706 }
1707
1708 sdw_acquire_bus_lock(stream);
1709
1710 ret = _sdw_disable_stream(stream);
1711 if (ret < 0)
1712 pr_err("Disable for stream:%s failed: %d\n", stream->name, ret);
1713
1714 sdw_release_bus_lock(stream);
1715 return ret;
1716}
1717EXPORT_SYMBOL(sdw_disable_stream);
1718
1719static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1720{
1721 struct sdw_master_runtime *m_rt;
1722 struct sdw_bus *bus;
1723 int ret = 0;
1724
1725 list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1726 bus = m_rt->bus;
1727 /* De-prepare port(s) */
1728 ret = sdw_prep_deprep_ports(m_rt, false);
1729 if (ret < 0) {
1730 dev_err(bus->dev,
1731 "De-prepare port(s) failed: %d\n", ret);
1732 return ret;
1733 }
1734
1735 /* TODO: Update this during Device-Device support */
1736 bus->params.bandwidth -= m_rt->stream->params.rate *
1737 m_rt->ch_count * m_rt->stream->params.bps;
1738
1739 /* Program params */
1740 ret = sdw_program_params(bus);
1741 if (ret < 0) {
1742 dev_err(bus->dev, "Program params failed: %d\n", ret);
1743 return ret;
1744 }
1745 }
1746
1747 stream->state = SDW_STREAM_DEPREPARED;
1748 return do_bank_switch(stream);
1749}
1750
1751/**
1752 * sdw_deprepare_stream() - Deprepare SoundWire stream
1753 *
1754 * @stream: Soundwire stream
1755 *
1756 * Documentation/driver-api/soundwire/stream.rst explains this API in detail
1757 */
1758int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
1759{
1760 int ret;
1761
1762 if (!stream) {
1763 pr_err("SoundWire: Handle not found for stream\n");
1764 return -EINVAL;
1765 }
1766
1767 sdw_acquire_bus_lock(stream);
1768 ret = _sdw_deprepare_stream(stream);
1769 if (ret < 0)
1770 pr_err("De-prepare for stream:%d failed: %d\n", ret, ret);
1771
1772 sdw_release_bus_lock(stream);
1773 return ret;
1774}
1775EXPORT_SYMBOL(sdw_deprepare_stream);