b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * altera_uart.c -- Altera UART driver |
| 4 | * |
| 5 | * Based on mcf.c -- Freescale ColdFire UART driver |
| 6 | * |
| 7 | * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> |
| 8 | * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> |
| 9 | * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/timer.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/console.h> |
| 18 | #include <linux/tty.h> |
| 19 | #include <linux/tty_flip.h> |
| 20 | #include <linux/serial.h> |
| 21 | #include <linux/serial_core.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/of.h> |
| 24 | #include <linux/io.h> |
| 25 | #include <linux/altera_uart.h> |
| 26 | |
| 27 | #define DRV_NAME "altera_uart" |
| 28 | #define SERIAL_ALTERA_MAJOR 204 |
| 29 | #define SERIAL_ALTERA_MINOR 213 |
| 30 | |
| 31 | /* |
| 32 | * Altera UART register definitions according to the Nios UART datasheet: |
| 33 | * http://www.altera.com/literature/ds/ds_nios_uart.pdf |
| 34 | */ |
| 35 | |
| 36 | #define ALTERA_UART_SIZE 32 |
| 37 | |
| 38 | #define ALTERA_UART_RXDATA_REG 0 |
| 39 | #define ALTERA_UART_TXDATA_REG 4 |
| 40 | #define ALTERA_UART_STATUS_REG 8 |
| 41 | #define ALTERA_UART_CONTROL_REG 12 |
| 42 | #define ALTERA_UART_DIVISOR_REG 16 |
| 43 | #define ALTERA_UART_EOP_REG 20 |
| 44 | |
| 45 | #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ |
| 46 | #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ |
| 47 | #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ |
| 48 | #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ |
| 49 | #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ |
| 50 | #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ |
| 51 | #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ |
| 52 | #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ |
| 53 | #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ |
| 54 | #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ |
| 55 | #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ |
| 56 | #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ |
| 57 | |
| 58 | /* Enable interrupt on... */ |
| 59 | #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ |
| 60 | #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ |
| 61 | #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ |
| 62 | #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ |
| 63 | #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ |
| 64 | #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ |
| 65 | #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ |
| 66 | #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ |
| 67 | #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ |
| 68 | |
| 69 | #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ |
| 70 | #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ |
| 71 | #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ |
| 72 | #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ |
| 73 | |
| 74 | /* |
| 75 | * Local per-uart structure. |
| 76 | */ |
| 77 | struct altera_uart { |
| 78 | struct uart_port port; |
| 79 | struct timer_list tmr; |
| 80 | unsigned int sigs; /* Local copy of line sigs */ |
| 81 | unsigned short imr; /* Local IMR mirror */ |
| 82 | }; |
| 83 | |
| 84 | static u32 altera_uart_readl(struct uart_port *port, int reg) |
| 85 | { |
| 86 | return readl(port->membase + (reg << port->regshift)); |
| 87 | } |
| 88 | |
| 89 | static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) |
| 90 | { |
| 91 | writel(dat, port->membase + (reg << port->regshift)); |
| 92 | } |
| 93 | |
| 94 | static unsigned int altera_uart_tx_empty(struct uart_port *port) |
| 95 | { |
| 96 | return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 97 | ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; |
| 98 | } |
| 99 | |
| 100 | static unsigned int altera_uart_get_mctrl(struct uart_port *port) |
| 101 | { |
| 102 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 103 | unsigned int sigs; |
| 104 | |
| 105 | sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 106 | ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; |
| 107 | sigs |= (pp->sigs & TIOCM_RTS); |
| 108 | |
| 109 | return sigs; |
| 110 | } |
| 111 | |
| 112 | static void altera_uart_update_ctrl_reg(struct altera_uart *pp) |
| 113 | { |
| 114 | unsigned short imr = pp->imr; |
| 115 | |
| 116 | /* |
| 117 | * If the device doesn't have an irq, ensure that the irq bits are |
| 118 | * masked out to keep the irq line inactive. |
| 119 | */ |
| 120 | if (!pp->port.irq) |
| 121 | imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK; |
| 122 | |
| 123 | altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG); |
| 124 | } |
| 125 | |
| 126 | static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) |
| 127 | { |
| 128 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 129 | |
| 130 | pp->sigs = sigs; |
| 131 | if (sigs & TIOCM_RTS) |
| 132 | pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; |
| 133 | else |
| 134 | pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; |
| 135 | altera_uart_update_ctrl_reg(pp); |
| 136 | } |
| 137 | |
| 138 | static void altera_uart_start_tx(struct uart_port *port) |
| 139 | { |
| 140 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 141 | |
| 142 | pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; |
| 143 | altera_uart_update_ctrl_reg(pp); |
| 144 | } |
| 145 | |
| 146 | static void altera_uart_stop_tx(struct uart_port *port) |
| 147 | { |
| 148 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 149 | |
| 150 | pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; |
| 151 | altera_uart_update_ctrl_reg(pp); |
| 152 | } |
| 153 | |
| 154 | static void altera_uart_stop_rx(struct uart_port *port) |
| 155 | { |
| 156 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 157 | |
| 158 | pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; |
| 159 | altera_uart_update_ctrl_reg(pp); |
| 160 | } |
| 161 | |
| 162 | static void altera_uart_break_ctl(struct uart_port *port, int break_state) |
| 163 | { |
| 164 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 165 | unsigned long flags; |
| 166 | |
| 167 | spin_lock_irqsave(&port->lock, flags); |
| 168 | if (break_state == -1) |
| 169 | pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; |
| 170 | else |
| 171 | pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; |
| 172 | altera_uart_update_ctrl_reg(pp); |
| 173 | spin_unlock_irqrestore(&port->lock, flags); |
| 174 | } |
| 175 | |
| 176 | static void altera_uart_set_termios(struct uart_port *port, |
| 177 | struct ktermios *termios, |
| 178 | struct ktermios *old) |
| 179 | { |
| 180 | unsigned long flags; |
| 181 | unsigned int baud, baudclk; |
| 182 | |
| 183 | baud = uart_get_baud_rate(port, termios, old, 0, 4000000); |
| 184 | baudclk = port->uartclk / baud; |
| 185 | |
| 186 | if (old) |
| 187 | tty_termios_copy_hw(termios, old); |
| 188 | tty_termios_encode_baud_rate(termios, baud, baud); |
| 189 | |
| 190 | spin_lock_irqsave(&port->lock, flags); |
| 191 | uart_update_timeout(port, termios->c_cflag, baud); |
| 192 | altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); |
| 193 | spin_unlock_irqrestore(&port->lock, flags); |
| 194 | |
| 195 | /* |
| 196 | * FIXME: port->read_status_mask and port->ignore_status_mask |
| 197 | * need to be initialized based on termios settings for |
| 198 | * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT |
| 199 | */ |
| 200 | } |
| 201 | |
| 202 | static void altera_uart_rx_chars(struct uart_port *port) |
| 203 | { |
| 204 | unsigned char ch, flag; |
| 205 | unsigned short status; |
| 206 | |
| 207 | while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & |
| 208 | ALTERA_UART_STATUS_RRDY_MSK) { |
| 209 | ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); |
| 210 | flag = TTY_NORMAL; |
| 211 | port->icount.rx++; |
| 212 | |
| 213 | if (status & ALTERA_UART_STATUS_E_MSK) { |
| 214 | altera_uart_writel(port, status, |
| 215 | ALTERA_UART_STATUS_REG); |
| 216 | |
| 217 | if (status & ALTERA_UART_STATUS_BRK_MSK) { |
| 218 | port->icount.brk++; |
| 219 | if (uart_handle_break(port)) |
| 220 | continue; |
| 221 | } else if (status & ALTERA_UART_STATUS_PE_MSK) { |
| 222 | port->icount.parity++; |
| 223 | } else if (status & ALTERA_UART_STATUS_ROE_MSK) { |
| 224 | port->icount.overrun++; |
| 225 | } else if (status & ALTERA_UART_STATUS_FE_MSK) { |
| 226 | port->icount.frame++; |
| 227 | } |
| 228 | |
| 229 | status &= port->read_status_mask; |
| 230 | |
| 231 | if (status & ALTERA_UART_STATUS_BRK_MSK) |
| 232 | flag = TTY_BREAK; |
| 233 | else if (status & ALTERA_UART_STATUS_PE_MSK) |
| 234 | flag = TTY_PARITY; |
| 235 | else if (status & ALTERA_UART_STATUS_FE_MSK) |
| 236 | flag = TTY_FRAME; |
| 237 | } |
| 238 | |
| 239 | if (uart_handle_sysrq_char(port, ch)) |
| 240 | continue; |
| 241 | uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, |
| 242 | flag); |
| 243 | } |
| 244 | |
| 245 | spin_unlock(&port->lock); |
| 246 | tty_flip_buffer_push(&port->state->port); |
| 247 | spin_lock(&port->lock); |
| 248 | } |
| 249 | |
| 250 | static void altera_uart_tx_chars(struct uart_port *port) |
| 251 | { |
| 252 | struct circ_buf *xmit = &port->state->xmit; |
| 253 | |
| 254 | if (port->x_char) { |
| 255 | /* Send special char - probably flow control */ |
| 256 | altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); |
| 257 | port->x_char = 0; |
| 258 | port->icount.tx++; |
| 259 | return; |
| 260 | } |
| 261 | |
| 262 | while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 263 | ALTERA_UART_STATUS_TRDY_MSK) { |
| 264 | if (xmit->head == xmit->tail) |
| 265 | break; |
| 266 | altera_uart_writel(port, xmit->buf[xmit->tail], |
| 267 | ALTERA_UART_TXDATA_REG); |
| 268 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 269 | port->icount.tx++; |
| 270 | } |
| 271 | |
| 272 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 273 | uart_write_wakeup(port); |
| 274 | |
| 275 | if (uart_circ_empty(xmit)) |
| 276 | altera_uart_stop_tx(port); |
| 277 | } |
| 278 | |
| 279 | static irqreturn_t altera_uart_interrupt(int irq, void *data) |
| 280 | { |
| 281 | struct uart_port *port = data; |
| 282 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 283 | unsigned long flags; |
| 284 | unsigned int isr; |
| 285 | |
| 286 | isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; |
| 287 | |
| 288 | spin_lock_irqsave(&port->lock, flags); |
| 289 | if (isr & ALTERA_UART_STATUS_RRDY_MSK) |
| 290 | altera_uart_rx_chars(port); |
| 291 | if (isr & ALTERA_UART_STATUS_TRDY_MSK) |
| 292 | altera_uart_tx_chars(port); |
| 293 | spin_unlock_irqrestore(&port->lock, flags); |
| 294 | |
| 295 | return IRQ_RETVAL(isr); |
| 296 | } |
| 297 | |
| 298 | static void altera_uart_timer(struct timer_list *t) |
| 299 | { |
| 300 | struct altera_uart *pp = from_timer(pp, t, tmr); |
| 301 | struct uart_port *port = &pp->port; |
| 302 | |
| 303 | altera_uart_interrupt(0, port); |
| 304 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); |
| 305 | } |
| 306 | |
| 307 | static void altera_uart_config_port(struct uart_port *port, int flags) |
| 308 | { |
| 309 | port->type = PORT_ALTERA_UART; |
| 310 | |
| 311 | /* Clear mask, so no surprise interrupts. */ |
| 312 | altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); |
| 313 | /* Clear status register */ |
| 314 | altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); |
| 315 | } |
| 316 | |
| 317 | static int altera_uart_startup(struct uart_port *port) |
| 318 | { |
| 319 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 320 | unsigned long flags; |
| 321 | |
| 322 | if (!port->irq) { |
| 323 | timer_setup(&pp->tmr, altera_uart_timer, 0); |
| 324 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); |
| 325 | } else { |
| 326 | int ret; |
| 327 | |
| 328 | ret = request_irq(port->irq, altera_uart_interrupt, 0, |
| 329 | DRV_NAME, port); |
| 330 | if (ret) { |
| 331 | pr_err(DRV_NAME ": unable to attach Altera UART %d " |
| 332 | "interrupt vector=%d\n", port->line, port->irq); |
| 333 | return ret; |
| 334 | } |
| 335 | } |
| 336 | |
| 337 | spin_lock_irqsave(&port->lock, flags); |
| 338 | |
| 339 | /* Enable RX interrupts now */ |
| 340 | pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; |
| 341 | altera_uart_update_ctrl_reg(pp); |
| 342 | |
| 343 | spin_unlock_irqrestore(&port->lock, flags); |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
| 348 | static void altera_uart_shutdown(struct uart_port *port) |
| 349 | { |
| 350 | struct altera_uart *pp = container_of(port, struct altera_uart, port); |
| 351 | unsigned long flags; |
| 352 | |
| 353 | spin_lock_irqsave(&port->lock, flags); |
| 354 | |
| 355 | /* Disable all interrupts now */ |
| 356 | pp->imr = 0; |
| 357 | altera_uart_update_ctrl_reg(pp); |
| 358 | |
| 359 | spin_unlock_irqrestore(&port->lock, flags); |
| 360 | |
| 361 | if (port->irq) |
| 362 | free_irq(port->irq, port); |
| 363 | else |
| 364 | del_timer_sync(&pp->tmr); |
| 365 | } |
| 366 | |
| 367 | static const char *altera_uart_type(struct uart_port *port) |
| 368 | { |
| 369 | return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; |
| 370 | } |
| 371 | |
| 372 | static int altera_uart_request_port(struct uart_port *port) |
| 373 | { |
| 374 | /* UARTs always present */ |
| 375 | return 0; |
| 376 | } |
| 377 | |
| 378 | static void altera_uart_release_port(struct uart_port *port) |
| 379 | { |
| 380 | /* Nothing to release... */ |
| 381 | } |
| 382 | |
| 383 | static int altera_uart_verify_port(struct uart_port *port, |
| 384 | struct serial_struct *ser) |
| 385 | { |
| 386 | if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) |
| 387 | return -EINVAL; |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | #ifdef CONFIG_CONSOLE_POLL |
| 392 | static int altera_uart_poll_get_char(struct uart_port *port) |
| 393 | { |
| 394 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 395 | ALTERA_UART_STATUS_RRDY_MSK)) |
| 396 | cpu_relax(); |
| 397 | |
| 398 | return altera_uart_readl(port, ALTERA_UART_RXDATA_REG); |
| 399 | } |
| 400 | |
| 401 | static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c) |
| 402 | { |
| 403 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 404 | ALTERA_UART_STATUS_TRDY_MSK)) |
| 405 | cpu_relax(); |
| 406 | |
| 407 | altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); |
| 408 | } |
| 409 | #endif |
| 410 | |
| 411 | /* |
| 412 | * Define the basic serial functions we support. |
| 413 | */ |
| 414 | static const struct uart_ops altera_uart_ops = { |
| 415 | .tx_empty = altera_uart_tx_empty, |
| 416 | .get_mctrl = altera_uart_get_mctrl, |
| 417 | .set_mctrl = altera_uart_set_mctrl, |
| 418 | .start_tx = altera_uart_start_tx, |
| 419 | .stop_tx = altera_uart_stop_tx, |
| 420 | .stop_rx = altera_uart_stop_rx, |
| 421 | .break_ctl = altera_uart_break_ctl, |
| 422 | .startup = altera_uart_startup, |
| 423 | .shutdown = altera_uart_shutdown, |
| 424 | .set_termios = altera_uart_set_termios, |
| 425 | .type = altera_uart_type, |
| 426 | .request_port = altera_uart_request_port, |
| 427 | .release_port = altera_uart_release_port, |
| 428 | .config_port = altera_uart_config_port, |
| 429 | .verify_port = altera_uart_verify_port, |
| 430 | #ifdef CONFIG_CONSOLE_POLL |
| 431 | .poll_get_char = altera_uart_poll_get_char, |
| 432 | .poll_put_char = altera_uart_poll_put_char, |
| 433 | #endif |
| 434 | }; |
| 435 | |
| 436 | static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; |
| 437 | |
| 438 | #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) |
| 439 | |
| 440 | static void altera_uart_console_putc(struct uart_port *port, int c) |
| 441 | { |
| 442 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
| 443 | ALTERA_UART_STATUS_TRDY_MSK)) |
| 444 | cpu_relax(); |
| 445 | |
| 446 | altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); |
| 447 | } |
| 448 | |
| 449 | static void altera_uart_console_write(struct console *co, const char *s, |
| 450 | unsigned int count) |
| 451 | { |
| 452 | struct uart_port *port = &(altera_uart_ports + co->index)->port; |
| 453 | |
| 454 | uart_console_write(port, s, count, altera_uart_console_putc); |
| 455 | } |
| 456 | |
| 457 | static int __init altera_uart_console_setup(struct console *co, char *options) |
| 458 | { |
| 459 | struct uart_port *port; |
| 460 | int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; |
| 461 | int bits = 8; |
| 462 | int parity = 'n'; |
| 463 | int flow = 'n'; |
| 464 | |
| 465 | if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) |
| 466 | return -EINVAL; |
| 467 | port = &altera_uart_ports[co->index].port; |
| 468 | if (!port->membase) |
| 469 | return -ENODEV; |
| 470 | |
| 471 | if (options) |
| 472 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 473 | |
| 474 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 475 | } |
| 476 | |
| 477 | static struct uart_driver altera_uart_driver; |
| 478 | |
| 479 | static struct console altera_uart_console = { |
| 480 | .name = "ttyAL", |
| 481 | .write = altera_uart_console_write, |
| 482 | .device = uart_console_device, |
| 483 | .setup = altera_uart_console_setup, |
| 484 | .flags = CON_PRINTBUFFER, |
| 485 | .index = -1, |
| 486 | .data = &altera_uart_driver, |
| 487 | }; |
| 488 | |
| 489 | static int __init altera_uart_console_init(void) |
| 490 | { |
| 491 | register_console(&altera_uart_console); |
| 492 | return 0; |
| 493 | } |
| 494 | |
| 495 | console_initcall(altera_uart_console_init); |
| 496 | |
| 497 | #define ALTERA_UART_CONSOLE (&altera_uart_console) |
| 498 | |
| 499 | static void altera_uart_earlycon_write(struct console *co, const char *s, |
| 500 | unsigned int count) |
| 501 | { |
| 502 | struct earlycon_device *dev = co->data; |
| 503 | |
| 504 | uart_console_write(&dev->port, s, count, altera_uart_console_putc); |
| 505 | } |
| 506 | |
| 507 | static int __init altera_uart_earlycon_setup(struct earlycon_device *dev, |
| 508 | const char *options) |
| 509 | { |
| 510 | struct uart_port *port = &dev->port; |
| 511 | |
| 512 | if (!port->membase) |
| 513 | return -ENODEV; |
| 514 | |
| 515 | /* Enable RX interrupts now */ |
| 516 | altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK, |
| 517 | ALTERA_UART_CONTROL_REG); |
| 518 | |
| 519 | if (dev->baud) { |
| 520 | unsigned int baudclk = port->uartclk / dev->baud; |
| 521 | |
| 522 | altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); |
| 523 | } |
| 524 | |
| 525 | dev->con->write = altera_uart_earlycon_write; |
| 526 | return 0; |
| 527 | } |
| 528 | |
| 529 | OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup); |
| 530 | |
| 531 | #else |
| 532 | |
| 533 | #define ALTERA_UART_CONSOLE NULL |
| 534 | |
| 535 | #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */ |
| 536 | |
| 537 | /* |
| 538 | * Define the altera_uart UART driver structure. |
| 539 | */ |
| 540 | static struct uart_driver altera_uart_driver = { |
| 541 | .owner = THIS_MODULE, |
| 542 | .driver_name = DRV_NAME, |
| 543 | .dev_name = "ttyAL", |
| 544 | .major = SERIAL_ALTERA_MAJOR, |
| 545 | .minor = SERIAL_ALTERA_MINOR, |
| 546 | .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, |
| 547 | .cons = ALTERA_UART_CONSOLE, |
| 548 | }; |
| 549 | |
| 550 | static int altera_uart_probe(struct platform_device *pdev) |
| 551 | { |
| 552 | struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); |
| 553 | struct uart_port *port; |
| 554 | struct resource *res_mem; |
| 555 | struct resource *res_irq; |
| 556 | int i = pdev->id; |
| 557 | int ret; |
| 558 | |
| 559 | /* if id is -1 scan for a free id and use that one */ |
| 560 | if (i == -1) { |
| 561 | for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) |
| 562 | if (altera_uart_ports[i].port.mapbase == 0) |
| 563 | break; |
| 564 | } |
| 565 | |
| 566 | if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) |
| 567 | return -EINVAL; |
| 568 | |
| 569 | port = &altera_uart_ports[i].port; |
| 570 | |
| 571 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 572 | if (res_mem) |
| 573 | port->mapbase = res_mem->start; |
| 574 | else if (platp) |
| 575 | port->mapbase = platp->mapbase; |
| 576 | else |
| 577 | return -EINVAL; |
| 578 | |
| 579 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 580 | if (res_irq) |
| 581 | port->irq = res_irq->start; |
| 582 | else if (platp) |
| 583 | port->irq = platp->irq; |
| 584 | |
| 585 | /* Check platform data first so we can override device node data */ |
| 586 | if (platp) |
| 587 | port->uartclk = platp->uartclk; |
| 588 | else { |
| 589 | ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
| 590 | &port->uartclk); |
| 591 | if (ret) |
| 592 | return ret; |
| 593 | } |
| 594 | |
| 595 | port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); |
| 596 | if (!port->membase) |
| 597 | return -ENOMEM; |
| 598 | |
| 599 | if (platp) |
| 600 | port->regshift = platp->bus_shift; |
| 601 | else |
| 602 | port->regshift = 0; |
| 603 | |
| 604 | port->line = i; |
| 605 | port->type = PORT_ALTERA_UART; |
| 606 | port->iotype = SERIAL_IO_MEM; |
| 607 | port->ops = &altera_uart_ops; |
| 608 | port->flags = UPF_BOOT_AUTOCONF; |
| 609 | port->dev = &pdev->dev; |
| 610 | |
| 611 | platform_set_drvdata(pdev, port); |
| 612 | |
| 613 | uart_add_one_port(&altera_uart_driver, port); |
| 614 | |
| 615 | return 0; |
| 616 | } |
| 617 | |
| 618 | static int altera_uart_remove(struct platform_device *pdev) |
| 619 | { |
| 620 | struct uart_port *port = platform_get_drvdata(pdev); |
| 621 | |
| 622 | if (port) { |
| 623 | uart_remove_one_port(&altera_uart_driver, port); |
| 624 | port->mapbase = 0; |
| 625 | iounmap(port->membase); |
| 626 | } |
| 627 | |
| 628 | return 0; |
| 629 | } |
| 630 | |
| 631 | #ifdef CONFIG_OF |
| 632 | static const struct of_device_id altera_uart_match[] = { |
| 633 | { .compatible = "ALTR,uart-1.0", }, |
| 634 | { .compatible = "altr,uart-1.0", }, |
| 635 | {}, |
| 636 | }; |
| 637 | MODULE_DEVICE_TABLE(of, altera_uart_match); |
| 638 | #endif /* CONFIG_OF */ |
| 639 | |
| 640 | static struct platform_driver altera_uart_platform_driver = { |
| 641 | .probe = altera_uart_probe, |
| 642 | .remove = altera_uart_remove, |
| 643 | .driver = { |
| 644 | .name = DRV_NAME, |
| 645 | .of_match_table = of_match_ptr(altera_uart_match), |
| 646 | }, |
| 647 | }; |
| 648 | |
| 649 | static int __init altera_uart_init(void) |
| 650 | { |
| 651 | int rc; |
| 652 | |
| 653 | rc = uart_register_driver(&altera_uart_driver); |
| 654 | if (rc) |
| 655 | return rc; |
| 656 | rc = platform_driver_register(&altera_uart_platform_driver); |
| 657 | if (rc) |
| 658 | uart_unregister_driver(&altera_uart_driver); |
| 659 | return rc; |
| 660 | } |
| 661 | |
| 662 | static void __exit altera_uart_exit(void) |
| 663 | { |
| 664 | platform_driver_unregister(&altera_uart_platform_driver); |
| 665 | uart_unregister_driver(&altera_uart_driver); |
| 666 | } |
| 667 | |
| 668 | module_init(altera_uart_init); |
| 669 | module_exit(altera_uart_exit); |
| 670 | |
| 671 | MODULE_DESCRIPTION("Altera UART driver"); |
| 672 | MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); |
| 673 | MODULE_LICENSE("GPL"); |
| 674 | MODULE_ALIAS("platform:" DRV_NAME); |
| 675 | MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); |