b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * otg_fsm.c - ChipIdea USB IP core OTG FSM driver |
| 4 | * |
| 5 | * Copyright (C) 2014 Freescale Semiconductor, Inc. |
| 6 | * |
| 7 | * Author: Jun Li |
| 8 | */ |
| 9 | |
| 10 | /* |
| 11 | * This file mainly handles OTG fsm, it includes OTG fsm operations |
| 12 | * for HNP and SRP. |
| 13 | * |
| 14 | * TODO List |
| 15 | * - ADP |
| 16 | * - OTG test device |
| 17 | */ |
| 18 | |
| 19 | #include <linux/usb/otg.h> |
| 20 | #include <linux/usb/gadget.h> |
| 21 | #include <linux/usb/hcd.h> |
| 22 | #include <linux/usb/chipidea.h> |
| 23 | #include <linux/regulator/consumer.h> |
| 24 | |
| 25 | #include "ci.h" |
| 26 | #include "bits.h" |
| 27 | #include "otg.h" |
| 28 | #include "otg_fsm.h" |
| 29 | |
| 30 | /* Add for otg: interact with user space app */ |
| 31 | static ssize_t |
| 32 | a_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 33 | { |
| 34 | char *next; |
| 35 | unsigned size, t; |
| 36 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 37 | |
| 38 | next = buf; |
| 39 | size = PAGE_SIZE; |
| 40 | t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req); |
| 41 | size -= t; |
| 42 | next += t; |
| 43 | |
| 44 | return PAGE_SIZE - size; |
| 45 | } |
| 46 | |
| 47 | static ssize_t |
| 48 | a_bus_req_store(struct device *dev, struct device_attribute *attr, |
| 49 | const char *buf, size_t count) |
| 50 | { |
| 51 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 52 | |
| 53 | if (count > 2) |
| 54 | return -1; |
| 55 | |
| 56 | mutex_lock(&ci->fsm.lock); |
| 57 | if (buf[0] == '0') { |
| 58 | ci->fsm.a_bus_req = 0; |
| 59 | } else if (buf[0] == '1') { |
| 60 | /* If a_bus_drop is TRUE, a_bus_req can't be set */ |
| 61 | if (ci->fsm.a_bus_drop) { |
| 62 | mutex_unlock(&ci->fsm.lock); |
| 63 | return count; |
| 64 | } |
| 65 | ci->fsm.a_bus_req = 1; |
| 66 | if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { |
| 67 | ci->gadget.host_request_flag = 1; |
| 68 | mutex_unlock(&ci->fsm.lock); |
| 69 | return count; |
| 70 | } |
| 71 | } |
| 72 | |
| 73 | ci_otg_queue_work(ci); |
| 74 | mutex_unlock(&ci->fsm.lock); |
| 75 | |
| 76 | return count; |
| 77 | } |
| 78 | static DEVICE_ATTR_RW(a_bus_req); |
| 79 | |
| 80 | static ssize_t |
| 81 | a_bus_drop_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 82 | { |
| 83 | char *next; |
| 84 | unsigned size, t; |
| 85 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 86 | |
| 87 | next = buf; |
| 88 | size = PAGE_SIZE; |
| 89 | t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop); |
| 90 | size -= t; |
| 91 | next += t; |
| 92 | |
| 93 | return PAGE_SIZE - size; |
| 94 | } |
| 95 | |
| 96 | static ssize_t |
| 97 | a_bus_drop_store(struct device *dev, struct device_attribute *attr, |
| 98 | const char *buf, size_t count) |
| 99 | { |
| 100 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 101 | |
| 102 | if (count > 2) |
| 103 | return -1; |
| 104 | |
| 105 | mutex_lock(&ci->fsm.lock); |
| 106 | if (buf[0] == '0') { |
| 107 | ci->fsm.a_bus_drop = 0; |
| 108 | } else if (buf[0] == '1') { |
| 109 | ci->fsm.a_bus_drop = 1; |
| 110 | ci->fsm.a_bus_req = 0; |
| 111 | } |
| 112 | |
| 113 | ci_otg_queue_work(ci); |
| 114 | mutex_unlock(&ci->fsm.lock); |
| 115 | |
| 116 | return count; |
| 117 | } |
| 118 | static DEVICE_ATTR_RW(a_bus_drop); |
| 119 | |
| 120 | static ssize_t |
| 121 | b_bus_req_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 122 | { |
| 123 | char *next; |
| 124 | unsigned size, t; |
| 125 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 126 | |
| 127 | next = buf; |
| 128 | size = PAGE_SIZE; |
| 129 | t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req); |
| 130 | size -= t; |
| 131 | next += t; |
| 132 | |
| 133 | return PAGE_SIZE - size; |
| 134 | } |
| 135 | |
| 136 | static ssize_t |
| 137 | b_bus_req_store(struct device *dev, struct device_attribute *attr, |
| 138 | const char *buf, size_t count) |
| 139 | { |
| 140 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 141 | |
| 142 | if (count > 2) |
| 143 | return -1; |
| 144 | |
| 145 | mutex_lock(&ci->fsm.lock); |
| 146 | if (buf[0] == '0') |
| 147 | ci->fsm.b_bus_req = 0; |
| 148 | else if (buf[0] == '1') { |
| 149 | ci->fsm.b_bus_req = 1; |
| 150 | if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { |
| 151 | ci->gadget.host_request_flag = 1; |
| 152 | mutex_unlock(&ci->fsm.lock); |
| 153 | return count; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | ci_otg_queue_work(ci); |
| 158 | mutex_unlock(&ci->fsm.lock); |
| 159 | |
| 160 | return count; |
| 161 | } |
| 162 | static DEVICE_ATTR_RW(b_bus_req); |
| 163 | |
| 164 | static ssize_t |
| 165 | a_clr_err_store(struct device *dev, struct device_attribute *attr, |
| 166 | const char *buf, size_t count) |
| 167 | { |
| 168 | struct ci_hdrc *ci = dev_get_drvdata(dev); |
| 169 | |
| 170 | if (count > 2) |
| 171 | return -1; |
| 172 | |
| 173 | mutex_lock(&ci->fsm.lock); |
| 174 | if (buf[0] == '1') |
| 175 | ci->fsm.a_clr_err = 1; |
| 176 | |
| 177 | ci_otg_queue_work(ci); |
| 178 | mutex_unlock(&ci->fsm.lock); |
| 179 | |
| 180 | return count; |
| 181 | } |
| 182 | static DEVICE_ATTR_WO(a_clr_err); |
| 183 | |
| 184 | static struct attribute *inputs_attrs[] = { |
| 185 | &dev_attr_a_bus_req.attr, |
| 186 | &dev_attr_a_bus_drop.attr, |
| 187 | &dev_attr_b_bus_req.attr, |
| 188 | &dev_attr_a_clr_err.attr, |
| 189 | NULL, |
| 190 | }; |
| 191 | |
| 192 | static const struct attribute_group inputs_attr_group = { |
| 193 | .name = "inputs", |
| 194 | .attrs = inputs_attrs, |
| 195 | }; |
| 196 | |
| 197 | /* |
| 198 | * Keep this list in the same order as timers indexed |
| 199 | * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h |
| 200 | */ |
| 201 | static unsigned otg_timer_ms[] = { |
| 202 | TA_WAIT_VRISE, |
| 203 | TA_WAIT_VFALL, |
| 204 | TA_WAIT_BCON, |
| 205 | TA_AIDL_BDIS, |
| 206 | TB_ASE0_BRST, |
| 207 | TA_BIDL_ADIS, |
| 208 | TB_AIDL_BDIS, |
| 209 | TB_SE0_SRP, |
| 210 | TB_SRP_FAIL, |
| 211 | 0, |
| 212 | TB_DATA_PLS, |
| 213 | TB_SSEND_SRP, |
| 214 | }; |
| 215 | |
| 216 | /* |
| 217 | * Add timer to active timer list |
| 218 | */ |
| 219 | static void ci_otg_add_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) |
| 220 | { |
| 221 | unsigned long flags, timer_sec, timer_nsec; |
| 222 | |
| 223 | if (t >= NUM_OTG_FSM_TIMERS) |
| 224 | return; |
| 225 | |
| 226 | spin_lock_irqsave(&ci->lock, flags); |
| 227 | timer_sec = otg_timer_ms[t] / MSEC_PER_SEC; |
| 228 | timer_nsec = (otg_timer_ms[t] % MSEC_PER_SEC) * NSEC_PER_MSEC; |
| 229 | ci->hr_timeouts[t] = ktime_add(ktime_get(), |
| 230 | ktime_set(timer_sec, timer_nsec)); |
| 231 | ci->enabled_otg_timer_bits |= (1 << t); |
| 232 | if ((ci->next_otg_timer == NUM_OTG_FSM_TIMERS) || |
| 233 | ktime_after(ci->hr_timeouts[ci->next_otg_timer], |
| 234 | ci->hr_timeouts[t])) { |
| 235 | ci->next_otg_timer = t; |
| 236 | hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, |
| 237 | ci->hr_timeouts[t], NSEC_PER_MSEC, |
| 238 | HRTIMER_MODE_ABS); |
| 239 | } |
| 240 | spin_unlock_irqrestore(&ci->lock, flags); |
| 241 | } |
| 242 | |
| 243 | /* |
| 244 | * Remove timer from active timer list |
| 245 | */ |
| 246 | static void ci_otg_del_timer(struct ci_hdrc *ci, enum otg_fsm_timer t) |
| 247 | { |
| 248 | unsigned long flags, enabled_timer_bits; |
| 249 | enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; |
| 250 | |
| 251 | if ((t >= NUM_OTG_FSM_TIMERS) || |
| 252 | !(ci->enabled_otg_timer_bits & (1 << t))) |
| 253 | return; |
| 254 | |
| 255 | spin_lock_irqsave(&ci->lock, flags); |
| 256 | ci->enabled_otg_timer_bits &= ~(1 << t); |
| 257 | if (ci->next_otg_timer == t) { |
| 258 | if (ci->enabled_otg_timer_bits == 0) { |
| 259 | spin_unlock_irqrestore(&ci->lock, flags); |
| 260 | /* No enabled timers after delete it */ |
| 261 | hrtimer_cancel(&ci->otg_fsm_hrtimer); |
| 262 | spin_lock_irqsave(&ci->lock, flags); |
| 263 | ci->next_otg_timer = NUM_OTG_FSM_TIMERS; |
| 264 | } else { |
| 265 | /* Find the next timer */ |
| 266 | enabled_timer_bits = ci->enabled_otg_timer_bits; |
| 267 | for_each_set_bit(cur_timer, &enabled_timer_bits, |
| 268 | NUM_OTG_FSM_TIMERS) { |
| 269 | if ((next_timer == NUM_OTG_FSM_TIMERS) || |
| 270 | ktime_before(ci->hr_timeouts[next_timer], |
| 271 | ci->hr_timeouts[cur_timer])) |
| 272 | next_timer = cur_timer; |
| 273 | } |
| 274 | } |
| 275 | } |
| 276 | if (next_timer != NUM_OTG_FSM_TIMERS) { |
| 277 | ci->next_otg_timer = next_timer; |
| 278 | hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, |
| 279 | ci->hr_timeouts[next_timer], NSEC_PER_MSEC, |
| 280 | HRTIMER_MODE_ABS); |
| 281 | } |
| 282 | spin_unlock_irqrestore(&ci->lock, flags); |
| 283 | } |
| 284 | |
| 285 | /* OTG FSM timer handlers */ |
| 286 | static int a_wait_vrise_tmout(struct ci_hdrc *ci) |
| 287 | { |
| 288 | ci->fsm.a_wait_vrise_tmout = 1; |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | static int a_wait_vfall_tmout(struct ci_hdrc *ci) |
| 293 | { |
| 294 | ci->fsm.a_wait_vfall_tmout = 1; |
| 295 | return 0; |
| 296 | } |
| 297 | |
| 298 | static int a_wait_bcon_tmout(struct ci_hdrc *ci) |
| 299 | { |
| 300 | ci->fsm.a_wait_bcon_tmout = 1; |
| 301 | return 0; |
| 302 | } |
| 303 | |
| 304 | static int a_aidl_bdis_tmout(struct ci_hdrc *ci) |
| 305 | { |
| 306 | ci->fsm.a_aidl_bdis_tmout = 1; |
| 307 | return 0; |
| 308 | } |
| 309 | |
| 310 | static int b_ase0_brst_tmout(struct ci_hdrc *ci) |
| 311 | { |
| 312 | ci->fsm.b_ase0_brst_tmout = 1; |
| 313 | return 0; |
| 314 | } |
| 315 | |
| 316 | static int a_bidl_adis_tmout(struct ci_hdrc *ci) |
| 317 | { |
| 318 | ci->fsm.a_bidl_adis_tmout = 1; |
| 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | static int b_aidl_bdis_tmout(struct ci_hdrc *ci) |
| 323 | { |
| 324 | ci->fsm.a_bus_suspend = 1; |
| 325 | return 0; |
| 326 | } |
| 327 | |
| 328 | static int b_se0_srp_tmout(struct ci_hdrc *ci) |
| 329 | { |
| 330 | ci->fsm.b_se0_srp = 1; |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | static int b_srp_fail_tmout(struct ci_hdrc *ci) |
| 335 | { |
| 336 | ci->fsm.b_srp_done = 1; |
| 337 | return 1; |
| 338 | } |
| 339 | |
| 340 | static int b_data_pls_tmout(struct ci_hdrc *ci) |
| 341 | { |
| 342 | ci->fsm.b_srp_done = 1; |
| 343 | ci->fsm.b_bus_req = 0; |
| 344 | if (ci->fsm.power_up) |
| 345 | ci->fsm.power_up = 0; |
| 346 | hw_write_otgsc(ci, OTGSC_HABA, 0); |
| 347 | pm_runtime_put(ci->dev); |
| 348 | return 0; |
| 349 | } |
| 350 | |
| 351 | static int b_ssend_srp_tmout(struct ci_hdrc *ci) |
| 352 | { |
| 353 | ci->fsm.b_ssend_srp = 1; |
| 354 | /* only vbus fall below B_sess_vld in b_idle state */ |
| 355 | if (ci->fsm.otg->state == OTG_STATE_B_IDLE) |
| 356 | return 0; |
| 357 | else |
| 358 | return 1; |
| 359 | } |
| 360 | |
| 361 | /* |
| 362 | * Keep this list in the same order as timers indexed |
| 363 | * by enum otg_fsm_timer in include/linux/usb/otg-fsm.h |
| 364 | */ |
| 365 | static int (*otg_timer_handlers[])(struct ci_hdrc *) = { |
| 366 | a_wait_vrise_tmout, /* A_WAIT_VRISE */ |
| 367 | a_wait_vfall_tmout, /* A_WAIT_VFALL */ |
| 368 | a_wait_bcon_tmout, /* A_WAIT_BCON */ |
| 369 | a_aidl_bdis_tmout, /* A_AIDL_BDIS */ |
| 370 | b_ase0_brst_tmout, /* B_ASE0_BRST */ |
| 371 | a_bidl_adis_tmout, /* A_BIDL_ADIS */ |
| 372 | b_aidl_bdis_tmout, /* B_AIDL_BDIS */ |
| 373 | b_se0_srp_tmout, /* B_SE0_SRP */ |
| 374 | b_srp_fail_tmout, /* B_SRP_FAIL */ |
| 375 | NULL, /* A_WAIT_ENUM */ |
| 376 | b_data_pls_tmout, /* B_DATA_PLS */ |
| 377 | b_ssend_srp_tmout, /* B_SSEND_SRP */ |
| 378 | }; |
| 379 | |
| 380 | /* |
| 381 | * Enable the next nearest enabled timer if have |
| 382 | */ |
| 383 | static enum hrtimer_restart ci_otg_hrtimer_func(struct hrtimer *t) |
| 384 | { |
| 385 | struct ci_hdrc *ci = container_of(t, struct ci_hdrc, otg_fsm_hrtimer); |
| 386 | ktime_t now, *timeout; |
| 387 | unsigned long enabled_timer_bits; |
| 388 | unsigned long flags; |
| 389 | enum otg_fsm_timer cur_timer, next_timer = NUM_OTG_FSM_TIMERS; |
| 390 | int ret = -EINVAL; |
| 391 | |
| 392 | spin_lock_irqsave(&ci->lock, flags); |
| 393 | enabled_timer_bits = ci->enabled_otg_timer_bits; |
| 394 | ci->next_otg_timer = NUM_OTG_FSM_TIMERS; |
| 395 | |
| 396 | now = ktime_get(); |
| 397 | for_each_set_bit(cur_timer, &enabled_timer_bits, NUM_OTG_FSM_TIMERS) { |
| 398 | if (ktime_compare(now, ci->hr_timeouts[cur_timer]) >= 0) { |
| 399 | ci->enabled_otg_timer_bits &= ~(1 << cur_timer); |
| 400 | if (otg_timer_handlers[cur_timer]) |
| 401 | ret = otg_timer_handlers[cur_timer](ci); |
| 402 | } else { |
| 403 | if ((next_timer == NUM_OTG_FSM_TIMERS) || |
| 404 | ktime_before(ci->hr_timeouts[cur_timer], |
| 405 | ci->hr_timeouts[next_timer])) |
| 406 | next_timer = cur_timer; |
| 407 | } |
| 408 | } |
| 409 | /* Enable the next nearest timer */ |
| 410 | if (next_timer < NUM_OTG_FSM_TIMERS) { |
| 411 | timeout = &ci->hr_timeouts[next_timer]; |
| 412 | hrtimer_start_range_ns(&ci->otg_fsm_hrtimer, *timeout, |
| 413 | NSEC_PER_MSEC, HRTIMER_MODE_ABS); |
| 414 | ci->next_otg_timer = next_timer; |
| 415 | } |
| 416 | spin_unlock_irqrestore(&ci->lock, flags); |
| 417 | |
| 418 | if (!ret) |
| 419 | ci_otg_queue_work(ci); |
| 420 | |
| 421 | return HRTIMER_NORESTART; |
| 422 | } |
| 423 | |
| 424 | /* Initialize timers */ |
| 425 | static int ci_otg_init_timers(struct ci_hdrc *ci) |
| 426 | { |
| 427 | hrtimer_init(&ci->otg_fsm_hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); |
| 428 | ci->otg_fsm_hrtimer.function = ci_otg_hrtimer_func; |
| 429 | |
| 430 | return 0; |
| 431 | } |
| 432 | |
| 433 | /* -------------------------------------------------------------*/ |
| 434 | /* Operations that will be called from OTG Finite State Machine */ |
| 435 | /* -------------------------------------------------------------*/ |
| 436 | static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
| 437 | { |
| 438 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 439 | |
| 440 | if (t < NUM_OTG_FSM_TIMERS) |
| 441 | ci_otg_add_timer(ci, t); |
| 442 | return; |
| 443 | } |
| 444 | |
| 445 | static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t) |
| 446 | { |
| 447 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 448 | |
| 449 | if (t < NUM_OTG_FSM_TIMERS) |
| 450 | ci_otg_del_timer(ci, t); |
| 451 | return; |
| 452 | } |
| 453 | |
| 454 | /* |
| 455 | * A-device drive vbus: turn on vbus regulator and enable port power |
| 456 | * Data pulse irq should be disabled while vbus is on. |
| 457 | */ |
| 458 | static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on) |
| 459 | { |
| 460 | int ret; |
| 461 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 462 | |
| 463 | if (on) { |
| 464 | /* Enable power power */ |
| 465 | hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, |
| 466 | PORTSC_PP); |
| 467 | if (ci->platdata->reg_vbus) { |
| 468 | ret = regulator_enable(ci->platdata->reg_vbus); |
| 469 | if (ret) { |
| 470 | dev_err(ci->dev, |
| 471 | "Failed to enable vbus regulator, ret=%d\n", |
| 472 | ret); |
| 473 | return; |
| 474 | } |
| 475 | } |
| 476 | /* Disable data pulse irq */ |
| 477 | hw_write_otgsc(ci, OTGSC_DPIE, 0); |
| 478 | |
| 479 | fsm->a_srp_det = 0; |
| 480 | fsm->power_up = 0; |
| 481 | } else { |
| 482 | if (ci->platdata->reg_vbus) |
| 483 | regulator_disable(ci->platdata->reg_vbus); |
| 484 | |
| 485 | fsm->a_bus_drop = 1; |
| 486 | fsm->a_bus_req = 0; |
| 487 | } |
| 488 | } |
| 489 | |
| 490 | /* |
| 491 | * Control data line by Run Stop bit. |
| 492 | */ |
| 493 | static void ci_otg_loc_conn(struct otg_fsm *fsm, int on) |
| 494 | { |
| 495 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 496 | |
| 497 | if (on) |
| 498 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); |
| 499 | else |
| 500 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); |
| 501 | } |
| 502 | |
| 503 | /* |
| 504 | * Generate SOF by host. |
| 505 | * In host mode, controller will automatically send SOF. |
| 506 | * Suspend will block the data on the port. |
| 507 | * |
| 508 | * This is controlled through usbcore by usb autosuspend, |
| 509 | * so the usb device class driver need support autosuspend, |
| 510 | * otherwise the bus suspend will not happen. |
| 511 | */ |
| 512 | static void ci_otg_loc_sof(struct otg_fsm *fsm, int on) |
| 513 | { |
| 514 | struct usb_device *udev; |
| 515 | |
| 516 | if (!fsm->otg->host) |
| 517 | return; |
| 518 | |
| 519 | udev = usb_hub_find_child(fsm->otg->host->root_hub, 1); |
| 520 | if (!udev) |
| 521 | return; |
| 522 | |
| 523 | if (on) { |
| 524 | usb_disable_autosuspend(udev); |
| 525 | } else { |
| 526 | pm_runtime_set_autosuspend_delay(&udev->dev, 0); |
| 527 | usb_enable_autosuspend(udev); |
| 528 | } |
| 529 | } |
| 530 | |
| 531 | /* |
| 532 | * Start SRP pulsing by data-line pulsing, |
| 533 | * no v-bus pulsing followed |
| 534 | */ |
| 535 | static void ci_otg_start_pulse(struct otg_fsm *fsm) |
| 536 | { |
| 537 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 538 | |
| 539 | /* Hardware Assistant Data pulse */ |
| 540 | hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP); |
| 541 | |
| 542 | pm_runtime_get(ci->dev); |
| 543 | ci_otg_add_timer(ci, B_DATA_PLS); |
| 544 | } |
| 545 | |
| 546 | static int ci_otg_start_host(struct otg_fsm *fsm, int on) |
| 547 | { |
| 548 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 549 | |
| 550 | if (on) { |
| 551 | ci_role_stop(ci); |
| 552 | ci_role_start(ci, CI_ROLE_HOST); |
| 553 | } else { |
| 554 | ci_role_stop(ci); |
| 555 | ci_role_start(ci, CI_ROLE_GADGET); |
| 556 | } |
| 557 | return 0; |
| 558 | } |
| 559 | |
| 560 | static int ci_otg_start_gadget(struct otg_fsm *fsm, int on) |
| 561 | { |
| 562 | struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm); |
| 563 | |
| 564 | if (on) |
| 565 | usb_gadget_vbus_connect(&ci->gadget); |
| 566 | else |
| 567 | usb_gadget_vbus_disconnect(&ci->gadget); |
| 568 | |
| 569 | return 0; |
| 570 | } |
| 571 | |
| 572 | static struct otg_fsm_ops ci_otg_ops = { |
| 573 | .drv_vbus = ci_otg_drv_vbus, |
| 574 | .loc_conn = ci_otg_loc_conn, |
| 575 | .loc_sof = ci_otg_loc_sof, |
| 576 | .start_pulse = ci_otg_start_pulse, |
| 577 | .add_timer = ci_otg_fsm_add_timer, |
| 578 | .del_timer = ci_otg_fsm_del_timer, |
| 579 | .start_host = ci_otg_start_host, |
| 580 | .start_gadget = ci_otg_start_gadget, |
| 581 | }; |
| 582 | |
| 583 | int ci_otg_fsm_work(struct ci_hdrc *ci) |
| 584 | { |
| 585 | /* |
| 586 | * Don't do fsm transition for B device |
| 587 | * when there is no gadget class driver |
| 588 | */ |
| 589 | if (ci->fsm.id && !(ci->driver) && |
| 590 | ci->fsm.otg->state < OTG_STATE_A_IDLE) |
| 591 | return 0; |
| 592 | |
| 593 | pm_runtime_get_sync(ci->dev); |
| 594 | if (otg_statemachine(&ci->fsm)) { |
| 595 | if (ci->fsm.otg->state == OTG_STATE_A_IDLE) { |
| 596 | /* |
| 597 | * Further state change for cases: |
| 598 | * a_idle to b_idle; or |
| 599 | * a_idle to a_wait_vrise due to ID change(1->0), so |
| 600 | * B-dev becomes A-dev can try to start new session |
| 601 | * consequently; or |
| 602 | * a_idle to a_wait_vrise when power up |
| 603 | */ |
| 604 | if ((ci->fsm.id) || (ci->id_event) || |
| 605 | (ci->fsm.power_up)) { |
| 606 | ci_otg_queue_work(ci); |
| 607 | } else { |
| 608 | /* Enable data pulse irq */ |
| 609 | hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | |
| 610 | PORTSC_PP, 0); |
| 611 | hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); |
| 612 | hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE); |
| 613 | } |
| 614 | if (ci->id_event) |
| 615 | ci->id_event = false; |
| 616 | } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) { |
| 617 | if (ci->fsm.b_sess_vld) { |
| 618 | ci->fsm.power_up = 0; |
| 619 | /* |
| 620 | * Further transite to b_periphearl state |
| 621 | * when register gadget driver with vbus on |
| 622 | */ |
| 623 | ci_otg_queue_work(ci); |
| 624 | } |
| 625 | } else if (ci->fsm.otg->state == OTG_STATE_A_HOST) { |
| 626 | pm_runtime_mark_last_busy(ci->dev); |
| 627 | pm_runtime_put_autosuspend(ci->dev); |
| 628 | return 0; |
| 629 | } |
| 630 | } |
| 631 | pm_runtime_put_sync(ci->dev); |
| 632 | return 0; |
| 633 | } |
| 634 | |
| 635 | /* |
| 636 | * Update fsm variables in each state if catching expected interrupts, |
| 637 | * called by otg fsm isr. |
| 638 | */ |
| 639 | static void ci_otg_fsm_event(struct ci_hdrc *ci) |
| 640 | { |
| 641 | u32 intr_sts, otg_bsess_vld, port_conn; |
| 642 | struct otg_fsm *fsm = &ci->fsm; |
| 643 | |
| 644 | intr_sts = hw_read_intr_status(ci); |
| 645 | otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV); |
| 646 | port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS); |
| 647 | |
| 648 | switch (ci->fsm.otg->state) { |
| 649 | case OTG_STATE_A_WAIT_BCON: |
| 650 | if (port_conn) { |
| 651 | fsm->b_conn = 1; |
| 652 | fsm->a_bus_req = 1; |
| 653 | ci_otg_queue_work(ci); |
| 654 | } |
| 655 | break; |
| 656 | case OTG_STATE_B_IDLE: |
| 657 | if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) { |
| 658 | fsm->b_sess_vld = 1; |
| 659 | ci_otg_queue_work(ci); |
| 660 | } |
| 661 | break; |
| 662 | case OTG_STATE_B_PERIPHERAL: |
| 663 | if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) { |
| 664 | ci_otg_add_timer(ci, B_AIDL_BDIS); |
| 665 | } else if (intr_sts & USBi_PCI) { |
| 666 | ci_otg_del_timer(ci, B_AIDL_BDIS); |
| 667 | if (fsm->a_bus_suspend == 1) |
| 668 | fsm->a_bus_suspend = 0; |
| 669 | } |
| 670 | break; |
| 671 | case OTG_STATE_B_HOST: |
| 672 | if ((intr_sts & USBi_PCI) && !port_conn) { |
| 673 | fsm->a_conn = 0; |
| 674 | fsm->b_bus_req = 0; |
| 675 | ci_otg_queue_work(ci); |
| 676 | } |
| 677 | break; |
| 678 | case OTG_STATE_A_PERIPHERAL: |
| 679 | if (intr_sts & USBi_SLI) { |
| 680 | fsm->b_bus_suspend = 1; |
| 681 | /* |
| 682 | * Init a timer to know how long this suspend |
| 683 | * will continue, if time out, indicates B no longer |
| 684 | * wants to be host role |
| 685 | */ |
| 686 | ci_otg_add_timer(ci, A_BIDL_ADIS); |
| 687 | } |
| 688 | |
| 689 | if (intr_sts & USBi_URI) |
| 690 | ci_otg_del_timer(ci, A_BIDL_ADIS); |
| 691 | |
| 692 | if (intr_sts & USBi_PCI) { |
| 693 | if (fsm->b_bus_suspend == 1) { |
| 694 | ci_otg_del_timer(ci, A_BIDL_ADIS); |
| 695 | fsm->b_bus_suspend = 0; |
| 696 | } |
| 697 | } |
| 698 | break; |
| 699 | case OTG_STATE_A_SUSPEND: |
| 700 | if ((intr_sts & USBi_PCI) && !port_conn) { |
| 701 | fsm->b_conn = 0; |
| 702 | |
| 703 | /* if gadget driver is binded */ |
| 704 | if (ci->driver) { |
| 705 | /* A device to be peripheral mode */ |
| 706 | ci->gadget.is_a_peripheral = 1; |
| 707 | } |
| 708 | ci_otg_queue_work(ci); |
| 709 | } |
| 710 | break; |
| 711 | case OTG_STATE_A_HOST: |
| 712 | if ((intr_sts & USBi_PCI) && !port_conn) { |
| 713 | fsm->b_conn = 0; |
| 714 | ci_otg_queue_work(ci); |
| 715 | } |
| 716 | break; |
| 717 | case OTG_STATE_B_WAIT_ACON: |
| 718 | if ((intr_sts & USBi_PCI) && port_conn) { |
| 719 | fsm->a_conn = 1; |
| 720 | ci_otg_queue_work(ci); |
| 721 | } |
| 722 | break; |
| 723 | default: |
| 724 | break; |
| 725 | } |
| 726 | } |
| 727 | |
| 728 | /* |
| 729 | * ci_otg_irq - otg fsm related irq handling |
| 730 | * and also update otg fsm variable by monitoring usb host and udc |
| 731 | * state change interrupts. |
| 732 | * @ci: ci_hdrc |
| 733 | */ |
| 734 | irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci) |
| 735 | { |
| 736 | irqreturn_t retval = IRQ_NONE; |
| 737 | u32 otgsc, otg_int_src = 0; |
| 738 | struct otg_fsm *fsm = &ci->fsm; |
| 739 | |
| 740 | otgsc = hw_read_otgsc(ci, ~0); |
| 741 | otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8); |
| 742 | fsm->id = (otgsc & OTGSC_ID) ? 1 : 0; |
| 743 | |
| 744 | if (otg_int_src) { |
| 745 | if (otg_int_src & OTGSC_DPIS) { |
| 746 | hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS); |
| 747 | fsm->a_srp_det = 1; |
| 748 | fsm->a_bus_drop = 0; |
| 749 | } else if (otg_int_src & OTGSC_IDIS) { |
| 750 | hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS); |
| 751 | if (fsm->id == 0) { |
| 752 | fsm->a_bus_drop = 0; |
| 753 | fsm->a_bus_req = 1; |
| 754 | ci->id_event = true; |
| 755 | } |
| 756 | } else if (otg_int_src & OTGSC_BSVIS) { |
| 757 | hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS); |
| 758 | if (otgsc & OTGSC_BSV) { |
| 759 | fsm->b_sess_vld = 1; |
| 760 | ci_otg_del_timer(ci, B_SSEND_SRP); |
| 761 | ci_otg_del_timer(ci, B_SRP_FAIL); |
| 762 | fsm->b_ssend_srp = 0; |
| 763 | } else { |
| 764 | fsm->b_sess_vld = 0; |
| 765 | if (fsm->id) |
| 766 | ci_otg_add_timer(ci, B_SSEND_SRP); |
| 767 | } |
| 768 | } else if (otg_int_src & OTGSC_AVVIS) { |
| 769 | hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS); |
| 770 | if (otgsc & OTGSC_AVV) { |
| 771 | fsm->a_vbus_vld = 1; |
| 772 | } else { |
| 773 | fsm->a_vbus_vld = 0; |
| 774 | fsm->b_conn = 0; |
| 775 | } |
| 776 | } |
| 777 | ci_otg_queue_work(ci); |
| 778 | return IRQ_HANDLED; |
| 779 | } |
| 780 | |
| 781 | ci_otg_fsm_event(ci); |
| 782 | |
| 783 | return retval; |
| 784 | } |
| 785 | |
| 786 | void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci) |
| 787 | { |
| 788 | ci_otg_queue_work(ci); |
| 789 | } |
| 790 | |
| 791 | int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci) |
| 792 | { |
| 793 | int retval = 0; |
| 794 | |
| 795 | if (ci->phy) |
| 796 | ci->otg.phy = ci->phy; |
| 797 | else |
| 798 | ci->otg.usb_phy = ci->usb_phy; |
| 799 | |
| 800 | ci->otg.gadget = &ci->gadget; |
| 801 | ci->fsm.otg = &ci->otg; |
| 802 | ci->fsm.power_up = 1; |
| 803 | ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0; |
| 804 | ci->fsm.otg->state = OTG_STATE_UNDEFINED; |
| 805 | ci->fsm.ops = &ci_otg_ops; |
| 806 | ci->gadget.hnp_polling_support = 1; |
| 807 | ci->fsm.host_req_flag = devm_kzalloc(ci->dev, 1, GFP_KERNEL); |
| 808 | if (!ci->fsm.host_req_flag) |
| 809 | return -ENOMEM; |
| 810 | |
| 811 | mutex_init(&ci->fsm.lock); |
| 812 | |
| 813 | retval = ci_otg_init_timers(ci); |
| 814 | if (retval) { |
| 815 | dev_err(ci->dev, "Couldn't init OTG timers\n"); |
| 816 | return retval; |
| 817 | } |
| 818 | ci->enabled_otg_timer_bits = 0; |
| 819 | ci->next_otg_timer = NUM_OTG_FSM_TIMERS; |
| 820 | |
| 821 | retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group); |
| 822 | if (retval < 0) { |
| 823 | dev_dbg(ci->dev, |
| 824 | "Can't register sysfs attr group: %d\n", retval); |
| 825 | return retval; |
| 826 | } |
| 827 | |
| 828 | /* Enable A vbus valid irq */ |
| 829 | hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE); |
| 830 | |
| 831 | if (ci->fsm.id) { |
| 832 | ci->fsm.b_ssend_srp = |
| 833 | hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1; |
| 834 | ci->fsm.b_sess_vld = |
| 835 | hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0; |
| 836 | /* Enable BSV irq */ |
| 837 | hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE); |
| 838 | } |
| 839 | |
| 840 | return 0; |
| 841 | } |
| 842 | |
| 843 | void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci) |
| 844 | { |
| 845 | sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group); |
| 846 | } |