blob: a6ce6b89b271a3611700d7e868432a6830a6c588 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29
30/* control endpoint description */
31static const struct usb_endpoint_descriptor
32ctrl_endpt_out_desc = {
33 .bLength = USB_DT_ENDPOINT_SIZE,
34 .bDescriptorType = USB_DT_ENDPOINT,
35
36 .bEndpointAddress = USB_DIR_OUT,
37 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
38 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
39};
40
41static const struct usb_endpoint_descriptor
42ctrl_endpt_in_desc = {
43 .bLength = USB_DT_ENDPOINT_SIZE,
44 .bDescriptorType = USB_DT_ENDPOINT,
45
46 .bEndpointAddress = USB_DIR_IN,
47 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
48 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
49};
50
51/**
52 * hw_ep_bit: calculates the bit number
53 * @num: endpoint number
54 * @dir: endpoint direction
55 *
56 * This function returns bit number
57 */
58static inline int hw_ep_bit(int num, int dir)
59{
60 return num + ((dir == TX) ? 16 : 0);
61}
62
63static inline int ep_to_bit(struct ci_hdrc *ci, int n)
64{
65 int fill = 16 - ci->hw_ep_max / 2;
66
67 if (n >= ci->hw_ep_max / 2)
68 n += fill;
69
70 return n;
71}
72
73/**
74 * hw_device_state: enables/disables interrupts (execute without interruption)
75 * @dma: 0 => disable, !0 => enable and set dma engine
76 *
77 * This function returns an error code
78 */
79static int hw_device_state(struct ci_hdrc *ci, u32 dma)
80{
81 if (dma) {
82 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
83 /* interrupt, error, port change, reset, sleep/suspend */
84 hw_write(ci, OP_USBINTR, ~0,
85 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI);
86 } else {
87 hw_write(ci, OP_USBINTR, ~0, 0);
88 }
89 return 0;
90}
91
92/**
93 * hw_ep_flush: flush endpoint fifo (execute without interruption)
94 * @num: endpoint number
95 * @dir: endpoint direction
96 *
97 * This function returns an error code
98 */
99static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
100{
101 int n = hw_ep_bit(num, dir);
102
103 do {
104 /* flush any pending transfer */
105 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
106 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
107 cpu_relax();
108 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
109
110 return 0;
111}
112
113/**
114 * hw_ep_disable: disables endpoint (execute without interruption)
115 * @num: endpoint number
116 * @dir: endpoint direction
117 *
118 * This function returns an error code
119 */
120static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
121{
122 hw_write(ci, OP_ENDPTCTRL + num,
123 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
124 return 0;
125}
126
127/**
128 * hw_ep_enable: enables endpoint (execute without interruption)
129 * @num: endpoint number
130 * @dir: endpoint direction
131 * @type: endpoint type
132 *
133 * This function returns an error code
134 */
135static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
136{
137 u32 mask, data;
138
139 if (dir == TX) {
140 mask = ENDPTCTRL_TXT; /* type */
141 data = type << __ffs(mask);
142
143 mask |= ENDPTCTRL_TXS; /* unstall */
144 mask |= ENDPTCTRL_TXR; /* reset data toggle */
145 data |= ENDPTCTRL_TXR;
146 mask |= ENDPTCTRL_TXE; /* enable */
147 data |= ENDPTCTRL_TXE;
148 } else {
149 mask = ENDPTCTRL_RXT; /* type */
150 data = type << __ffs(mask);
151
152 mask |= ENDPTCTRL_RXS; /* unstall */
153 mask |= ENDPTCTRL_RXR; /* reset data toggle */
154 data |= ENDPTCTRL_RXR;
155 mask |= ENDPTCTRL_RXE; /* enable */
156 data |= ENDPTCTRL_RXE;
157 }
158 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
159 return 0;
160}
161
162/**
163 * hw_ep_get_halt: return endpoint halt status
164 * @num: endpoint number
165 * @dir: endpoint direction
166 *
167 * This function returns 1 if endpoint halted
168 */
169static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
170{
171 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
172
173 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
174}
175
176/**
177 * hw_ep_prime: primes endpoint (execute without interruption)
178 * @num: endpoint number
179 * @dir: endpoint direction
180 * @is_ctrl: true if control endpoint
181 *
182 * This function returns an error code
183 */
184static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
185{
186 int n = hw_ep_bit(num, dir);
187
188 /* Synchronize before ep prime */
189 wmb();
190
191 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
192 return -EAGAIN;
193
194 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
195
196 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
197 cpu_relax();
198 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
199 return -EAGAIN;
200
201 /* status shoult be tested according with manual but it doesn't work */
202 return 0;
203}
204
205/**
206 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
207 * without interruption)
208 * @num: endpoint number
209 * @dir: endpoint direction
210 * @value: true => stall, false => unstall
211 *
212 * This function returns an error code
213 */
214static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
215{
216 if (value != 0 && value != 1)
217 return -EINVAL;
218
219 do {
220 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
221 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
222 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
223
224 /* data toggle - reserved for EP0 but it's in ESS */
225 hw_write(ci, reg, mask_xs|mask_xr,
226 value ? mask_xs : mask_xr);
227 } while (value != hw_ep_get_halt(ci, num, dir));
228
229 return 0;
230}
231
232/**
233 * hw_is_port_high_speed: test if port is high speed
234 *
235 * This function returns true if high speed port
236 */
237static int hw_port_is_high_speed(struct ci_hdrc *ci)
238{
239 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
240 hw_read(ci, OP_PORTSC, PORTSC_HSP);
241}
242
243/**
244 * hw_test_and_clear_complete: test & clear complete status (execute without
245 * interruption)
246 * @n: endpoint number
247 *
248 * This function returns complete status
249 */
250static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
251{
252 n = ep_to_bit(ci, n);
253 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
254}
255
256/**
257 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
258 * without interruption)
259 *
260 * This function returns active interrutps
261 */
262static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
263{
264 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
265
266 hw_write(ci, OP_USBSTS, ~0, reg);
267 return reg;
268}
269
270/**
271 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
272 * interruption)
273 *
274 * This function returns guard value
275 */
276static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
277{
278 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
279}
280
281/**
282 * hw_test_and_set_setup_guard: test & set setup guard (execute without
283 * interruption)
284 *
285 * This function returns guard value
286 */
287static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
288{
289 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
290}
291
292/**
293 * hw_usb_set_address: configures USB address (execute without interruption)
294 * @value: new USB address
295 *
296 * This function explicitly sets the address, without the "USBADRA" (advance)
297 * feature, which is not supported by older versions of the controller.
298 */
299static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
300{
301 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
302 value << __ffs(DEVICEADDR_USBADR));
303}
304
305/**
306 * hw_usb_reset: restart device after a bus reset (execute without
307 * interruption)
308 *
309 * This function returns an error code
310 */
311static int hw_usb_reset(struct ci_hdrc *ci)
312{
313 hw_usb_set_address(ci, 0);
314
315 /* ESS flushes only at end?!? */
316 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
317
318 /* clear setup token semaphores */
319 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
320
321 /* clear complete status */
322 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
323
324 /* wait until all bits cleared */
325 while (hw_read(ci, OP_ENDPTPRIME, ~0))
326 udelay(10); /* not RTOS friendly */
327
328 /* reset all endpoints ? */
329
330 /* reset internal status and wait for further instructions
331 no need to verify the port reset status (ESS does it) */
332
333 return 0;
334}
335
336/******************************************************************************
337 * UTIL block
338 *****************************************************************************/
339
340static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
341 unsigned length)
342{
343 int i;
344 u32 temp;
345 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
346 GFP_ATOMIC);
347
348 if (node == NULL)
349 return -ENOMEM;
350
351 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
352 if (node->ptr == NULL) {
353 kfree(node);
354 return -ENOMEM;
355 }
356
357 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
358 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
359 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
360 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
361 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
362
363 if (hwreq->req.length == 0
364 || hwreq->req.length % hwep->ep.maxpacket)
365 mul++;
366 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
367 }
368
369 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
370 if (length) {
371 node->ptr->page[0] = cpu_to_le32(temp);
372 for (i = 1; i < TD_PAGE_COUNT; i++) {
373 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
374 page &= ~TD_RESERVED_MASK;
375 node->ptr->page[i] = cpu_to_le32(page);
376 }
377 }
378
379 hwreq->req.actual += length;
380
381 if (!list_empty(&hwreq->tds)) {
382 /* get the last entry */
383 lastnode = list_entry(hwreq->tds.prev,
384 struct td_node, td);
385 lastnode->ptr->next = cpu_to_le32(node->dma);
386 }
387
388 INIT_LIST_HEAD(&node->td);
389 list_add_tail(&node->td, &hwreq->tds);
390
391 return 0;
392}
393
394/**
395 * _usb_addr: calculates endpoint address from direction & number
396 * @ep: endpoint
397 */
398static inline u8 _usb_addr(struct ci_hw_ep *ep)
399{
400 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
401}
402
403/**
404 * _hardware_enqueue: configures a request at hardware level
405 * @hwep: endpoint
406 * @hwreq: request
407 *
408 * This function returns an error code
409 */
410static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
411{
412 struct ci_hdrc *ci = hwep->ci;
413 int ret = 0;
414 unsigned rest = hwreq->req.length;
415 int pages = TD_PAGE_COUNT;
416 struct td_node *firstnode, *lastnode;
417
418 /* don't queue twice */
419 if (hwreq->req.status == -EALREADY)
420 return -EALREADY;
421
422 hwreq->req.status = -EALREADY;
423
424 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
425 &hwreq->req, hwep->dir);
426 if (ret)
427 return ret;
428
429 /*
430 * The first buffer could be not page aligned.
431 * In that case we have to span into one extra td.
432 */
433 if (hwreq->req.dma % PAGE_SIZE)
434 pages--;
435
436 if (rest == 0) {
437 ret = add_td_to_list(hwep, hwreq, 0);
438 if (ret < 0)
439 goto done;
440 }
441
442 while (rest > 0) {
443 unsigned count = min(hwreq->req.length - hwreq->req.actual,
444 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
445 ret = add_td_to_list(hwep, hwreq, count);
446 if (ret < 0)
447 goto done;
448
449 rest -= count;
450 }
451
452 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
453 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
454 ret = add_td_to_list(hwep, hwreq, 0);
455 if (ret < 0)
456 goto done;
457 }
458
459 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
460
461 lastnode = list_entry(hwreq->tds.prev,
462 struct td_node, td);
463
464 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
465 if (!hwreq->req.no_interrupt)
466 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
467 wmb();
468
469 hwreq->req.actual = 0;
470 if (!list_empty(&hwep->qh.queue)) {
471 struct ci_hw_req *hwreqprev;
472 int n = hw_ep_bit(hwep->num, hwep->dir);
473 int tmp_stat;
474 struct td_node *prevlastnode;
475 u32 next = firstnode->dma & TD_ADDR_MASK;
476
477 hwreqprev = list_entry(hwep->qh.queue.prev,
478 struct ci_hw_req, queue);
479 prevlastnode = list_entry(hwreqprev->tds.prev,
480 struct td_node, td);
481
482 prevlastnode->ptr->next = cpu_to_le32(next);
483 wmb();
484 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
485 goto done;
486 do {
487 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
488 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
489 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
490 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
491 if (tmp_stat)
492 goto done;
493 }
494
495 /* QH configuration */
496 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
497 hwep->qh.ptr->td.token &=
498 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
499
500 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
501 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
502
503 if (hwreq->req.length == 0
504 || hwreq->req.length % hwep->ep.maxpacket)
505 mul++;
506 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
507 }
508
509 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
510 hwep->type == USB_ENDPOINT_XFER_CONTROL);
511done:
512 return ret;
513}
514
515/*
516 * free_pending_td: remove a pending request for the endpoint
517 * @hwep: endpoint
518 */
519static void free_pending_td(struct ci_hw_ep *hwep)
520{
521 struct td_node *pending = hwep->pending_td;
522
523 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
524 hwep->pending_td = NULL;
525 kfree(pending);
526}
527
528static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
529 struct td_node *node)
530{
531 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
532 hwep->qh.ptr->td.token &=
533 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
534
535 return hw_ep_prime(ci, hwep->num, hwep->dir,
536 hwep->type == USB_ENDPOINT_XFER_CONTROL);
537}
538
539/**
540 * _hardware_dequeue: handles a request at hardware level
541 * @gadget: gadget
542 * @hwep: endpoint
543 *
544 * This function returns an error code
545 */
546static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
547{
548 u32 tmptoken;
549 struct td_node *node, *tmpnode;
550 unsigned remaining_length;
551 unsigned actual = hwreq->req.length;
552 struct ci_hdrc *ci = hwep->ci;
553
554 if (hwreq->req.status != -EALREADY)
555 return -EINVAL;
556
557 hwreq->req.status = 0;
558
559 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
560 tmptoken = le32_to_cpu(node->ptr->token);
561 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
562 int n = hw_ep_bit(hwep->num, hwep->dir);
563
564 if (ci->rev == CI_REVISION_24)
565 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
566 reprime_dtd(ci, hwep, node);
567 hwreq->req.status = -EALREADY;
568 return -EBUSY;
569 }
570
571 remaining_length = (tmptoken & TD_TOTAL_BYTES);
572 remaining_length >>= __ffs(TD_TOTAL_BYTES);
573 actual -= remaining_length;
574
575 hwreq->req.status = tmptoken & TD_STATUS;
576 if ((TD_STATUS_HALTED & hwreq->req.status)) {
577 hwreq->req.status = -EPIPE;
578 break;
579 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
580 hwreq->req.status = -EPROTO;
581 break;
582 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
583 hwreq->req.status = -EILSEQ;
584 break;
585 }
586
587 if (remaining_length) {
588 if (hwep->dir == TX) {
589 hwreq->req.status = -EPROTO;
590 break;
591 }
592 }
593 /*
594 * As the hardware could still address the freed td
595 * which will run the udc unusable, the cleanup of the
596 * td has to be delayed by one.
597 */
598 if (hwep->pending_td)
599 free_pending_td(hwep);
600
601 hwep->pending_td = node;
602 list_del_init(&node->td);
603 }
604
605 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
606 &hwreq->req, hwep->dir);
607
608 hwreq->req.actual += actual;
609
610 if (hwreq->req.status)
611 return hwreq->req.status;
612
613 return hwreq->req.actual;
614}
615
616/**
617 * _ep_nuke: dequeues all endpoint requests
618 * @hwep: endpoint
619 *
620 * This function returns an error code
621 * Caller must hold lock
622 */
623static int _ep_nuke(struct ci_hw_ep *hwep)
624__releases(hwep->lock)
625__acquires(hwep->lock)
626{
627 struct td_node *node, *tmpnode;
628 if (hwep == NULL)
629 return -EINVAL;
630
631 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
632
633 while (!list_empty(&hwep->qh.queue)) {
634
635 /* pop oldest request */
636 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
637 struct ci_hw_req, queue);
638
639 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
640 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
641 list_del_init(&node->td);
642 node->ptr = NULL;
643 kfree(node);
644 }
645
646 list_del_init(&hwreq->queue);
647 hwreq->req.status = -ESHUTDOWN;
648
649 if (hwreq->req.complete != NULL) {
650 spin_unlock(hwep->lock);
651 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
652 spin_lock(hwep->lock);
653 }
654 }
655
656 if (hwep->pending_td)
657 free_pending_td(hwep);
658
659 return 0;
660}
661
662static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
663{
664 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
665 int direction, retval = 0;
666 unsigned long flags;
667
668 if (ep == NULL || hwep->ep.desc == NULL)
669 return -EINVAL;
670
671 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
672 return -EOPNOTSUPP;
673
674 spin_lock_irqsave(hwep->lock, flags);
675
676 if (value && hwep->dir == TX && check_transfer &&
677 !list_empty(&hwep->qh.queue) &&
678 !usb_endpoint_xfer_control(hwep->ep.desc)) {
679 spin_unlock_irqrestore(hwep->lock, flags);
680 return -EAGAIN;
681 }
682
683 direction = hwep->dir;
684 do {
685 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
686
687 if (!value)
688 hwep->wedge = 0;
689
690 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
691 hwep->dir = (hwep->dir == TX) ? RX : TX;
692
693 } while (hwep->dir != direction);
694
695 spin_unlock_irqrestore(hwep->lock, flags);
696 return retval;
697}
698
699
700/**
701 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
702 * @gadget: gadget
703 *
704 * This function returns an error code
705 */
706static int _gadget_stop_activity(struct usb_gadget *gadget)
707{
708 struct usb_ep *ep;
709 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
710 unsigned long flags;
711
712 /* flush all endpoints */
713 gadget_for_each_ep(ep, gadget) {
714 usb_ep_fifo_flush(ep);
715 }
716 usb_ep_fifo_flush(&ci->ep0out->ep);
717 usb_ep_fifo_flush(&ci->ep0in->ep);
718
719 /* make sure to disable all endpoints */
720 gadget_for_each_ep(ep, gadget) {
721 usb_ep_disable(ep);
722 }
723
724 if (ci->status != NULL) {
725 usb_ep_free_request(&ci->ep0in->ep, ci->status);
726 ci->status = NULL;
727 }
728
729 spin_lock_irqsave(&ci->lock, flags);
730 ci->gadget.speed = USB_SPEED_UNKNOWN;
731 ci->remote_wakeup = 0;
732 ci->suspended = 0;
733 spin_unlock_irqrestore(&ci->lock, flags);
734
735 return 0;
736}
737
738/******************************************************************************
739 * ISR block
740 *****************************************************************************/
741/**
742 * isr_reset_handler: USB reset interrupt handler
743 * @ci: UDC device
744 *
745 * This function resets USB engine after a bus reset occurred
746 */
747static void isr_reset_handler(struct ci_hdrc *ci)
748__releases(ci->lock)
749__acquires(ci->lock)
750{
751 int retval;
752 u32 intr;
753
754 spin_unlock(&ci->lock);
755 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
756 usb_gadget_udc_reset(&ci->gadget, ci->driver);
757
758 retval = _gadget_stop_activity(&ci->gadget);
759 if (retval)
760 goto done;
761
762 retval = hw_usb_reset(ci);
763 if (retval)
764 goto done;
765
766 /* clear SLI */
767 hw_write(ci, OP_USBSTS, USBi_SLI, USBi_SLI);
768 intr = hw_read(ci, OP_USBINTR, ~0);
769 hw_write(ci, OP_USBINTR, ~0, intr | USBi_SLI);
770
771 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
772 if (ci->status == NULL)
773 retval = -ENOMEM;
774
775done:
776 spin_lock(&ci->lock);
777
778 if (retval)
779 dev_err(ci->dev, "error: %i\n", retval);
780}
781
782/**
783 * isr_get_status_complete: get_status request complete function
784 * @ep: endpoint
785 * @req: request handled
786 *
787 * Caller must release lock
788 */
789static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
790{
791 if (ep == NULL || req == NULL)
792 return;
793
794 kfree(req->buf);
795 usb_ep_free_request(ep, req);
796}
797
798/**
799 * _ep_queue: queues (submits) an I/O request to an endpoint
800 * @ep: endpoint
801 * @req: request
802 * @gfp_flags: GFP flags (not used)
803 *
804 * Caller must hold lock
805 * This function returns an error code
806 */
807static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
808 gfp_t __maybe_unused gfp_flags)
809{
810 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
811 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
812 struct ci_hdrc *ci = hwep->ci;
813 int retval = 0;
814
815 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
816 return -EINVAL;
817
818 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
819 if (req->length)
820 hwep = (ci->ep0_dir == RX) ?
821 ci->ep0out : ci->ep0in;
822 if (!list_empty(&hwep->qh.queue)) {
823 _ep_nuke(hwep);
824 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
825 _usb_addr(hwep));
826 }
827 }
828
829 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
830 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
831 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
832 return -EMSGSIZE;
833 }
834
835 /* first nuke then test link, e.g. previous status has not sent */
836 if (!list_empty(&hwreq->queue)) {
837 dev_err(hwep->ci->dev, "request already in queue\n");
838 return -EBUSY;
839 }
840
841 /* push request */
842 hwreq->req.status = -EINPROGRESS;
843 hwreq->req.actual = 0;
844
845 retval = _hardware_enqueue(hwep, hwreq);
846
847 if (retval == -EALREADY)
848 retval = 0;
849 if (!retval)
850 list_add_tail(&hwreq->queue, &hwep->qh.queue);
851
852 return retval;
853}
854
855/**
856 * isr_get_status_response: get_status request response
857 * @ci: ci struct
858 * @setup: setup request packet
859 *
860 * This function returns an error code
861 */
862static int isr_get_status_response(struct ci_hdrc *ci,
863 struct usb_ctrlrequest *setup)
864__releases(hwep->lock)
865__acquires(hwep->lock)
866{
867 struct ci_hw_ep *hwep = ci->ep0in;
868 struct usb_request *req = NULL;
869 gfp_t gfp_flags = GFP_ATOMIC;
870 int dir, num, retval;
871
872 if (hwep == NULL || setup == NULL)
873 return -EINVAL;
874
875 spin_unlock(hwep->lock);
876 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
877 spin_lock(hwep->lock);
878 if (req == NULL)
879 return -ENOMEM;
880
881 req->complete = isr_get_status_complete;
882 req->length = 2;
883 req->buf = kzalloc(req->length, gfp_flags);
884 if (req->buf == NULL) {
885 retval = -ENOMEM;
886 goto err_free_req;
887 }
888
889 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
890 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
891 ci->gadget.is_selfpowered;
892 } else if ((setup->bRequestType & USB_RECIP_MASK) \
893 == USB_RECIP_ENDPOINT) {
894 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
895 TX : RX;
896 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
897 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
898 }
899 /* else do nothing; reserved for future use */
900
901 retval = _ep_queue(&hwep->ep, req, gfp_flags);
902 if (retval)
903 goto err_free_buf;
904
905 return 0;
906
907 err_free_buf:
908 kfree(req->buf);
909 err_free_req:
910 spin_unlock(hwep->lock);
911 usb_ep_free_request(&hwep->ep, req);
912 spin_lock(hwep->lock);
913 return retval;
914}
915
916/**
917 * isr_setup_status_complete: setup_status request complete function
918 * @ep: endpoint
919 * @req: request handled
920 *
921 * Caller must release lock. Put the port in test mode if test mode
922 * feature is selected.
923 */
924static void
925isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
926{
927 struct ci_hdrc *ci = req->context;
928 unsigned long flags;
929
930 if (req->status < 0)
931 return;
932
933 if (ci->setaddr) {
934 hw_usb_set_address(ci, ci->address);
935 ci->setaddr = false;
936 if (ci->address)
937 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
938 }
939
940 spin_lock_irqsave(&ci->lock, flags);
941 if (ci->test_mode)
942 hw_port_test_set(ci, ci->test_mode);
943 spin_unlock_irqrestore(&ci->lock, flags);
944}
945
946/**
947 * isr_setup_status_phase: queues the status phase of a setup transation
948 * @ci: ci struct
949 *
950 * This function returns an error code
951 */
952static int isr_setup_status_phase(struct ci_hdrc *ci)
953{
954 struct ci_hw_ep *hwep;
955
956 /*
957 * Unexpected USB controller behavior, caused by bad signal integrity
958 * or ground reference problems, can lead to isr_setup_status_phase
959 * being called with ci->status equal to NULL.
960 * If this situation occurs, you should review your USB hardware design.
961 */
962 if (WARN_ON_ONCE(!ci->status))
963 return -EPIPE;
964
965 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
966 ci->status->context = ci;
967 ci->status->complete = isr_setup_status_complete;
968
969 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
970}
971
972/**
973 * isr_tr_complete_low: transaction complete low level handler
974 * @hwep: endpoint
975 *
976 * This function returns an error code
977 * Caller must hold lock
978 */
979static int isr_tr_complete_low(struct ci_hw_ep *hwep)
980__releases(hwep->lock)
981__acquires(hwep->lock)
982{
983 struct ci_hw_req *hwreq, *hwreqtemp;
984 struct ci_hw_ep *hweptemp = hwep;
985 int retval = 0;
986
987 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
988 queue) {
989 retval = _hardware_dequeue(hwep, hwreq);
990 if (retval < 0)
991 break;
992 list_del_init(&hwreq->queue);
993 if (hwreq->req.complete != NULL) {
994 spin_unlock(hwep->lock);
995 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
996 hwreq->req.length)
997 hweptemp = hwep->ci->ep0in;
998 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
999 spin_lock(hwep->lock);
1000 }
1001 }
1002
1003 if (retval == -EBUSY)
1004 retval = 0;
1005
1006 return retval;
1007}
1008
1009static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1010{
1011 dev_warn(&ci->gadget.dev,
1012 "connect the device to an alternate port if you want HNP\n");
1013 return isr_setup_status_phase(ci);
1014}
1015
1016/**
1017 * isr_setup_packet_handler: setup packet handler
1018 * @ci: UDC descriptor
1019 *
1020 * This function handles setup packet
1021 */
1022static void isr_setup_packet_handler(struct ci_hdrc *ci)
1023__releases(ci->lock)
1024__acquires(ci->lock)
1025{
1026 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1027 struct usb_ctrlrequest req;
1028 int type, num, dir, err = -EINVAL;
1029 u8 tmode = 0;
1030
1031 /*
1032 * Flush data and handshake transactions of previous
1033 * setup packet.
1034 */
1035 _ep_nuke(ci->ep0out);
1036 _ep_nuke(ci->ep0in);
1037
1038 /* read_setup_packet */
1039 do {
1040 hw_test_and_set_setup_guard(ci);
1041 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1042 } while (!hw_test_and_clear_setup_guard(ci));
1043
1044 type = req.bRequestType;
1045
1046 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1047
1048 switch (req.bRequest) {
1049 case USB_REQ_CLEAR_FEATURE:
1050 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1051 le16_to_cpu(req.wValue) ==
1052 USB_ENDPOINT_HALT) {
1053 if (req.wLength != 0)
1054 break;
1055 num = le16_to_cpu(req.wIndex);
1056 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1057 num &= USB_ENDPOINT_NUMBER_MASK;
1058 if (dir == TX)
1059 num += ci->hw_ep_max / 2;
1060 if (!ci->ci_hw_ep[num].wedge) {
1061 spin_unlock(&ci->lock);
1062 err = usb_ep_clear_halt(
1063 &ci->ci_hw_ep[num].ep);
1064 spin_lock(&ci->lock);
1065 if (err)
1066 break;
1067 }
1068 err = isr_setup_status_phase(ci);
1069 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1070 le16_to_cpu(req.wValue) ==
1071 USB_DEVICE_REMOTE_WAKEUP) {
1072 if (req.wLength != 0)
1073 break;
1074 ci->remote_wakeup = 0;
1075 err = isr_setup_status_phase(ci);
1076 } else {
1077 goto delegate;
1078 }
1079 break;
1080 case USB_REQ_GET_STATUS:
1081 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1082 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1083 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1084 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1085 goto delegate;
1086 if (le16_to_cpu(req.wLength) != 2 ||
1087 le16_to_cpu(req.wValue) != 0)
1088 break;
1089 err = isr_get_status_response(ci, &req);
1090 break;
1091 case USB_REQ_SET_ADDRESS:
1092 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1093 goto delegate;
1094 if (le16_to_cpu(req.wLength) != 0 ||
1095 le16_to_cpu(req.wIndex) != 0)
1096 break;
1097 ci->address = (u8)le16_to_cpu(req.wValue);
1098 ci->setaddr = true;
1099 err = isr_setup_status_phase(ci);
1100 break;
1101 case USB_REQ_SET_FEATURE:
1102 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1103 le16_to_cpu(req.wValue) ==
1104 USB_ENDPOINT_HALT) {
1105 if (req.wLength != 0)
1106 break;
1107 num = le16_to_cpu(req.wIndex);
1108 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1109 num &= USB_ENDPOINT_NUMBER_MASK;
1110 if (dir == TX)
1111 num += ci->hw_ep_max / 2;
1112
1113 spin_unlock(&ci->lock);
1114 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1115 spin_lock(&ci->lock);
1116 if (!err)
1117 isr_setup_status_phase(ci);
1118 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1119 if (req.wLength != 0)
1120 break;
1121 switch (le16_to_cpu(req.wValue)) {
1122 case USB_DEVICE_REMOTE_WAKEUP:
1123 ci->remote_wakeup = 1;
1124 err = isr_setup_status_phase(ci);
1125 break;
1126 case USB_DEVICE_TEST_MODE:
1127 tmode = le16_to_cpu(req.wIndex) >> 8;
1128 switch (tmode) {
1129 case TEST_J:
1130 case TEST_K:
1131 case TEST_SE0_NAK:
1132 case TEST_PACKET:
1133 case TEST_FORCE_EN:
1134 ci->test_mode = tmode;
1135 err = isr_setup_status_phase(
1136 ci);
1137 break;
1138 default:
1139 break;
1140 }
1141 break;
1142 case USB_DEVICE_B_HNP_ENABLE:
1143 if (ci_otg_is_fsm_mode(ci)) {
1144 ci->gadget.b_hnp_enable = 1;
1145 err = isr_setup_status_phase(
1146 ci);
1147 }
1148 break;
1149 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1150 if (ci_otg_is_fsm_mode(ci))
1151 err = otg_a_alt_hnp_support(ci);
1152 break;
1153 case USB_DEVICE_A_HNP_SUPPORT:
1154 if (ci_otg_is_fsm_mode(ci)) {
1155 ci->gadget.a_hnp_support = 1;
1156 err = isr_setup_status_phase(
1157 ci);
1158 }
1159 break;
1160 default:
1161 goto delegate;
1162 }
1163 } else {
1164 goto delegate;
1165 }
1166 break;
1167 default:
1168delegate:
1169 if (req.wLength == 0) /* no data phase */
1170 ci->ep0_dir = TX;
1171
1172 spin_unlock(&ci->lock);
1173 err = ci->driver->setup(&ci->gadget, &req);
1174 spin_lock(&ci->lock);
1175 break;
1176 }
1177
1178 if (err < 0) {
1179 spin_unlock(&ci->lock);
1180 if (_ep_set_halt(&hwep->ep, 1, false))
1181 dev_err(ci->dev, "error: _ep_set_halt\n");
1182 spin_lock(&ci->lock);
1183 }
1184}
1185
1186/**
1187 * isr_tr_complete_handler: transaction complete interrupt handler
1188 * @ci: UDC descriptor
1189 *
1190 * This function handles traffic events
1191 */
1192static void isr_tr_complete_handler(struct ci_hdrc *ci)
1193__releases(ci->lock)
1194__acquires(ci->lock)
1195{
1196 unsigned i;
1197 int err;
1198
1199 for (i = 0; i < ci->hw_ep_max; i++) {
1200 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1201
1202 if (hwep->ep.desc == NULL)
1203 continue; /* not configured */
1204
1205 if (hw_test_and_clear_complete(ci, i)) {
1206 err = isr_tr_complete_low(hwep);
1207 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1208 if (err > 0) /* needs status phase */
1209 err = isr_setup_status_phase(ci);
1210 if (err < 0) {
1211 spin_unlock(&ci->lock);
1212 if (_ep_set_halt(&hwep->ep, 1, false))
1213 dev_err(ci->dev,
1214 "error: _ep_set_halt\n");
1215 spin_lock(&ci->lock);
1216 }
1217 }
1218 }
1219
1220 /* Only handle setup packet below */
1221 if (i == 0 &&
1222 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1223 isr_setup_packet_handler(ci);
1224 }
1225}
1226
1227/******************************************************************************
1228 * ENDPT block
1229 *****************************************************************************/
1230/**
1231 * ep_enable: configure endpoint, making it usable
1232 *
1233 * Check usb_ep_enable() at "usb_gadget.h" for details
1234 */
1235static int ep_enable(struct usb_ep *ep,
1236 const struct usb_endpoint_descriptor *desc)
1237{
1238 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1239 int retval = 0;
1240 unsigned long flags;
1241 u32 cap = 0;
1242
1243 if (ep == NULL || desc == NULL)
1244 return -EINVAL;
1245
1246 spin_lock_irqsave(hwep->lock, flags);
1247
1248 /* only internal SW should enable ctrl endpts */
1249
1250 if (!list_empty(&hwep->qh.queue)) {
1251 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1252 spin_unlock_irqrestore(hwep->lock, flags);
1253 return -EBUSY;
1254 }
1255
1256 hwep->ep.desc = desc;
1257
1258 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1259 hwep->num = usb_endpoint_num(desc);
1260 hwep->type = usb_endpoint_type(desc);
1261
1262 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1263 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1264
1265 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1266 cap |= QH_IOS;
1267
1268 cap |= QH_ZLT;
1269 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1270 /*
1271 * For ISO-TX, we set mult at QH as the largest value, and use
1272 * MultO at TD as real mult value.
1273 */
1274 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1275 cap |= 3 << __ffs(QH_MULT);
1276
1277 hwep->qh.ptr->cap = cpu_to_le32(cap);
1278
1279 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1280
1281 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1282 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1283 retval = -EINVAL;
1284 }
1285
1286 /*
1287 * Enable endpoints in the HW other than ep0 as ep0
1288 * is always enabled
1289 */
1290 if (hwep->num)
1291 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1292 hwep->type);
1293
1294 spin_unlock_irqrestore(hwep->lock, flags);
1295 return retval;
1296}
1297
1298/**
1299 * ep_disable: endpoint is no longer usable
1300 *
1301 * Check usb_ep_disable() at "usb_gadget.h" for details
1302 */
1303static int ep_disable(struct usb_ep *ep)
1304{
1305 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1306 int direction, retval = 0;
1307 unsigned long flags;
1308
1309 if (ep == NULL)
1310 return -EINVAL;
1311 else if (hwep->ep.desc == NULL)
1312 return -EBUSY;
1313
1314 spin_lock_irqsave(hwep->lock, flags);
1315 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1316 spin_unlock_irqrestore(hwep->lock, flags);
1317 return 0;
1318 }
1319
1320 /* only internal SW should disable ctrl endpts */
1321
1322 direction = hwep->dir;
1323 do {
1324 retval |= _ep_nuke(hwep);
1325 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1326
1327 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1328 hwep->dir = (hwep->dir == TX) ? RX : TX;
1329
1330 } while (hwep->dir != direction);
1331
1332 hwep->ep.desc = NULL;
1333
1334 spin_unlock_irqrestore(hwep->lock, flags);
1335 return retval;
1336}
1337
1338/**
1339 * ep_alloc_request: allocate a request object to use with this endpoint
1340 *
1341 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1342 */
1343static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1344{
1345 struct ci_hw_req *hwreq = NULL;
1346
1347 if (ep == NULL)
1348 return NULL;
1349
1350 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1351 if (hwreq != NULL) {
1352 INIT_LIST_HEAD(&hwreq->queue);
1353 INIT_LIST_HEAD(&hwreq->tds);
1354 }
1355
1356 return (hwreq == NULL) ? NULL : &hwreq->req;
1357}
1358
1359/**
1360 * ep_free_request: frees a request object
1361 *
1362 * Check usb_ep_free_request() at "usb_gadget.h" for details
1363 */
1364static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1365{
1366 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1367 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1368 struct td_node *node, *tmpnode;
1369 unsigned long flags;
1370
1371 if (ep == NULL || req == NULL) {
1372 return;
1373 } else if (!list_empty(&hwreq->queue)) {
1374 dev_err(hwep->ci->dev, "freeing queued request\n");
1375 return;
1376 }
1377
1378 spin_lock_irqsave(hwep->lock, flags);
1379
1380 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1381 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1382 list_del_init(&node->td);
1383 node->ptr = NULL;
1384 kfree(node);
1385 }
1386
1387 kfree(hwreq);
1388
1389 spin_unlock_irqrestore(hwep->lock, flags);
1390}
1391
1392/**
1393 * ep_queue: queues (submits) an I/O request to an endpoint
1394 *
1395 * Check usb_ep_queue()* at usb_gadget.h" for details
1396 */
1397static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1398 gfp_t __maybe_unused gfp_flags)
1399{
1400 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1401 int retval = 0;
1402 unsigned long flags;
1403
1404 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1405 return -EINVAL;
1406
1407 spin_lock_irqsave(hwep->lock, flags);
1408 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1409 spin_unlock_irqrestore(hwep->lock, flags);
1410 return 0;
1411 }
1412 retval = _ep_queue(ep, req, gfp_flags);
1413 spin_unlock_irqrestore(hwep->lock, flags);
1414 return retval;
1415}
1416
1417/**
1418 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1419 *
1420 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1421 */
1422static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1423{
1424 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1425 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1426 unsigned long flags;
1427 struct td_node *node, *tmpnode;
1428
1429 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1430 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1431 list_empty(&hwep->qh.queue))
1432 return -EINVAL;
1433
1434 spin_lock_irqsave(hwep->lock, flags);
1435 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1436 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1437
1438 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1439 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1440 list_del(&node->td);
1441 kfree(node);
1442 }
1443
1444 /* pop request */
1445 list_del_init(&hwreq->queue);
1446
1447 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1448
1449 req->status = -ECONNRESET;
1450
1451 if (hwreq->req.complete != NULL) {
1452 spin_unlock(hwep->lock);
1453 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1454 spin_lock(hwep->lock);
1455 }
1456
1457 spin_unlock_irqrestore(hwep->lock, flags);
1458 return 0;
1459}
1460
1461/**
1462 * ep_set_halt: sets the endpoint halt feature
1463 *
1464 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1465 */
1466static int ep_set_halt(struct usb_ep *ep, int value)
1467{
1468 return _ep_set_halt(ep, value, true);
1469}
1470
1471/**
1472 * ep_set_wedge: sets the halt feature and ignores clear requests
1473 *
1474 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1475 */
1476static int ep_set_wedge(struct usb_ep *ep)
1477{
1478 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1479 unsigned long flags;
1480
1481 if (ep == NULL || hwep->ep.desc == NULL)
1482 return -EINVAL;
1483
1484 spin_lock_irqsave(hwep->lock, flags);
1485 hwep->wedge = 1;
1486 spin_unlock_irqrestore(hwep->lock, flags);
1487
1488 return usb_ep_set_halt(ep);
1489}
1490
1491/**
1492 * ep_fifo_flush: flushes contents of a fifo
1493 *
1494 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1495 */
1496static void ep_fifo_flush(struct usb_ep *ep)
1497{
1498 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1499 unsigned long flags;
1500
1501 if (ep == NULL) {
1502 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1503 return;
1504 }
1505
1506 spin_lock_irqsave(hwep->lock, flags);
1507 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1508 spin_unlock_irqrestore(hwep->lock, flags);
1509 return;
1510 }
1511
1512 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1513
1514 spin_unlock_irqrestore(hwep->lock, flags);
1515}
1516
1517/**
1518 * Endpoint-specific part of the API to the USB controller hardware
1519 * Check "usb_gadget.h" for details
1520 */
1521static const struct usb_ep_ops usb_ep_ops = {
1522 .enable = ep_enable,
1523 .disable = ep_disable,
1524 .alloc_request = ep_alloc_request,
1525 .free_request = ep_free_request,
1526 .queue = ep_queue,
1527 .dequeue = ep_dequeue,
1528 .set_halt = ep_set_halt,
1529 .set_wedge = ep_set_wedge,
1530 .fifo_flush = ep_fifo_flush,
1531};
1532
1533/******************************************************************************
1534 * GADGET block
1535 *****************************************************************************/
1536static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1537{
1538 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1539 unsigned long flags;
1540 int gadget_ready = 0;
1541
1542 spin_lock_irqsave(&ci->lock, flags);
1543 ci->vbus_active = is_active;
1544 if (ci->driver)
1545 gadget_ready = 1;
1546 spin_unlock_irqrestore(&ci->lock, flags);
1547
1548 if (ci->usb_phy)
1549 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1550 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1551
1552 if (gadget_ready) {
1553 if (is_active) {
1554 pm_runtime_get_sync(&_gadget->dev);
1555 hw_device_reset(ci);
1556 hw_device_state(ci, ci->ep0out->qh.dma);
1557 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1558 usb_udc_vbus_handler(_gadget, true);
1559 } else {
1560 usb_udc_vbus_handler(_gadget, false);
1561 if (ci->driver)
1562 ci->driver->disconnect(&ci->gadget);
1563 hw_device_state(ci, 0);
1564 if (ci->platdata->notify_event)
1565 ci->platdata->notify_event(ci,
1566 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1567 _gadget_stop_activity(&ci->gadget);
1568 pm_runtime_put_sync(&_gadget->dev);
1569 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1570 }
1571 }
1572
1573 return 0;
1574}
1575
1576static int ci_udc_wakeup(struct usb_gadget *_gadget)
1577{
1578 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1579 unsigned long flags;
1580 int ret = 0;
1581
1582 spin_lock_irqsave(&ci->lock, flags);
1583 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1584 spin_unlock_irqrestore(&ci->lock, flags);
1585 return 0;
1586 }
1587 if (!ci->remote_wakeup) {
1588 ret = -EOPNOTSUPP;
1589 goto out;
1590 }
1591 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1592 ret = -EINVAL;
1593 goto out;
1594 }
1595 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1596out:
1597 spin_unlock_irqrestore(&ci->lock, flags);
1598 return ret;
1599}
1600
1601static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1602{
1603 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1604
1605 if (ci->usb_phy)
1606 return usb_phy_set_power(ci->usb_phy, ma);
1607 return -ENOTSUPP;
1608}
1609
1610static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1611{
1612 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1613 struct ci_hw_ep *hwep = ci->ep0in;
1614 unsigned long flags;
1615
1616 spin_lock_irqsave(hwep->lock, flags);
1617 _gadget->is_selfpowered = (is_on != 0);
1618 spin_unlock_irqrestore(hwep->lock, flags);
1619
1620 return 0;
1621}
1622
1623/* Change Data+ pullup status
1624 * this func is used by usb_gadget_connect/disconnet
1625 */
1626static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1627{
1628 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1629
1630 /*
1631 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1632 * and don't touch Data+ in host mode for dual role config.
1633 */
1634 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1635 return 0;
1636
1637 pm_runtime_get_sync(&ci->gadget.dev);
1638 if (is_on)
1639 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1640 else
1641 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1642 pm_runtime_put_sync(&ci->gadget.dev);
1643
1644 return 0;
1645}
1646
1647static int ci_udc_start(struct usb_gadget *gadget,
1648 struct usb_gadget_driver *driver);
1649static int ci_udc_stop(struct usb_gadget *gadget);
1650
1651/* Match ISOC IN from the highest endpoint */
1652static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1653 struct usb_endpoint_descriptor *desc,
1654 struct usb_ss_ep_comp_descriptor *comp_desc)
1655{
1656 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1657 struct usb_ep *ep;
1658
1659 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1660 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1661 if (ep->caps.dir_in && !ep->claimed)
1662 return ep;
1663 }
1664 }
1665
1666 return NULL;
1667}
1668
1669/**
1670 * Device operations part of the API to the USB controller hardware,
1671 * which don't involve endpoints (or i/o)
1672 * Check "usb_gadget.h" for details
1673 */
1674static const struct usb_gadget_ops usb_gadget_ops = {
1675 .vbus_session = ci_udc_vbus_session,
1676 .wakeup = ci_udc_wakeup,
1677 .set_selfpowered = ci_udc_selfpowered,
1678 .pullup = ci_udc_pullup,
1679 .vbus_draw = ci_udc_vbus_draw,
1680 .udc_start = ci_udc_start,
1681 .udc_stop = ci_udc_stop,
1682 .match_ep = ci_udc_match_ep,
1683};
1684
1685static int init_eps(struct ci_hdrc *ci)
1686{
1687 int retval = 0, i, j;
1688
1689 for (i = 0; i < ci->hw_ep_max/2; i++)
1690 for (j = RX; j <= TX; j++) {
1691 int k = i + j * ci->hw_ep_max/2;
1692 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1693
1694 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1695 (j == TX) ? "in" : "out");
1696
1697 hwep->ci = ci;
1698 hwep->lock = &ci->lock;
1699 hwep->td_pool = ci->td_pool;
1700
1701 hwep->ep.name = hwep->name;
1702 hwep->ep.ops = &usb_ep_ops;
1703
1704 if (i == 0) {
1705 hwep->ep.caps.type_control = true;
1706 } else {
1707 hwep->ep.caps.type_iso = true;
1708 hwep->ep.caps.type_bulk = true;
1709 hwep->ep.caps.type_int = true;
1710 }
1711
1712 if (j == TX)
1713 hwep->ep.caps.dir_in = true;
1714 else
1715 hwep->ep.caps.dir_out = true;
1716
1717 /*
1718 * for ep0: maxP defined in desc, for other
1719 * eps, maxP is set by epautoconfig() called
1720 * by gadget layer
1721 */
1722 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1723
1724 INIT_LIST_HEAD(&hwep->qh.queue);
1725 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1726 &hwep->qh.dma);
1727 if (hwep->qh.ptr == NULL)
1728 retval = -ENOMEM;
1729
1730 /*
1731 * set up shorthands for ep0 out and in endpoints,
1732 * don't add to gadget's ep_list
1733 */
1734 if (i == 0) {
1735 if (j == RX)
1736 ci->ep0out = hwep;
1737 else
1738 ci->ep0in = hwep;
1739
1740 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1741 continue;
1742 }
1743
1744 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1745 }
1746
1747 return retval;
1748}
1749
1750static void destroy_eps(struct ci_hdrc *ci)
1751{
1752 int i;
1753
1754 for (i = 0; i < ci->hw_ep_max; i++) {
1755 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1756
1757 if (hwep->pending_td)
1758 free_pending_td(hwep);
1759 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1760 }
1761}
1762
1763/**
1764 * ci_udc_start: register a gadget driver
1765 * @gadget: our gadget
1766 * @driver: the driver being registered
1767 *
1768 * Interrupts are enabled here.
1769 */
1770static int ci_udc_start(struct usb_gadget *gadget,
1771 struct usb_gadget_driver *driver)
1772{
1773 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1774 int retval;
1775
1776 if (driver->disconnect == NULL)
1777 return -EINVAL;
1778
1779 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1780 retval = usb_ep_enable(&ci->ep0out->ep);
1781 if (retval)
1782 return retval;
1783
1784 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1785 retval = usb_ep_enable(&ci->ep0in->ep);
1786 if (retval)
1787 return retval;
1788
1789 ci->driver = driver;
1790
1791 /* Start otg fsm for B-device */
1792 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1793 ci_hdrc_otg_fsm_start(ci);
1794 return retval;
1795 }
1796
1797 pm_runtime_get_sync(&ci->gadget.dev);
1798 if (ci->vbus_active) {
1799 hw_device_reset(ci);
1800 } else {
1801 usb_udc_vbus_handler(&ci->gadget, false);
1802 pm_runtime_put_sync(&ci->gadget.dev);
1803 return retval;
1804 }
1805
1806 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1807 if (retval)
1808 pm_runtime_put_sync(&ci->gadget.dev);
1809
1810 return retval;
1811}
1812
1813static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1814{
1815 if (!ci_otg_is_fsm_mode(ci))
1816 return;
1817
1818 mutex_lock(&ci->fsm.lock);
1819 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1820 ci->fsm.a_bidl_adis_tmout = 1;
1821 ci_hdrc_otg_fsm_start(ci);
1822 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1823 ci->fsm.protocol = PROTO_UNDEF;
1824 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1825 }
1826 mutex_unlock(&ci->fsm.lock);
1827}
1828
1829/**
1830 * ci_udc_stop: unregister a gadget driver
1831 */
1832static int ci_udc_stop(struct usb_gadget *gadget)
1833{
1834 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1835 unsigned long flags;
1836
1837 spin_lock_irqsave(&ci->lock, flags);
1838
1839 if (ci->vbus_active) {
1840 hw_device_state(ci, 0);
1841 spin_unlock_irqrestore(&ci->lock, flags);
1842 if (ci->platdata->notify_event)
1843 ci->platdata->notify_event(ci,
1844 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1845 _gadget_stop_activity(&ci->gadget);
1846 spin_lock_irqsave(&ci->lock, flags);
1847 pm_runtime_put(&ci->gadget.dev);
1848 }
1849
1850 ci->driver = NULL;
1851 spin_unlock_irqrestore(&ci->lock, flags);
1852
1853 ci_udc_stop_for_otg_fsm(ci);
1854 return 0;
1855}
1856
1857/******************************************************************************
1858 * BUS block
1859 *****************************************************************************/
1860/**
1861 * udc_irq: ci interrupt handler
1862 *
1863 * This function returns IRQ_HANDLED if the IRQ has been handled
1864 * It locks access to registers
1865 */
1866static irqreturn_t udc_irq(struct ci_hdrc *ci)
1867{
1868 irqreturn_t retval;
1869 u32 intr;
1870
1871 if (ci == NULL)
1872 return IRQ_HANDLED;
1873
1874 spin_lock(&ci->lock);
1875
1876 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1877 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1878 USBMODE_CM_DC) {
1879 spin_unlock(&ci->lock);
1880 return IRQ_NONE;
1881 }
1882 }
1883 intr = hw_test_and_clear_intr_active(ci);
1884
1885 if (intr) {
1886 /* order defines priority - do NOT change it */
1887 if (USBi_URI & intr)
1888 isr_reset_handler(ci);
1889
1890 if (USBi_PCI & intr) {
1891 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1892 USB_SPEED_HIGH : USB_SPEED_FULL;
1893 if (ci->suspended) {
1894 if (ci->driver->resume) {
1895 spin_unlock(&ci->lock);
1896 ci->driver->resume(&ci->gadget);
1897 spin_lock(&ci->lock);
1898 }
1899 ci->suspended = 0;
1900 usb_gadget_set_state(&ci->gadget,
1901 ci->resume_state);
1902 }
1903 }
1904
1905 if ((USBi_UI | USBi_UEI) & intr)
1906 isr_tr_complete_handler(ci);
1907
1908 if ((USBi_SLI & intr) && !(ci->suspended)) {
1909 ci->suspended = 1;
1910 ci->resume_state = ci->gadget.state;
1911 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1912 ci->driver->suspend) {
1913 spin_unlock(&ci->lock);
1914 ci->driver->suspend(&ci->gadget);
1915 spin_lock(&ci->lock);
1916 }
1917 usb_gadget_set_state(&ci->gadget,
1918 USB_STATE_SUSPENDED);
1919 }
1920 retval = IRQ_HANDLED;
1921 } else {
1922 retval = IRQ_NONE;
1923 }
1924 spin_unlock(&ci->lock);
1925
1926 return retval;
1927}
1928
1929/**
1930 * udc_start: initialize gadget role
1931 * @ci: chipidea controller
1932 */
1933static int udc_start(struct ci_hdrc *ci)
1934{
1935 struct device *dev = ci->dev;
1936 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1937 int retval = 0;
1938
1939 ci->gadget.ops = &usb_gadget_ops;
1940 ci->gadget.speed = USB_SPEED_UNKNOWN;
1941 ci->gadget.max_speed = USB_SPEED_HIGH;
1942 ci->gadget.name = ci->platdata->name;
1943 ci->gadget.otg_caps = otg_caps;
1944
1945 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
1946 ci->gadget.quirk_avoids_skb_reserve = 1;
1947
1948 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1949 otg_caps->adp_support))
1950 ci->gadget.is_otg = 1;
1951
1952 INIT_LIST_HEAD(&ci->gadget.ep_list);
1953
1954 /* alloc resources */
1955 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
1956 sizeof(struct ci_hw_qh),
1957 64, CI_HDRC_PAGE_SIZE);
1958 if (ci->qh_pool == NULL)
1959 return -ENOMEM;
1960
1961 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
1962 sizeof(struct ci_hw_td),
1963 64, CI_HDRC_PAGE_SIZE);
1964 if (ci->td_pool == NULL) {
1965 retval = -ENOMEM;
1966 goto free_qh_pool;
1967 }
1968
1969 retval = init_eps(ci);
1970 if (retval)
1971 goto free_pools;
1972
1973 ci->gadget.ep0 = &ci->ep0in->ep;
1974
1975 retval = usb_add_gadget_udc(dev, &ci->gadget);
1976 if (retval)
1977 goto destroy_eps;
1978
1979 pm_runtime_no_callbacks(&ci->gadget.dev);
1980 pm_runtime_enable(&ci->gadget.dev);
1981
1982 return retval;
1983
1984destroy_eps:
1985 destroy_eps(ci);
1986free_pools:
1987 dma_pool_destroy(ci->td_pool);
1988free_qh_pool:
1989 dma_pool_destroy(ci->qh_pool);
1990 return retval;
1991}
1992
1993/**
1994 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1995 *
1996 * No interrupts active, the IRQ has been released
1997 */
1998void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1999{
2000 if (!ci->roles[CI_ROLE_GADGET])
2001 return;
2002
2003 usb_del_gadget_udc(&ci->gadget);
2004
2005 destroy_eps(ci);
2006
2007 dma_pool_destroy(ci->td_pool);
2008 dma_pool_destroy(ci->qh_pool);
2009}
2010
2011static int udc_id_switch_for_device(struct ci_hdrc *ci)
2012{
2013 if (ci->platdata->pins_device)
2014 pinctrl_select_state(ci->platdata->pctl,
2015 ci->platdata->pins_device);
2016
2017 if (ci->is_otg)
2018 /* Clear and enable BSV irq */
2019 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2020 OTGSC_BSVIS | OTGSC_BSVIE);
2021
2022 return 0;
2023}
2024
2025static void udc_id_switch_for_host(struct ci_hdrc *ci)
2026{
2027 /*
2028 * host doesn't care B_SESSION_VALID event
2029 * so clear and disbale BSV irq
2030 */
2031 if (ci->is_otg)
2032 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2033
2034 ci->vbus_active = 0;
2035
2036 if (ci->platdata->pins_device && ci->platdata->pins_default)
2037 pinctrl_select_state(ci->platdata->pctl,
2038 ci->platdata->pins_default);
2039}
2040
2041/**
2042 * ci_hdrc_gadget_init - initialize device related bits
2043 * ci: the controller
2044 *
2045 * This function initializes the gadget, if the device is "device capable".
2046 */
2047int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2048{
2049 struct ci_role_driver *rdrv;
2050 int ret;
2051
2052 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2053 return -ENXIO;
2054
2055 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2056 if (!rdrv)
2057 return -ENOMEM;
2058
2059 rdrv->start = udc_id_switch_for_device;
2060 rdrv->stop = udc_id_switch_for_host;
2061 rdrv->irq = udc_irq;
2062 rdrv->name = "gadget";
2063
2064 ret = udc_start(ci);
2065 if (!ret)
2066 ci->roles[CI_ROLE_GADGET] = rdrv;
2067
2068 return ret;
2069}