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192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / drivers / usb / dwc3 / debugfs.c
blob: 7fa4d4dacf19acaad40540aa0d8eddade295a51c [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1// SPDX-License-Identifier: GPL-2.0
2/**
3 * debugfs.c - DesignWare USB3 DRD Controller DebugFS file
4 *
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
6 *
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
9 */
10
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/ptrace.h>
14#include <linux/types.h>
15#include <linux/spinlock.h>
16#include <linux/debugfs.h>
17#include <linux/seq_file.h>
18#include <linux/delay.h>
19#include <linux/uaccess.h>
20
21#include <linux/usb/ch9.h>
22
23#include "core.h"
24#include "gadget.h"
25#include "io.h"
26#include "debug.h"
27
28#define DWC3_LSP_MUX_UNSELECTED 0xfffff
29
30#define dump_register(nm) \
31{ \
32 .name = __stringify(nm), \
33 .offset = DWC3_ ##nm, \
34}
35
36#define dump_ep_register_set(n) \
37 { \
38 .name = "DEPCMDPAR2("__stringify(n)")", \
39 .offset = DWC3_DEP_BASE(n) + \
40 DWC3_DEPCMDPAR2, \
41 }, \
42 { \
43 .name = "DEPCMDPAR1("__stringify(n)")", \
44 .offset = DWC3_DEP_BASE(n) + \
45 DWC3_DEPCMDPAR1, \
46 }, \
47 { \
48 .name = "DEPCMDPAR0("__stringify(n)")", \
49 .offset = DWC3_DEP_BASE(n) + \
50 DWC3_DEPCMDPAR0, \
51 }, \
52 { \
53 .name = "DEPCMD("__stringify(n)")", \
54 .offset = DWC3_DEP_BASE(n) + \
55 DWC3_DEPCMD, \
56 }
57
58
59static const struct debugfs_reg32 dwc3_regs[] = {
60 dump_register(GSBUSCFG0),
61 dump_register(GSBUSCFG1),
62 dump_register(GTXTHRCFG),
63 dump_register(GRXTHRCFG),
64 dump_register(GCTL),
65 dump_register(GEVTEN),
66 dump_register(GSTS),
67 dump_register(GUCTL1),
68 dump_register(GSNPSID),
69 dump_register(GGPIO),
70 dump_register(GUID),
71 dump_register(GUCTL),
72 dump_register(GBUSERRADDR0),
73 dump_register(GBUSERRADDR1),
74 dump_register(GPRTBIMAP0),
75 dump_register(GPRTBIMAP1),
76 dump_register(GHWPARAMS0),
77 dump_register(GHWPARAMS1),
78 dump_register(GHWPARAMS2),
79 dump_register(GHWPARAMS3),
80 dump_register(GHWPARAMS4),
81 dump_register(GHWPARAMS5),
82 dump_register(GHWPARAMS6),
83 dump_register(GHWPARAMS7),
84 dump_register(GDBGFIFOSPACE),
85 dump_register(GDBGLTSSM),
86 dump_register(GDBGBMU),
87 dump_register(GPRTBIMAP_HS0),
88 dump_register(GPRTBIMAP_HS1),
89 dump_register(GPRTBIMAP_FS0),
90 dump_register(GPRTBIMAP_FS1),
91
92 dump_register(GUSB2PHYCFG(0)),
93 dump_register(GUSB2PHYCFG(1)),
94 dump_register(GUSB2PHYCFG(2)),
95 dump_register(GUSB2PHYCFG(3)),
96 dump_register(GUSB2PHYCFG(4)),
97 dump_register(GUSB2PHYCFG(5)),
98 dump_register(GUSB2PHYCFG(6)),
99 dump_register(GUSB2PHYCFG(7)),
100 dump_register(GUSB2PHYCFG(8)),
101 dump_register(GUSB2PHYCFG(9)),
102 dump_register(GUSB2PHYCFG(10)),
103 dump_register(GUSB2PHYCFG(11)),
104 dump_register(GUSB2PHYCFG(12)),
105 dump_register(GUSB2PHYCFG(13)),
106 dump_register(GUSB2PHYCFG(14)),
107 dump_register(GUSB2PHYCFG(15)),
108
109 dump_register(GUSB2I2CCTL(0)),
110 dump_register(GUSB2I2CCTL(1)),
111 dump_register(GUSB2I2CCTL(2)),
112 dump_register(GUSB2I2CCTL(3)),
113 dump_register(GUSB2I2CCTL(4)),
114 dump_register(GUSB2I2CCTL(5)),
115 dump_register(GUSB2I2CCTL(6)),
116 dump_register(GUSB2I2CCTL(7)),
117 dump_register(GUSB2I2CCTL(8)),
118 dump_register(GUSB2I2CCTL(9)),
119 dump_register(GUSB2I2CCTL(10)),
120 dump_register(GUSB2I2CCTL(11)),
121 dump_register(GUSB2I2CCTL(12)),
122 dump_register(GUSB2I2CCTL(13)),
123 dump_register(GUSB2I2CCTL(14)),
124 dump_register(GUSB2I2CCTL(15)),
125
126 dump_register(GUSB2PHYACC(0)),
127 dump_register(GUSB2PHYACC(1)),
128 dump_register(GUSB2PHYACC(2)),
129 dump_register(GUSB2PHYACC(3)),
130 dump_register(GUSB2PHYACC(4)),
131 dump_register(GUSB2PHYACC(5)),
132 dump_register(GUSB2PHYACC(6)),
133 dump_register(GUSB2PHYACC(7)),
134 dump_register(GUSB2PHYACC(8)),
135 dump_register(GUSB2PHYACC(9)),
136 dump_register(GUSB2PHYACC(10)),
137 dump_register(GUSB2PHYACC(11)),
138 dump_register(GUSB2PHYACC(12)),
139 dump_register(GUSB2PHYACC(13)),
140 dump_register(GUSB2PHYACC(14)),
141 dump_register(GUSB2PHYACC(15)),
142
143 dump_register(GUSB3PIPECTL(0)),
144 dump_register(GUSB3PIPECTL(1)),
145 dump_register(GUSB3PIPECTL(2)),
146 dump_register(GUSB3PIPECTL(3)),
147 dump_register(GUSB3PIPECTL(4)),
148 dump_register(GUSB3PIPECTL(5)),
149 dump_register(GUSB3PIPECTL(6)),
150 dump_register(GUSB3PIPECTL(7)),
151 dump_register(GUSB3PIPECTL(8)),
152 dump_register(GUSB3PIPECTL(9)),
153 dump_register(GUSB3PIPECTL(10)),
154 dump_register(GUSB3PIPECTL(11)),
155 dump_register(GUSB3PIPECTL(12)),
156 dump_register(GUSB3PIPECTL(13)),
157 dump_register(GUSB3PIPECTL(14)),
158 dump_register(GUSB3PIPECTL(15)),
159
160 dump_register(GTXFIFOSIZ(0)),
161 dump_register(GTXFIFOSIZ(1)),
162 dump_register(GTXFIFOSIZ(2)),
163 dump_register(GTXFIFOSIZ(3)),
164 dump_register(GTXFIFOSIZ(4)),
165 dump_register(GTXFIFOSIZ(5)),
166 dump_register(GTXFIFOSIZ(6)),
167 dump_register(GTXFIFOSIZ(7)),
168 dump_register(GTXFIFOSIZ(8)),
169 dump_register(GTXFIFOSIZ(9)),
170 dump_register(GTXFIFOSIZ(10)),
171 dump_register(GTXFIFOSIZ(11)),
172 dump_register(GTXFIFOSIZ(12)),
173 dump_register(GTXFIFOSIZ(13)),
174 dump_register(GTXFIFOSIZ(14)),
175 dump_register(GTXFIFOSIZ(15)),
176 dump_register(GTXFIFOSIZ(16)),
177 dump_register(GTXFIFOSIZ(17)),
178 dump_register(GTXFIFOSIZ(18)),
179 dump_register(GTXFIFOSIZ(19)),
180 dump_register(GTXFIFOSIZ(20)),
181 dump_register(GTXFIFOSIZ(21)),
182 dump_register(GTXFIFOSIZ(22)),
183 dump_register(GTXFIFOSIZ(23)),
184 dump_register(GTXFIFOSIZ(24)),
185 dump_register(GTXFIFOSIZ(25)),
186 dump_register(GTXFIFOSIZ(26)),
187 dump_register(GTXFIFOSIZ(27)),
188 dump_register(GTXFIFOSIZ(28)),
189 dump_register(GTXFIFOSIZ(29)),
190 dump_register(GTXFIFOSIZ(30)),
191 dump_register(GTXFIFOSIZ(31)),
192
193 dump_register(GRXFIFOSIZ(0)),
194 dump_register(GRXFIFOSIZ(1)),
195 dump_register(GRXFIFOSIZ(2)),
196 dump_register(GRXFIFOSIZ(3)),
197 dump_register(GRXFIFOSIZ(4)),
198 dump_register(GRXFIFOSIZ(5)),
199 dump_register(GRXFIFOSIZ(6)),
200 dump_register(GRXFIFOSIZ(7)),
201 dump_register(GRXFIFOSIZ(8)),
202 dump_register(GRXFIFOSIZ(9)),
203 dump_register(GRXFIFOSIZ(10)),
204 dump_register(GRXFIFOSIZ(11)),
205 dump_register(GRXFIFOSIZ(12)),
206 dump_register(GRXFIFOSIZ(13)),
207 dump_register(GRXFIFOSIZ(14)),
208 dump_register(GRXFIFOSIZ(15)),
209 dump_register(GRXFIFOSIZ(16)),
210 dump_register(GRXFIFOSIZ(17)),
211 dump_register(GRXFIFOSIZ(18)),
212 dump_register(GRXFIFOSIZ(19)),
213 dump_register(GRXFIFOSIZ(20)),
214 dump_register(GRXFIFOSIZ(21)),
215 dump_register(GRXFIFOSIZ(22)),
216 dump_register(GRXFIFOSIZ(23)),
217 dump_register(GRXFIFOSIZ(24)),
218 dump_register(GRXFIFOSIZ(25)),
219 dump_register(GRXFIFOSIZ(26)),
220 dump_register(GRXFIFOSIZ(27)),
221 dump_register(GRXFIFOSIZ(28)),
222 dump_register(GRXFIFOSIZ(29)),
223 dump_register(GRXFIFOSIZ(30)),
224 dump_register(GRXFIFOSIZ(31)),
225
226 dump_register(GEVNTADRLO(0)),
227 dump_register(GEVNTADRHI(0)),
228 dump_register(GEVNTSIZ(0)),
229 dump_register(GEVNTCOUNT(0)),
230
231 dump_register(GHWPARAMS8),
232 dump_register(DCFG),
233 dump_register(DCTL),
234 dump_register(DEVTEN),
235 dump_register(DSTS),
236 dump_register(DGCMDPAR),
237 dump_register(DGCMD),
238 dump_register(DALEPENA),
239
240 dump_ep_register_set(0),
241 dump_ep_register_set(1),
242 dump_ep_register_set(2),
243 dump_ep_register_set(3),
244 dump_ep_register_set(4),
245 dump_ep_register_set(5),
246 dump_ep_register_set(6),
247 dump_ep_register_set(7),
248 dump_ep_register_set(8),
249 dump_ep_register_set(9),
250 dump_ep_register_set(10),
251 dump_ep_register_set(11),
252 dump_ep_register_set(12),
253 dump_ep_register_set(13),
254 dump_ep_register_set(14),
255 dump_ep_register_set(15),
256 dump_ep_register_set(16),
257 dump_ep_register_set(17),
258 dump_ep_register_set(18),
259 dump_ep_register_set(19),
260 dump_ep_register_set(20),
261 dump_ep_register_set(21),
262 dump_ep_register_set(22),
263 dump_ep_register_set(23),
264 dump_ep_register_set(24),
265 dump_ep_register_set(25),
266 dump_ep_register_set(26),
267 dump_ep_register_set(27),
268 dump_ep_register_set(28),
269 dump_ep_register_set(29),
270 dump_ep_register_set(30),
271 dump_ep_register_set(31),
272
273 dump_register(OCFG),
274 dump_register(OCTL),
275 dump_register(OEVT),
276 dump_register(OEVTEN),
277 dump_register(OSTS),
278};
279
280static void dwc3_host_lsp(struct seq_file *s)
281{
282 struct dwc3 *dwc = s->private;
283 bool dbc_enabled;
284 u32 sel;
285 u32 reg;
286 u32 val;
287
288 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC);
289
290 sel = dwc->dbg_lsp_select;
291 if (sel == DWC3_LSP_MUX_UNSELECTED) {
292 seq_puts(s, "Write LSP selection to print for host\n");
293 return;
294 }
295
296 reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel);
297
298 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
299 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
300 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val);
301
302 if (dbc_enabled && sel < 256) {
303 reg |= DWC3_GDBGLSPMUX_ENDBC;
304 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
305 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
306 seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val);
307 }
308}
309
310static void dwc3_gadget_lsp(struct seq_file *s)
311{
312 struct dwc3 *dwc = s->private;
313 int i;
314 u32 reg;
315
316 for (i = 0; i < 16; i++) {
317 reg = DWC3_GDBGLSPMUX_DEVSELECT(i);
318 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
319 reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP);
320 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg);
321 }
322}
323
324static int dwc3_lsp_show(struct seq_file *s, void *unused)
325{
326 struct dwc3 *dwc = s->private;
327 unsigned int current_mode;
328 unsigned long flags;
329 u32 reg;
330#if 0
331 int ret;
332 ret = pm_runtime_resume_and_get(dwc->dev);
333 if (ret < 0)
334 return ret;
335#endif
336
337 spin_lock_irqsave(&dwc->lock, flags);
338 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
339 current_mode = DWC3_GSTS_CURMOD(reg);
340
341 switch (current_mode) {
342 case DWC3_GSTS_CURMOD_HOST:
343 dwc3_host_lsp(s);
344 break;
345 case DWC3_GSTS_CURMOD_DEVICE:
346 dwc3_gadget_lsp(s);
347 break;
348 default:
349 seq_puts(s, "Mode is unknown, no LSP register printed\n");
350 break;
351 }
352 spin_unlock_irqrestore(&dwc->lock, flags);
353
354#if 0
355 pm_runtime_put_sync(dwc->dev);
356#endif
357
358 return 0;
359}
360
361static int dwc3_lsp_open(struct inode *inode, struct file *file)
362{
363 return single_open(file, dwc3_lsp_show, inode->i_private);
364}
365
366static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf,
367 size_t count, loff_t *ppos)
368{
369 struct seq_file *s = file->private_data;
370 struct dwc3 *dwc = s->private;
371 unsigned long flags;
372 char buf[32] = { 0 };
373 u32 sel;
374 int ret;
375
376 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
377 return -EFAULT;
378
379 ret = kstrtouint(buf, 0, &sel);
380 if (ret)
381 return ret;
382
383 spin_lock_irqsave(&dwc->lock, flags);
384 dwc->dbg_lsp_select = sel;
385 spin_unlock_irqrestore(&dwc->lock, flags);
386
387 return count;
388}
389
390static const struct file_operations dwc3_lsp_fops = {
391 .open = dwc3_lsp_open,
392 .write = dwc3_lsp_write,
393 .read = seq_read,
394 .llseek = seq_lseek,
395 .release = single_release,
396};
397
398static int dwc3_mode_show(struct seq_file *s, void *unused)
399{
400 struct dwc3 *dwc = s->private;
401 unsigned long flags;
402 u32 reg;
403#if 0
404 int ret;
405
406 ret = pm_runtime_resume_and_get(dwc->dev);
407 if (ret < 0)
408 return ret;
409#endif
410 spin_lock_irqsave(&dwc->lock, flags);
411 reg = dwc3_readl(dwc->regs, DWC3_GCTL);
412 spin_unlock_irqrestore(&dwc->lock, flags);
413
414 switch (DWC3_GCTL_PRTCAP(reg)) {
415 case DWC3_GCTL_PRTCAP_HOST:
416 seq_printf(s, "host\n");
417 break;
418 case DWC3_GCTL_PRTCAP_DEVICE:
419 seq_printf(s, "device\n");
420 break;
421 case DWC3_GCTL_PRTCAP_OTG:
422 seq_printf(s, "otg\n");
423 break;
424 default:
425 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
426 }
427
428#if 0
429 pm_runtime_put_sync(dwc->dev);
430#endif
431 return 0;
432}
433
434static int dwc3_mode_open(struct inode *inode, struct file *file)
435{
436 return single_open(file, dwc3_mode_show, inode->i_private);
437}
438
439static ssize_t dwc3_mode_write(struct file *file,
440 const char __user *ubuf, size_t count, loff_t *ppos)
441{
442 struct seq_file *s = file->private_data;
443 struct dwc3 *dwc = s->private;
444 u32 mode = 0;
445 char buf[32];
446
447 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
448 return -EFAULT;
449
450 if (!strncmp(buf, "host", 4))
451 mode = DWC3_GCTL_PRTCAP_HOST;
452
453 if (!strncmp(buf, "device", 6))
454 mode = DWC3_GCTL_PRTCAP_DEVICE;
455
456 if (!strncmp(buf, "otg", 3))
457 mode = DWC3_GCTL_PRTCAP_OTG;
458
459 dwc3_set_mode(dwc, mode);
460
461 return count;
462}
463
464static const struct file_operations dwc3_mode_fops = {
465 .open = dwc3_mode_open,
466 .write = dwc3_mode_write,
467 .read = seq_read,
468 .llseek = seq_lseek,
469 .release = single_release,
470};
471
472static int dwc3_testmode_show(struct seq_file *s, void *unused)
473{
474 struct dwc3 *dwc = s->private;
475 unsigned long flags;
476 u32 reg;
477#if 0
478 int ret;
479
480 ret = pm_runtime_resume_and_get(dwc->dev);
481 if (ret < 0)
482 return ret;
483#endif
484 spin_lock_irqsave(&dwc->lock, flags);
485 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
486 reg &= DWC3_DCTL_TSTCTRL_MASK;
487 reg >>= 1;
488 spin_unlock_irqrestore(&dwc->lock, flags);
489
490 switch (reg) {
491 case 0:
492 seq_printf(s, "no test\n");
493 break;
494 case TEST_J:
495 seq_printf(s, "test_j\n");
496 break;
497 case TEST_K:
498 seq_printf(s, "test_k\n");
499 break;
500 case TEST_SE0_NAK:
501 seq_printf(s, "test_se0_nak\n");
502 break;
503 case TEST_PACKET:
504 seq_printf(s, "test_packet\n");
505 break;
506 case TEST_FORCE_EN:
507 seq_printf(s, "test_force_enable\n");
508 break;
509 default:
510 seq_printf(s, "UNKNOWN %d\n", reg);
511 }
512#if 0
513 pm_runtime_put_sync(dwc->dev);
514#endif
515 return 0;
516}
517
518static int dwc3_testmode_open(struct inode *inode, struct file *file)
519{
520 return single_open(file, dwc3_testmode_show, inode->i_private);
521}
522
523static ssize_t dwc3_testmode_write(struct file *file,
524 const char __user *ubuf, size_t count, loff_t *ppos)
525{
526 struct seq_file *s = file->private_data;
527 struct dwc3 *dwc = s->private;
528 unsigned long flags;
529 u32 testmode = 0;
530 char buf[32];
531 //int ret;
532
533 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
534 return -EFAULT;
535
536 if (!strncmp(buf, "test_j", 6))
537 testmode = TEST_J;
538 else if (!strncmp(buf, "test_k", 6))
539 testmode = TEST_K;
540 else if (!strncmp(buf, "test_se0_nak", 12))
541 testmode = TEST_SE0_NAK;
542 else if (!strncmp(buf, "test_packet", 11))
543 testmode = TEST_PACKET;
544 else if (!strncmp(buf, "test_force_enable", 17))
545 testmode = TEST_FORCE_EN;
546 else
547 testmode = 0;
548
549#if 0
550 ret = pm_runtime_resume_and_get(dwc->dev);
551 if (ret < 0)
552 return ret;
553#endif
554 spin_lock_irqsave(&dwc->lock, flags);
555 dwc3_gadget_set_test_mode(dwc, testmode);
556 spin_unlock_irqrestore(&dwc->lock, flags);
557
558#if 0
559 pm_runtime_put_sync(dwc->dev);
560#endif
561 return count;
562}
563
564static const struct file_operations dwc3_testmode_fops = {
565 .open = dwc3_testmode_open,
566 .write = dwc3_testmode_write,
567 .read = seq_read,
568 .llseek = seq_lseek,
569 .release = single_release,
570};
571
572static int dwc3_link_state_show(struct seq_file *s, void *unused)
573{
574 struct dwc3 *dwc = s->private;
575 unsigned long flags;
576 enum dwc3_link_state state;
577 u32 reg;
578 u8 speed;
579#if 0
580 int ret;
581
582 ret = pm_runtime_resume_and_get(dwc->dev);
583 if (ret < 0)
584 return ret;
585#endif
586 spin_lock_irqsave(&dwc->lock, flags);
587 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
588 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
589 seq_puts(s, "Not available\n");
590 spin_unlock_irqrestore(&dwc->lock, flags);
591#if 0
592 pm_runtime_put_sync(dwc->dev);
593#endif
594 return 0;
595 }
596
597 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
598 state = DWC3_DSTS_USBLNKST(reg);
599 speed = reg & DWC3_DSTS_CONNECTSPD;
600
601 seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ?
602 dwc3_gadget_link_string(state) :
603 dwc3_gadget_hs_link_string(state));
604 spin_unlock_irqrestore(&dwc->lock, flags);
605
606#if 0
607 pm_runtime_put_sync(dwc->dev);
608#endif
609 return 0;
610}
611
612static int dwc3_link_state_open(struct inode *inode, struct file *file)
613{
614 return single_open(file, dwc3_link_state_show, inode->i_private);
615}
616
617static ssize_t dwc3_link_state_write(struct file *file,
618 const char __user *ubuf, size_t count, loff_t *ppos)
619{
620 struct seq_file *s = file->private_data;
621 struct dwc3 *dwc = s->private;
622 unsigned long flags;
623 enum dwc3_link_state state = 0;
624 char buf[32];
625 u32 reg;
626 u8 speed;
627 //int ret;
628
629 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
630 return -EFAULT;
631
632 if (!strncmp(buf, "SS.Disabled", 11))
633 state = DWC3_LINK_STATE_SS_DIS;
634 else if (!strncmp(buf, "Rx.Detect", 9))
635 state = DWC3_LINK_STATE_RX_DET;
636 else if (!strncmp(buf, "SS.Inactive", 11))
637 state = DWC3_LINK_STATE_SS_INACT;
638 else if (!strncmp(buf, "Recovery", 8))
639 state = DWC3_LINK_STATE_RECOV;
640 else if (!strncmp(buf, "Compliance", 10))
641 state = DWC3_LINK_STATE_CMPLY;
642 else if (!strncmp(buf, "Loopback", 8))
643 state = DWC3_LINK_STATE_LPBK;
644 else
645 return -EINVAL;
646
647#if 0
648 ret = pm_runtime_resume_and_get(dwc->dev);
649 if (ret < 0)
650 return ret;
651#endif
652
653 spin_lock_irqsave(&dwc->lock, flags);
654 reg = dwc3_readl(dwc->regs, DWC3_GSTS);
655 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) {
656 spin_unlock_irqrestore(&dwc->lock, flags);
657
658#if 0
659 pm_runtime_put_sync(dwc->dev);
660#endif
661 return -EINVAL;
662 }
663
664 reg = dwc3_readl(dwc->regs, DWC3_DSTS);
665 speed = reg & DWC3_DSTS_CONNECTSPD;
666
667 if (speed < DWC3_DSTS_SUPERSPEED &&
668 state != DWC3_LINK_STATE_RECOV) {
669 spin_unlock_irqrestore(&dwc->lock, flags);
670
671#if 0
672 pm_runtime_put_sync(dwc->dev);
673#endif
674 return -EINVAL;
675 }
676
677 dwc3_gadget_set_link_state(dwc, state);
678 spin_unlock_irqrestore(&dwc->lock, flags);
679
680#if 0
681 pm_runtime_put_sync(dwc->dev);
682#endif
683 return count;
684}
685
686static const struct file_operations dwc3_link_state_fops = {
687 .open = dwc3_link_state_open,
688 .write = dwc3_link_state_write,
689 .read = seq_read,
690 .llseek = seq_lseek,
691 .release = single_release,
692};
693
694struct dwc3_ep_file_map {
695 const char name[25];
696 const struct file_operations *const fops;
697};
698#if 0
699static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused)
700{
701 struct dwc3_ep *dep = s->private;
702 struct dwc3 *dwc = dep->dwc;
703 unsigned long flags;
704 u32 val;
705 int ret;
706
707 ret = pm_runtime_resume_and_get(dwc->dev);
708 if (ret < 0)
709 return ret;
710
711 spin_lock_irqsave(&dwc->lock, flags);
712 val = dwc3_core_fifo_space(dep, DWC3_TXFIFO);
713
714 /* Convert to bytes */
715 val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0);
716 val >>= 3;
717 seq_printf(s, "%u\n", val);
718 spin_unlock_irqrestore(&dwc->lock, flags);
719
720 pm_runtime_put_sync(dwc->dev);
721
722 return 0;
723}
724
725static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused)
726{
727 struct dwc3_ep *dep = s->private;
728 struct dwc3 *dwc = dep->dwc;
729 unsigned long flags;
730 u32 val;
731 int ret;
732
733 ret = pm_runtime_resume_and_get(dwc->dev);
734 if (ret < 0)
735 return ret;
736
737 spin_lock_irqsave(&dwc->lock, flags);
738 val = dwc3_core_fifo_space(dep, DWC3_RXFIFO);
739
740 /* Convert to bytes */
741 val *= DWC3_MDWIDTH(dwc->hwparams.hwparams0);
742 val >>= 3;
743 seq_printf(s, "%u\n", val);
744 spin_unlock_irqrestore(&dwc->lock, flags);
745
746 pm_runtime_put_sync(dwc->dev);
747
748 return 0;
749}
750
751static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused)
752{
753 struct dwc3_ep *dep = s->private;
754 struct dwc3 *dwc = dep->dwc;
755 unsigned long flags;
756 u32 val;
757 int ret;
758
759 ret = pm_runtime_resume_and_get(dwc->dev);
760 if (ret < 0)
761 return ret;
762
763 spin_lock_irqsave(&dwc->lock, flags);
764 val = dwc3_core_fifo_space(dep, DWC3_TXREQQ);
765 seq_printf(s, "%u\n", val);
766 spin_unlock_irqrestore(&dwc->lock, flags);
767
768 pm_runtime_put_sync(dwc->dev);
769
770 return 0;
771}
772
773static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused)
774{
775 struct dwc3_ep *dep = s->private;
776 struct dwc3 *dwc = dep->dwc;
777 unsigned long flags;
778 u32 val;
779 int ret;
780
781 ret = pm_runtime_resume_and_get(dwc->dev);
782 if (ret < 0)
783 return ret;
784
785 spin_lock_irqsave(&dwc->lock, flags);
786 val = dwc3_core_fifo_space(dep, DWC3_RXREQQ);
787 seq_printf(s, "%u\n", val);
788 spin_unlock_irqrestore(&dwc->lock, flags);
789
790 pm_runtime_put_sync(dwc->dev);
791
792 return 0;
793}
794
795static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused)
796{
797 struct dwc3_ep *dep = s->private;
798 struct dwc3 *dwc = dep->dwc;
799 unsigned long flags;
800 u32 val;
801 int ret;
802
803 ret = pm_runtime_resume_and_get(dwc->dev);
804 if (ret < 0)
805 return ret;
806
807 spin_lock_irqsave(&dwc->lock, flags);
808 val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ);
809 seq_printf(s, "%u\n", val);
810 spin_unlock_irqrestore(&dwc->lock, flags);
811
812 pm_runtime_put_sync(dwc->dev);
813
814 return 0;
815}
816
817static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused)
818{
819 struct dwc3_ep *dep = s->private;
820 struct dwc3 *dwc = dep->dwc;
821 unsigned long flags;
822 u32 val;
823 int ret;
824
825 ret = pm_runtime_resume_and_get(dwc->dev);
826 if (ret < 0)
827 return ret;
828
829 spin_lock_irqsave(&dwc->lock, flags);
830 val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ);
831 seq_printf(s, "%u\n", val);
832 spin_unlock_irqrestore(&dwc->lock, flags);
833
834 pm_runtime_put_sync(dwc->dev);
835
836 return 0;
837}
838
839static int dwc3_event_queue_show(struct seq_file *s, void *unused)
840{
841 struct dwc3_ep *dep = s->private;
842 struct dwc3 *dwc = dep->dwc;
843 unsigned long flags;
844 u32 val;
845 int ret;
846
847 ret = pm_runtime_resume_and_get(dwc->dev);
848 if (ret < 0)
849 return ret;
850
851 spin_lock_irqsave(&dwc->lock, flags);
852 val = dwc3_core_fifo_space(dep, DWC3_EVENTQ);
853 seq_printf(s, "%u\n", val);
854 spin_unlock_irqrestore(&dwc->lock, flags);
855
856 pm_runtime_put_sync(dwc->dev);
857
858 return 0;
859}
860
861static int dwc3_transfer_type_show(struct seq_file *s, void *unused)
862{
863 struct dwc3_ep *dep = s->private;
864 struct dwc3 *dwc = dep->dwc;
865 unsigned long flags;
866
867 spin_lock_irqsave(&dwc->lock, flags);
868 if (!(dep->flags & DWC3_EP_ENABLED) ||
869 !dep->endpoint.desc) {
870 seq_printf(s, "--\n");
871 goto out;
872 }
873
874 switch (usb_endpoint_type(dep->endpoint.desc)) {
875 case USB_ENDPOINT_XFER_CONTROL:
876 seq_printf(s, "control\n");
877 break;
878 case USB_ENDPOINT_XFER_ISOC:
879 seq_printf(s, "isochronous\n");
880 break;
881 case USB_ENDPOINT_XFER_BULK:
882 seq_printf(s, "bulk\n");
883 break;
884 case USB_ENDPOINT_XFER_INT:
885 seq_printf(s, "interrupt\n");
886 break;
887 default:
888 seq_printf(s, "--\n");
889 }
890
891out:
892 spin_unlock_irqrestore(&dwc->lock, flags);
893
894 return 0;
895}
896#endif
897
898static int dwc3_trb_ring_show(struct seq_file *s, void *unused)
899{
900 struct dwc3_ep *dep = s->private;
901 struct dwc3 *dwc = dep->dwc;
902 unsigned long flags;
903 int i;
904#if 0
905 int ret;
906
907 ret = pm_runtime_resume_and_get(dwc->dev);
908 if (ret < 0)
909 return ret;
910#endif
911
912 spin_lock_irqsave(&dwc->lock, flags);
913 if (dep->number <= 1) {
914 seq_printf(s, "--\n");
915 goto out;
916 }
917
918 seq_printf(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n");
919
920 for (i = 0; i < dep->trb_num; i++) {
921 struct dwc3_trb *trb = &dep->trb_pool[i];
922 unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl);
923
924 seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d %c%c\n",
925 trb->bph, trb->bpl, trb->size,
926 dwc3_trb_type_string(type),
927 !!(trb->ctrl & DWC3_TRB_CTRL_IOC),
928 !!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI),
929 !!(trb->ctrl & DWC3_TRB_CTRL_CSP),
930 !!(trb->ctrl & DWC3_TRB_CTRL_CHN),
931 !!(trb->ctrl & DWC3_TRB_CTRL_LST),
932 !!(trb->ctrl & DWC3_TRB_CTRL_HWO),
933 dep->trb_enqueue == i ? 'E' : ' ',
934 dep->trb_dequeue == i ? 'D' : ' ');
935 }
936
937out:
938 spin_unlock_irqrestore(&dwc->lock, flags);
939
940#if 0
941 pm_runtime_put_sync(dwc->dev);
942#endif
943 return 0;
944}
945
946#if 0
947static int dwc3_ep_info_register_show(struct seq_file *s, void *unused)
948{
949 struct dwc3_ep *dep = s->private;
950 struct dwc3 *dwc = dep->dwc;
951 unsigned long flags;
952 u64 ep_info;
953 u32 lower_32_bits;
954 u32 upper_32_bits;
955 u32 reg;
956 int ret;
957
958 ret = pm_runtime_resume_and_get(dwc->dev);
959 if (ret < 0)
960 return ret;
961
962 spin_lock_irqsave(&dwc->lock, flags);
963 reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number);
964 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg);
965
966 lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0);
967 upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1);
968
969 ep_info = ((u64)upper_32_bits << 32) | lower_32_bits;
970 seq_printf(s, "0x%016llx\n", ep_info);
971 spin_unlock_irqrestore(&dwc->lock, flags);
972
973 pm_runtime_put_sync(dwc->dev);
974
975 return 0;
976}
977#endif
978
979#if 0
980DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size);
981DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size);
982DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue);
983DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue);
984DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue);
985DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue);
986DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue);
987DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type);
988#endif
989DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring);
990//DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register);
991
992static const struct dwc3_ep_file_map dwc3_ep_file_map[] = {
993#if 0
994 { "tx_fifo_size", &dwc3_tx_fifo_size_fops, },
995 { "rx_fifo_size", &dwc3_rx_fifo_size_fops, },
996 { "tx_request_queue", &dwc3_tx_request_queue_fops, },
997 { "rx_request_queue", &dwc3_rx_request_queue_fops, },
998 { "rx_info_queue", &dwc3_rx_info_queue_fops, },
999 { "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, },
1000 { "event_queue", &dwc3_event_queue_fops, },
1001 { "transfer_type", &dwc3_transfer_type_fops, },
1002#endif
1003 { "trb_ring", &dwc3_trb_ring_fops, },
1004// { "GDBGEPINFO", &dwc3_ep_info_register_fops, },
1005};
1006
1007static void dwc3_debugfs_create_endpoint_files(struct dwc3_ep *dep,
1008 struct dentry *parent)
1009{
1010 int i;
1011
1012 for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) {
1013 const struct file_operations *fops = dwc3_ep_file_map[i].fops;
1014 const char *name = dwc3_ep_file_map[i].name;
1015
1016 debugfs_create_file(name, S_IRUGO, parent, dep, fops);
1017 }
1018}
1019
1020void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep)
1021{
1022 struct dentry *dir;
1023
1024 dir = debugfs_create_dir(dep->name, dep->dwc->root);
1025 dwc3_debugfs_create_endpoint_files(dep, dir);
1026}
1027
1028void dwc3_debugfs_init(struct dwc3 *dwc)
1029{
1030 struct dentry *root;
1031
1032 dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL);
1033 if (!dwc->regset)
1034 return;
1035
1036 dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED;
1037
1038 dwc->regset->regs = dwc3_regs;
1039 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs);
1040 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START;
1041 dwc->regset->dev = dwc->dev;
1042
1043 root = debugfs_create_dir(dev_name(dwc->dev), NULL);
1044 dwc->root = root;
1045
1046 debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset);
1047
1048 debugfs_create_file("lsp_dump", S_IRUGO | S_IWUSR, root, dwc,
1049 &dwc3_lsp_fops);
1050
1051 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) {
1052 debugfs_create_file("mode", S_IRUGO | S_IWUSR, root, dwc,
1053 &dwc3_mode_fops);
1054 }
1055
1056 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) ||
1057 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) {
1058 debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, dwc,
1059 &dwc3_testmode_fops);
1060 debugfs_create_file("link_state", S_IRUGO | S_IWUSR, root, dwc,
1061 &dwc3_link_state_fops);
1062 }
1063}
1064
1065void dwc3_debugfs_exit(struct dwc3 *dwc)
1066{
1067 debugfs_remove_recursive(dwc->root);
1068 kfree(dwc->regset);
1069}