blob: c1ce798a89c295d8990889bbcb07140fcd0c4985 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*
2 * Base driver for ASR USB
3 *
4 * Copyright 2024 ASR Microelectronics Co., Ltd.
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file "COPYING" in the main directory of this
8 * archive for more details.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20
21#include <linux/clk.h>
22#include <linux/err.h>
23#include <linux/io.h>
24#include <linux/module.h>
25#include <linux/of.h>
26#include <linux/of_platform.h>
27#include <linux/platform_device.h>
28#include <linux/kernel.h>
29#include <linux/platform_data/mv_usb.h>
30#include <linux/irq.h>
31#include <linux/interrupt.h>
32#include <soc/asr/regs-addr.h>
33#include <linux/delay.h>
34#include <linux/cputype.h>
35#include <linux/usb/phy.h>
36#include <linux/usb.h>
37#include <linux/usb/ch9.h>
38#include <linux/usb/otg.h>
39#include <linux/usb/gadget.h>
40#include <linux/usb/hcd.h>
41#include <linux/pm_qos.h>
42#include <linux/gpio.h>
43#include <linux/edge_wakeup_mmp.h>
44#include <linux/mutex.h>
45
46#include "core.h"
47
48#define ENNUM -1
49#define USB_HANDLE_TIME_MSEC (5000)
50#define VBUS_RISE_FALL_MS (10)
51
52#ifdef CONFIG_CPU_ASR1901
53#define APMU_USB_WAKE_CLR (0x07c)
54#define USB_WAKE_INT_EN (0x1 << 15)
55#define USB_WAKE_PMU_EN (0x1 << 14)
56
57#define USB_VBUS_WAKE_EN (0x1 << 10)
58#define USB_ID_WAKE_EN (0x1 << 12)
59#define USB_LINEST_WAKE_EN ((0x1 << 8) | (0x1 << 9))
60#define USB_RXELEC_WAKE_EN (0x1 << 11)
61
62#define USB_VBUS_WAKE_CLR (0x1 << 18)
63#define USB_ID_WAKE_CLR (0x1 << 20)
64#define USB_LINEST_WAKE_CLR ((0x1 << 16) | (0x1 << 17))
65#define USB_RXELEC_WAKE_CLR (0x1 << 19)
66#elif defined(CONFIG_CPU_ASR1903)
67#define APMU_USB_WAKE_CLR (0x07c)
68
69#define USB_WAKE_INT_EN (0x1 << 29)
70#define USB_WAKE_PMU_EN (0x1 << 29)
71
72#define USB_VBUS_WAKE_EN (0x1 << 11)
73#define USB_ID_WAKE_EN (0x1 << 22)
74#define USB_LINEST_WAKE_EN ((0x1 << 9) | (0x1 << 10))
75#define USB_RXELEC_WAKE_EN ((0x1 << 9) | (0x1 << 10))
76
77#define USB_VBUS_WAKE_CLR (0x1 << 4)
78#define USB_ID_WAKE_CLR (0x1 << 23)
79#define USB_LINEST_WAKE_CLR (0x1 << 7)
80#define USB_RXELEC_WAKE_CLR (0x1 << 7)
81#else
82#define APMU_USB_WAKE_CLR (0x07c)
83
84#define USB_WAKE_INT_EN (0x1 << 16)
85#define USB_WAKE_PMU_EN (0x1 << 16)
86
87#define USB_VBUS_WAKE_EN (0x1 << 11)
88#define USB_ID_WAKE_EN (0x1 << 12)
89#define USB_LINEST_WAKE_EN ((0x1 << 9) | (0x1 << 10))
90#define USB_RXELEC_WAKE_EN (0x1 << 28)
91
92#define USB_VBUS_WAKE_CLR (0x1 << 4)
93#define USB_ID_WAKE_CLR (0x1 << 23)
94#define USB_LINEST_WAKE_CLR (0x1 << 7)
95#define USB_RXELEC_WAKE_CLR (0x1 << 29)
96#endif
97
98struct dwc3_asr {
99 struct device *dev;
100 struct clk *usb_clk;
101 int vbus_irq;
102
103#ifdef CONFIG_DWC3_HWSULOG
104 int sulog_irq;
105#endif
106
107 int usbid_irq;
108 spinlock_t lock;
109 u32 usbid_gpio;
110 u32 edge_det_gpio;
111 u32 cur_usbid_val;
112 u32 cur_vbus_val;
113 int gpio_num;
114 int otg_state;
115
116 struct usb_gadget *gadget;
117 struct usb_hcd *hcd;
118 struct usb_hcd *shared_hcd;
119 struct dwc3 *dwc;
120
121 struct usb_phy *usb2_phy;
122 struct usb_phy *usb3_phy;
123 struct delayed_work otg_work;
124
125 struct pm_qos_request qos_idle;
126 s32 lpm_qos;
127 struct mutex mtx_lock;
128};
129
130extern void dwc3_release_pm_qos(void);
131extern void dwc3_release_pm_qos_timeout(u32 sec);
132extern void dwc3_acquire_pm_qos(void);
133extern void dwc3_acquire_wakeup_event(void);
134
135extern struct dwc3 *dwc3_get_controller(void);
136#ifdef CONFIG_DWC3_HWSULOG
137extern void dwc3_hwsulog_clear_int(void);
138#endif
139static u32 force_host = 0;
140static u32 force_dev = 0;
141static bool usb_host_vbus_on;
142static struct dwc3_asr *g_adwc;
143
144module_param(force_dev, uint, S_IRUGO|S_IWUSR);
145MODULE_PARM_DESC(force_dev, "dwc3 otg force device mode");
146
147module_param(force_host, uint, S_IRUGO|S_IWUSR);
148MODULE_PARM_DESC(force_host, "dwc3 otg force host mode");
149bool is_otg_host_vbus_on(void)
150{
151 return usb_host_vbus_on;
152}
153
154int usb_otg_set_vbus(struct dwc3_asr *adwc, bool on)
155{
156 int ret = 0;
157
158 usb_host_vbus_on = on;
159 if (adwc->gpio_num >= 0)
160 ret = gpio_direction_output(adwc->gpio_num , on);
161 return ret;
162}
163
164int usb_otg_set_host(struct usb_hcd *hcd, struct usb_hcd *shared_hcd)
165{
166 g_adwc->hcd = hcd;
167 g_adwc->shared_hcd = shared_hcd;
168 g_adwc->hcd->usb_phy = g_adwc->shared_hcd->usb_phy = g_adwc->usb2_phy;
169
170 return 0;
171}
172
173int usb_otg_set_peripheral(struct usb_gadget *gadget)
174{
175 g_adwc->gadget = gadget;
176
177 return 0;
178}
179
180int usb_otg_set_phy(struct usb_phy *usb2phy, struct usb_phy *usb3phy)
181{
182 g_adwc->usb2_phy = usb2phy;
183 g_adwc->usb3_phy = usb3phy;
184
185 return 0;
186}
187
188int usb_otg_set_controller(struct dwc3 *dwc)
189{
190 dwc->otg_state = g_adwc->otg_state;
191 g_adwc->dwc = dwc;
192
193 return 0;
194}
195
196static void dwc3_otg_start_host(struct dwc3_asr *adwc, int on)
197{
198 struct usb_hcd *hcd = g_adwc->hcd;
199 struct usb_hcd *shared_hcd = g_adwc->shared_hcd;
200
201 if (!hcd || !shared_hcd) {
202 dev_err(g_adwc->dev, "adwc->hcd is not set!\n");
203 return;
204 }
205
206 dev_info(g_adwc->dev, "%s host\n", on ? "start" : "stop");
207 adwc->dwc->otg_state = adwc->otg_state;
208
209 if (on) {
210 /* set constraint before turn on vbus */
211 pm_stay_awake(adwc->dev);
212 pm_qos_update_request(&adwc->qos_idle, adwc->lpm_qos);
213 dwc3_controller_reset(adwc->dwc);
214 usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
215 usb_add_hcd(shared_hcd, shared_hcd->irq, IRQF_SHARED);
216 } else {
217 usb_remove_hcd(shared_hcd);
218 usb_remove_hcd(hcd);
219 dwc3_controller_reset(adwc->dwc);
220 usb_phy_set_suspend(adwc->dwc->usb2_phy, 1);
221 usb_phy_set_suspend(adwc->dwc->usb3_phy, 1);
222 pm_qos_update_request(&adwc->qos_idle, PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE);
223 pm_relax(adwc->dev);
224 }
225}
226
227static void dwc3_otg_start_peripherals(struct dwc3_asr *adwc, int on)
228{
229 struct usb_gadget *gadget = g_adwc->gadget;
230
231 if (!gadget) {
232 dev_err(g_adwc->dev, "adwc->gadget is not set!\n");
233 return;
234 }
235
236 dev_info(g_adwc->dev, "gadget %s\n", on ? "on" : "off");
237 adwc->dwc->otg_state = adwc->otg_state;
238 pm_wakeup_event(adwc->dev, USB_HANDLE_TIME_MSEC);
239 pm_qos_update_request_timeout(&adwc->qos_idle, adwc->lpm_qos, USB_HANDLE_TIME_MSEC * 1000);
240 if (on) {
241 /* dwc3_controller_reset(adwc->dwc); */
242 usb_gadget_vbus_connect(adwc->gadget);
243 } else {
244 usb_gadget_vbus_disconnect(adwc->gadget);
245 /* usb_phy_set_suspend(adwc->uphy, 1); */
246 }
247}
248
249static void usb_otg_work_fn(struct work_struct *work)
250{
251 int vbus, ret;
252 struct dwc3_asr *adwc = g_adwc;
253 int old_otg_state;
254
255 /* check ID and VBUS and update cable state */
256 if (adwc->usbid_gpio >= 0)
257 adwc->cur_usbid_val = gpio_get_value(adwc->usbid_gpio);
258 else
259 adwc->cur_usbid_val = 1;
260
261 mutex_lock(&adwc->mtx_lock);
262 ret = pxa_usb_extern_call(PXA_USB_DEV_OTG, vbus, get_vbus, &vbus);
263 if (ret) {
264 vbus = usb_phy_get_vbus(adwc->usb2_phy);
265 }
266 adwc->cur_vbus_val = vbus;
267
268 if (force_host)
269 adwc->cur_usbid_val = 0;
270 else if (force_dev)
271 adwc->cur_usbid_val = 1;
272
273 old_otg_state = adwc->otg_state;
274 pr_info("=>old_otg_state: %d, usbid: %d vbus: %d\n",
275 adwc->otg_state, adwc->cur_usbid_val, adwc->cur_vbus_val);
276
277 /* at first we clean states which are no longer active */
278 if (adwc->otg_state == OTG_STATE_B_IDLE) {
279 if (!adwc->cur_usbid_val) {
280 printk("disable vbus irq\n");
281 disable_irq(adwc->vbus_irq);
282 adwc->otg_state = OTG_STATE_A_HOST;
283 usb_phy_set_suspend(adwc->dwc->usb2_phy, 0);
284 usb_phy_set_suspend(adwc->dwc->usb3_phy, 0);
285 dwc3_otg_start_host(adwc, 1);
286 msleep(VBUS_RISE_FALL_MS);
287 usb_otg_set_vbus(adwc, true);
288 } else {
289 if (vbus)
290 adwc->otg_state = OTG_STATE_B_PERIPHERAL;
291 else
292 adwc->otg_state = OTG_STATE_B_IDLE;
293 dwc3_otg_start_peripherals(adwc, vbus);
294 }
295 } else if (adwc->otg_state == OTG_STATE_B_PERIPHERAL) {
296 if (!adwc->cur_vbus_val) {
297 adwc->otg_state = OTG_STATE_B_IDLE;
298 dwc3_otg_start_peripherals(adwc, 0);
299 }
300 } else if (adwc->otg_state == OTG_STATE_A_HOST) {
301 if (adwc->cur_usbid_val) {
302 adwc->otg_state = OTG_STATE_B_IDLE;
303 dwc3_otg_start_host(adwc, 0);
304 msleep(1);
305 usb_otg_set_vbus(adwc, false);
306 msleep(VBUS_RISE_FALL_MS);
307 /* usb_phy_set_suspend(adwc->dwc->usb2_phy, 1);
308 usb_phy_set_suspend(adwc->dwc->usb3_phy, 1); */
309 printk("enable vbus irq\n");
310 enable_irq(adwc->vbus_irq);
311 }
312 }
313 mutex_unlock(&adwc->mtx_lock);
314 pr_info("cur_otg_state: [%d->%d], usbid: %d vbus: %d\n",
315 old_otg_state, adwc->otg_state,
316 adwc->cur_usbid_val, adwc->cur_vbus_val);
317}
318
319static irqreturn_t vbus_irq(int irq, void *dev)
320{
321 struct dwc3_asr *adwc = (struct dwc3_asr *)dev;
322 void __iomem *apmu_base = regs_addr_get_va(REGS_ADDR_APMU);
323
324 dev_info(adwc->dev, "asr-usb vbus int enter..\n");
325#ifdef CONFIG_DWC3_HWSULOG
326 dwc3_hwsulog_clear_int();
327#endif
328
329 /* wait 50ms for vbus to be stable */
330 msleep(50);
331 if (cpu_is_asr1901() || cpu_is_asr1906())
332 writel(readl(apmu_base + APMU_USB_WAKE_CLR)
333 | USB_VBUS_WAKE_CLR | USB_LINEST_WAKE_CLR
334 | USB_ID_WAKE_CLR | USB_RXELEC_WAKE_CLR,
335 apmu_base + APMU_USB_WAKE_CLR);
336 else
337 writel(readl(apmu_base + APMU_USB_WAKE_CLR)
338 | (USB_VBUS_WAKE_CLR | USB_LINEST_WAKE_CLR | USB_RXELEC_WAKE_CLR
339 | USB_ID_WAKE_CLR | USB_WAKE_INT_EN),
340 apmu_base + APMU_USB_WAKE_CLR);
341
342 pm_wakeup_event(adwc->dev, USB_HANDLE_TIME_MSEC);
343 //pxa_usb_notify(PXA_USB_DEV_OTG, EVENT_VBUS, 0);
344 if (work_pending(&g_adwc->otg_work.work)) {
345 dev_info(adwc->dev, "cancel otg work...");
346 cancel_delayed_work_sync(&g_adwc->otg_work);
347 dev_info(adwc->dev, "done\n");
348 pm_wakeup_event(adwc->dev, USB_HANDLE_TIME_MSEC);
349 }
350 schedule_delayed_work(&g_adwc->otg_work, 0);
351 dev_info(adwc->dev, "asr-usb vbus interrupt is served..\n");
352 return IRQ_HANDLED;
353}
354
355static irqreturn_t usbid_irq(int irq, void *dev_id)
356{
357 struct dwc3_asr *adwc = (struct dwc3_asr *)g_adwc;
358 dev_info(adwc->dev, "dwc3 usbid_irq is served..\n");
359 vbus_irq(irq, dev_id);
360 return IRQ_HANDLED;
361}
362
363#ifdef CONFIG_DWC3_HWSULOG
364static irqreturn_t sulog_irq_handler(int irq, void *dev)
365{
366 hwsulog_error_handler();
367
368 return IRQ_HANDLED;
369}
370#endif
371
372static void usbid_wakeup_handler(int gpio, void *data)
373{
374}
375
376static int usbid_irq_init(struct platform_device *pdev, struct dwc3_asr *adwc)
377{
378 int ret = -1;
379
380 ret = of_property_read_u32(pdev->dev.of_node,
381 "usbid_gpio", &adwc->usbid_gpio);
382 pr_info("dwc3:usbid_gpio: %d\n", adwc->usbid_gpio);
383
384 if (ret) {
385 adwc->usbid_gpio = -1;
386 pr_err("%s no usbid-gpio defined\n", __func__);
387 return ret;
388 }
389
390 of_property_read_u32(pdev->dev.of_node,
391 "edge_detect_gpio", &adwc->edge_det_gpio);
392 if (adwc->edge_det_gpio > 0) {
393 ret = request_mfp_edge_wakeup(adwc->edge_det_gpio,
394 usbid_wakeup_handler,
395 NULL, &pdev->dev);
396 if (ret) {
397 dev_err(adwc->dev, "failed to request edge wakeup.\n");
398 goto out;
399 }
400 }
401
402 adwc->cur_usbid_val = gpio_get_value(adwc->usbid_gpio);
403 ret = gpio_request(adwc->usbid_gpio, "dwc3-usbid");
404 gpio_direction_input(adwc->usbid_gpio);
405
406 adwc->usbid_irq = gpio_to_irq(adwc->usbid_gpio);
407 ret =
408 request_threaded_irq(adwc->usbid_irq, NULL, usbid_irq,
409 IRQF_SHARED | IRQF_TRIGGER_RISING |
410 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, "dwc3-usbid",
411 adwc);
412 if (ret < 0) {
413 dev_err(adwc->dev, "%s: request irq failed!\n",
414 __func__);
415 }
416
417out:
418 return ret;
419}
420
421static ssize_t otg_mode_store(struct device *pdev, struct device_attribute *attr,
422 const char *buf, size_t count)
423{
424 struct dwc3_asr *adwc = dev_get_drvdata(pdev);
425
426 mutex_lock(&adwc->mtx_lock);
427 if (!strncmp(buf, "host", 4)) {
428 if(adwc->otg_state == OTG_STATE_A_HOST) {
429 pr_err("already in host mode\n");
430 goto out;
431 }
432 disable_irq(adwc->vbus_irq);
433 pr_info("disable vbus irq\n");
434
435 if (adwc->otg_state == OTG_STATE_B_PERIPHERAL) {
436 adwc->otg_state = OTG_STATE_B_IDLE;
437 dwc3_otg_start_peripherals(adwc, 0);
438 }
439
440 if (adwc->otg_state == OTG_STATE_B_IDLE) {
441 force_host = 1;
442 force_dev = 0;
443 usb_otg_set_vbus(adwc, true);
444 msleep(VBUS_RISE_FALL_MS);
445 adwc->otg_state = OTG_STATE_A_HOST;
446 dwc3_otg_start_host(adwc, 1);
447 dev_info(pdev, "userspace set host: otg_mode: %d\n", adwc->otg_state);
448 }
449 } else if (!strncmp(buf, "device", 6)) {
450 if(adwc->otg_state == OTG_STATE_B_PERIPHERAL) {
451 pr_err("already in device mode\n");
452 goto out;
453 }
454
455 if (adwc->otg_state == OTG_STATE_A_HOST) {
456 adwc->otg_state = OTG_STATE_B_IDLE;
457 dwc3_otg_start_host(adwc, 0);
458 msleep(1);
459 usb_otg_set_vbus(adwc, false);
460 msleep(VBUS_RISE_FALL_MS);
461 }
462
463 if (adwc->otg_state == OTG_STATE_B_IDLE) {
464 force_host = 0;
465 force_dev = 1;
466 adwc->otg_state = OTG_STATE_B_PERIPHERAL;
467 dwc3_otg_start_peripherals(adwc, 1);
468 dev_info(pdev, "userspace set device: otg_mode: %d\n", adwc->otg_state);
469 }
470
471 enable_irq(adwc->vbus_irq);
472 pr_err("enable vbus irq\n");
473 } else {
474 force_host = 0;
475 force_dev = 0;
476 if (adwc->otg_state == OTG_STATE_B_PERIPHERAL) {
477 adwc->otg_state = OTG_STATE_B_IDLE;
478 dwc3_otg_start_peripherals(adwc, 0);
479 } else if (adwc->otg_state == OTG_STATE_A_HOST) {
480 adwc->otg_state = OTG_STATE_B_IDLE;
481 dwc3_otg_start_host(adwc, 0);
482 msleep(1);
483 usb_otg_set_vbus(adwc, false);
484 msleep(VBUS_RISE_FALL_MS);
485 printk("enable vbus irq\n");
486 enable_irq(adwc->vbus_irq);
487 } else {
488 dev_info(pdev, "already in idle none host/device mode: %d\n", adwc->otg_state);
489 }
490 }
491
492out:
493 mutex_unlock(&adwc->mtx_lock);
494
495 return count;
496}
497
498static ssize_t otg_mode_show(struct device *pdev, struct device_attribute *attr, char *buf)
499{
500 struct dwc3_asr *adwc = dev_get_drvdata(pdev);
501 char *host_dev_str;
502
503 if (adwc->otg_state == OTG_STATE_A_HOST)
504 host_dev_str = "host";
505 else if (adwc->otg_state == OTG_STATE_B_PERIPHERAL)
506 host_dev_str = "device";
507 else
508 host_dev_str = "idle";
509
510 return sprintf(buf, "otg_state:%d, otg mode: %s\n", adwc->otg_state, host_dev_str);
511}
512
513static DEVICE_ATTR(otg_mode, S_IWUSR |S_IRUGO, otg_mode_show, otg_mode_store);
514
515static int dwc3_asr_otg_probe(struct platform_device *pdev)
516{
517 struct device_node *node = pdev->dev.of_node;
518 struct dwc3_asr *adwc;
519 int ret;
520 void __iomem *apmu_base;
521 const __be32 *prop;
522 unsigned int proplen;
523 u32 data;
524
525 adwc = devm_kzalloc(&pdev->dev, sizeof(*adwc), GFP_KERNEL);
526 if (!adwc)
527 return -ENOMEM;
528
529 platform_set_drvdata(pdev, adwc);
530
531 adwc->dev = &pdev->dev;
532 adwc->usb_clk = devm_clk_get(adwc->dev, NULL);
533 if (IS_ERR(adwc->usb_clk)) {
534 dev_err(adwc->dev, "failed to get core clock\n");
535 return PTR_ERR(adwc->usb_clk);
536 }
537
538 ret = clk_prepare_enable(adwc->usb_clk);
539 if (ret) {
540 dev_err(adwc->dev, "failed to enable core clock\n");
541 goto err_core;
542 }
543
544 adwc->vbus_irq = platform_get_irq(pdev, 0);
545 if (adwc->vbus_irq < 0) {
546 dev_err(&pdev->dev, "failed to get vbus irq\n");
547 ret = -ENXIO;
548 goto err_iface;
549 }
550
551 ret = devm_request_threaded_irq(&pdev->dev, adwc->vbus_irq,
552 NULL, vbus_irq,
553 IRQF_ONESHOT | IRQF_NO_SUSPEND,
554 "asr-usb-vbus", adwc);
555 if (ret) {
556 dev_info(&pdev->dev,
557 "Can not request irq for VBUS\n");
558 goto err_iface;
559 }
560
561#ifdef CONFIG_DWC3_HWSULOG
562 adwc->sulog_irq = platform_get_irq(pdev, 1);
563 if (adwc->sulog_irq < 0) {
564 dev_info(&pdev->dev, "no sulog irq\n");
565 } else {
566 ret = devm_request_threaded_irq(&pdev->dev, adwc->sulog_irq,
567 NULL, sulog_irq_handler,
568 IRQF_ONESHOT | IRQF_SHARED,
569 "dwc3-sulog-irq", adwc);
570 if (ret) {
571 dev_info(&pdev->dev,
572 "Can not request irq for dwc3 sulog %d\n", ret);
573 goto err_iface;
574 }
575 }
576#endif
577
578 usbid_irq_init(pdev, adwc);
579 INIT_DELAYED_WORK(&adwc->otg_work, usb_otg_work_fn);
580
581 if (of_property_read_bool(node , "otg,use-gpio-vbus")) {
582 if (of_property_read_u32(node , "gpio-num", &adwc->gpio_num)) {
583 adwc->gpio_num = ENNUM;
584 dev_info(&pdev->dev, "failed to find GPIO number in dts\n");
585 } else {
586 if (gpio_request(adwc->gpio_num, "OTGVBUS")) {
587 dev_err(&pdev->dev , "OTG Request GPIO failed, gpio: %d\n" ,
588 adwc->gpio_num);
589 adwc->gpio_num = ENNUM;
590 } else
591 gpio_direction_output(adwc->gpio_num , 0);
592 }
593 } else
594 adwc->gpio_num = ENNUM;
595
596 if (!of_property_read_u32(node, "otg-force-host-mode", &data)) {
597 dev_info(&pdev->dev, "otg force host mode\n");
598 force_host = 1;
599 force_dev = 0;
600 } else if (!of_property_read_u32(node, "otg-force-dev-mode", &data)) {
601 dev_info(&pdev->dev, "otg force dev mode\n");
602 force_dev = 1;
603 force_host = 0;
604 }
605
606 prop = of_get_property(node, "lpm-qos", &proplen);
607 if (!prop) {
608 pr_err("lpm-qos for dwc otg is not defined\n");
609 goto err_iface;
610 } else
611 adwc->lpm_qos = be32_to_cpup(prop);
612
613 adwc->qos_idle.name = "dwc3-otg";
614 pm_qos_add_request(&adwc->qos_idle, PM_QOS_CPUIDLE_BLOCK,
615 PM_QOS_CPUIDLE_BLOCK_DEFAULT_VALUE);
616
617 platform_set_drvdata(pdev, adwc);
618 device_init_wakeup(&pdev->dev, 1);
619 g_adwc = adwc;
620 ret = of_platform_populate(node, NULL, NULL, adwc->dev);
621 if (ret) {
622 dev_err(adwc->dev, "failed to register core - %d\n", ret);
623 goto err_iface;
624 }
625
626 schedule_delayed_work(&g_adwc->otg_work, HZ);
627 adwc->otg_state = OTG_STATE_B_IDLE;
628 mutex_init(&adwc->mtx_lock);
629 ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_otg_mode.attr);
630 if(ret){
631 dev_err(&pdev->dev, "create host_dev mode failed");
632 goto err_iface;
633 }
634
635 apmu_base = regs_addr_get_va(REGS_ADDR_APMU);
636 writel(readl(apmu_base + APMU_USB_WAKE_CLR)
637 | (USB_WAKE_INT_EN | USB_VBUS_WAKE_CLR | USB_LINEST_WAKE_CLR | USB_ID_WAKE_CLR),
638 apmu_base + APMU_USB_WAKE_CLR);
639 writel(readl(apmu_base + APMU_USB_WAKE_CLR) | USB_WAKE_INT_EN | USB_VBUS_WAKE_EN,
640 apmu_base + APMU_USB_WAKE_CLR);
641 dev_info(&pdev->dev, "%s done\n", __func__);
642
643 return 0;
644
645err_iface:
646 clk_disable_unprepare(adwc->usb_clk);
647err_core:
648 return ret;
649}
650
651static int dwc3_asr_otg_remove(struct platform_device *pdev)
652{
653 struct dwc3_asr *adwc = platform_get_drvdata(pdev);
654
655 clk_disable_unprepare(adwc->usb_clk);
656
657 return 0;
658}
659
660#ifdef CONFIG_PM_SLEEP
661static int dwc3_asr_suspend_noirq(struct device *dev)
662{
663 struct dwc3_asr *adwc = dev_get_drvdata(dev);
664 void __iomem *apmu_base = regs_addr_get_va(REGS_ADDR_APMU);
665 struct dwc3 *dwc = dwc3_get_controller();
666
667 writel(readl(apmu_base + APMU_USB_WAKE_CLR)
668 | (USB_WAKE_INT_EN | USB_WAKE_PMU_EN
669 | USB_LINEST_WAKE_EN | USB_ID_WAKE_EN | USB_RXELEC_WAKE_EN
670 | USB_VBUS_WAKE_CLR | USB_LINEST_WAKE_CLR
671 | USB_ID_WAKE_CLR | USB_RXELEC_WAKE_CLR),
672 apmu_base + APMU_USB_WAKE_CLR);
673
674 if (dwc->allow_suspend) {
675 if (dwc->link_state == DWC3_LINK_STATE_U3)
676 usb_phy_set_suspend2(dwc->usb2_phy, 1);
677 else
678 pr_info("dwc3 linkst: %d\n", dwc->link_state);
679 }
680
681 enable_irq_wake(adwc->vbus_irq);
682
683 dwc3_release_pm_qos();
684 return 0;
685}
686
687static int dwc3_asr_resume_noirq(struct device *dev)
688{
689 volatile u32 value;
690 void __iomem *apmu_base = regs_addr_get_va(REGS_ADDR_APMU);
691 struct dwc3_asr *adwc = dev_get_drvdata(dev);
692 struct dwc3 *dwc = dwc3_get_controller();
693
694 if (dwc->allow_suspend) {
695 if (dwc->vbus_active) {
696 dwc3_acquire_pm_qos();
697 usb_phy_set_suspend2(dwc->usb2_phy, 0);
698 } else {
699 pr_info("dwc3 vbus off, linkst: %d\n", dwc->link_state);
700 }
701 }
702
703 /* clear linestat wakeup and disable linestat/pmu wake en */
704 value = readl(apmu_base + APMU_USB_WAKE_CLR);
705 value |= (USB_WAKE_INT_EN | USB_LINEST_WAKE_CLR | USB_RXELEC_WAKE_CLR);
706 writel(value, apmu_base + APMU_USB_WAKE_CLR);
707 udelay(50);
708
709 value = readl(apmu_base + APMU_USB_WAKE_CLR);
710 value &= ~(USB_WAKE_PMU_EN | USB_LINEST_WAKE_EN | USB_RXELEC_WAKE_EN);
711 value |= (USB_VBUS_WAKE_EN | USB_ID_WAKE_EN | USB_WAKE_INT_EN);
712 writel(value, apmu_base + APMU_USB_WAKE_CLR);
713
714 disable_irq_wake(adwc->vbus_irq);
715 return 0;
716}
717
718static const struct dev_pm_ops dwc3_asr_pm_ops = {
719 .suspend_noirq = dwc3_asr_suspend_noirq,
720 .resume_noirq = dwc3_asr_resume_noirq,
721};
722#endif
723
724static const struct of_device_id of_dwc3_match[] = {
725 { .compatible = "asr,dwc3" },
726 { /* Sentinel */ }
727};
728MODULE_DEVICE_TABLE(of, of_dwc3_match);
729
730static struct platform_driver dwc3_asr_driver = {
731 .probe = dwc3_asr_otg_probe,
732 .remove = dwc3_asr_otg_remove,
733 .driver = {
734 .name = "asr-dwc3",
735 .of_match_table = of_dwc3_match,
736#ifdef CONFIG_PM_SLEEP
737 .pm = &dwc3_asr_pm_ops,
738#endif
739 },
740};
741
742module_platform_driver(dwc3_asr_driver);
743
744MODULE_ALIAS("platform:asr-dwc3");
745MODULE_LICENSE("GPL v2");
746MODULE_DESCRIPTION("ASR USB Glue Layer");