blob: 41d391edfbb5125032873ab950da0a10e453bd96 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001#ifndef _DT_BINDINGS_USB_MV_USB_PHY_H
2#define _DT_BINDINGS_USB_MV_USB_PHY_H
3
4/*
5 * PHY revision: For those has small difference with default setting.
6 * bit [15..8]: represent PHY IP as below:
7 * PHY_55LP 0x5500,
8 * PHY_40LP 0x4000,
9 * PHY_28LP 0x2800,
10 */
11#define REV_PXA168 0x5500
12#define REV_PXA910 0x5501
13
14#endif