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192.168.1.100 / T108 / e958203796650e3959a43708d67534bf36f4c83b / . / marvell / linux / include / soc / asr / regs-map.h
blob: 70786718d3edb1344df0cdcc62102c3fcf33cb67 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +0800[diff] [blame^]1/*
2 * linux/arch/arm/mach-mmp/include/soc/asr/regs-map.h
3 *
4 * Common soc registers map
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef __ASM_MACH_REGS_MAP_H
11#define __ASM_MACH_REGS_MAP_H
12#include <plat/dump_regs.h>
13
14struct reg_map pxa_reg_map[] = {
15/* register map of pxa1088 */
16/*
17 * important registers like CIU, Main_PMU, AP_PMU, MCK4, APB_clock, ICU are
18 * put ahead, they will be dumped as early as possible.
19 */
20 {0xD4282C00, 0xD4282CFC, 0, "CIU"},
21 {0xD4050000, 0xD405004C, 0, "Main_PMU_0"},
22 {0xD4050100, 0xD4050100, 0, "Main_PMU_1"},
23 {0xD4050200, 0xD4050200, 0, "Main_PMU_2"},
24 {0xD4050400, 0xD4050410, 0, "Main_PMU_3"},
25 {0xD4051000, 0xD4051004, 0, "Main_PMU_4"},
26 {0xD4051020, 0xD4051028, 0, "Main_PMU_5"},
27 {0xD4051048, 0xD405104C, 0, "Main_PMU_6"},
28 {0xD4052000, 0xD4052058, 0, "Main_PMU_DVC"},
29 {0xD4282800, 0xD4282970, 0, "AP_PMU"},
30 {0xC0100000, 0xC010003C, 0, "MCK4_00"},
31 {0xC0100050, 0xC0100078, 0, "MCK4_01"},
32 {0xC0100080, 0xC010009C, 0, "MCK4_02"},
33 {0xC0100100, 0xC0100100, 0, "MCK4_03"},
34 {0xC0100110, 0xC0100110, 0, "MCK4_04"},
35 {0xC0100120, 0xC010012C, 0, "MCK4_05"},
36 {0xC010013C, 0xC0100158, 0, "MCK4_06"},
37 {0xC0100160, 0xC0100164, 0, "MCK4_07"},
38 {0xC0100170, 0xC0100170, 0, "MCK4_08"},
39 {0xC0100180, 0xC0100184, 0, "MCK4_09"},
40 {0xC01001C0, 0xC01001C0, 0, "MCK4_10"},
41 {0xC01001C8, 0xC01001CC, 0, "MCK4_11"},
42 {0xC0100220, 0xC0100220, 0, "MCK4_12"},
43 {0xC0100230, 0xC0100258, 0, "MCK4_13"},
44 {0xC0100280, 0xC0100288, 0, "MCK4_14"},
45 {0xC0100300, 0xC0100308, 0, "MCK4_15"},
46 {0xC0100380, 0xC0100390, 0, "MCK4_16"},
47 {0xC0100400, 0xC0100400, 0, "MCK4_17"},
48 {0xC0100410, 0xC0100414, 0, "MCK4_18"},
49 {0xC0100440, 0xC0100448, 0, "MCK4_19"},
50 {0xC0100450, 0xC010045c, 0, "MCK4_20"},
51 {0xD4015000, 0xD4015068, 0, "APB_clock"},
52 {0xD4282000, 0xD428217C, 0, "ICU_0"},
53 {0xD4282200, 0xD4282258, 0, "ICU_1"},
54 {0xD4282300, 0xD428235C, 0, "ICU_2"},
55
56/*
57 * below registers are arranged according their physical address.
58 * please -don't- delete the commented lines, they are kept as index
59 * some regs are already dumped above;
60 * some regs do not exist in spec;
61 * some modules are not enabled, if read the regs, system will hang;
62 * some regs are not necessary to dump at present, but may need in furture.
63 */
64
65/* {0xC0000000, 0xC000FFFC, 0, "SPH USB PHY"}, not necessary */
66/* {0xC0010000, 0xC001FFFC, 0, "SPH USB CTL"}, not necessary */
67/* {0xC0100000, 0xC010045C, 0, "MCK4"}, already dumped above */
68/* {0xC0400000, 0xC04FFFFC, 0, "GC 1000T"}, not necessary */
69
70/* 0xD1DF9000 ~ 0xD1DFDFFF are GIC registers */
71 {0xD1DF9000, 0xD1DF9008, 0, "GIC_Distributor_00"},
72 {0xD1DF9080, 0xD1DF90BC, 0, "GIC_Distributor_01"},
73 {0xD1DF9100, 0xD1DF913C, 0, "GIC_Distributor_02"},
74 {0xD1DF9180, 0xD1DF91BC, 0, "GIC_Distributor_03"},
75 {0xD1DF9200, 0xD1DF923C, 0, "GIC_Distributor_04"},
76 {0xD1DF9280, 0xD1DF92BC, 0, "GIC_Distributor_05"},
77 {0xD1DF9300, 0xD1DF933C, 0, "GIC_Distributor_06"},
78 {0xD1DF9380, 0xD1DF93BC, 0, "GIC_Distributor_07"},
79 {0xD1DF9400, 0xD1DF95FC, 0, "GIC_Distributor_08"},
80 {0xD1DF9800, 0xD1DF99FC, 0, "GIC_Distributor_09"},
81 {0xD1DF9C00, 0xD1DF9C7C, 0, "GIC_Distributor_10"},
82 {0xD1DF9D00, 0xD1DF9D3C, 0, "GIC_Distributor_11"},
83 {0xD1DF9F00, 0xD1DF9F2C, 0, "GIC_Distributor_12"},
84 {0xD1DF9FD0, 0xD1DF9FFC, 0, "GIC_Distributor_13"},
85 {0xD1DFA000, 0xD1DFA028, 0, "GIC_CPU_interface_0"},
86 {0xD1DFA0D0, 0xD1DFA0FC, 0, "GIC_CPU_interface_1"},
87 {0xD1DFB000, 0xD1DFB030, 0, "GIC_common_base_add_0"},
88 {0xD1DFB0F0, 0xD1DFB10C, 0, "GIC_common_base_add_1"},
89 {0xD1DFC000, 0xD1DFC030, 0, "GIC_processor_spc_add_0"},
90 {0xD1DFC0F0, 0xD1DFC10C, 0, "GIC_processor_spc_add_1"},
91 {0xD1DFD000, 0xD1DFD028, 0, "GIC_Vir_CPU_interface_0"},
92 {0xD1DFD0D0, 0xD1DFD0FC, 0, "GIC_Vir_CPU_interface_1"},
93
94/* 0xD4000000 ~ 0xD41FFFFF are APB Peripheral registers */
95 {0xD4000000, 0xD40003FC, 0, "DMA"},
96 {0xD4010000, 0xD4010024, 0, "RTC"},
97 {0xD4010800, 0xD4010858, 0, "IIC1"},
98 {0xD4011000, 0xD4011058, 0, "IIC0"},
99 {0xD4011800, 0xD4011810, 0, "OneWire"},
100 {0xD4012000, 0xD4012048, 0, "Keypad"},
101/* {0xD4013000, 0xD40130FC, 0, "Trackball"}, not exist in spec */
102 {0xD4013100, 0xD4013108, 0, "JTAG"},
103 {0xD4013200, 0xD4013230, 0, "DRO"},
104 {0xD4014000, 0xD40140AC, 0, "Timer0"},
105/* {0xD4015000, 0xD4015068, 0, "APB_clock"}, already dumped above */
106 {0xD4016000, 0xD40160AC, 0, "Timer1"},
107 {0xD4017000, 0xD401702C, 0, "UART1"},
108 {0xD4018000, 0xD401802C, 0, "UART2"},
109 {0xD4019000, 0xD40191A8, 0, "GPIO"},
110 {0xD4019800, 0xD401980C, 0, "GPIO_Edge"},
111 {0xD401A000, 0xD401A008, 0, "PWM0"},
112 {0xD401A400, 0xD401A408, 0, "PWM1"},
113 {0xD401A800, 0xD401A808, 0, "PWM2"},
114 {0xD401AC00, 0xD401AC08, 0, "PWM3"},
115 {0xD401B000, 0xD401B08C, 0, "SSP1"},
116 {0xD401C000, 0xD401C08C, 0, "SSP3"},
117 {0xD401D000, 0xD401D014, 0, "AP_IPC"},
118 {0xD401D800, 0xD401D814, 0, "CP_IPC"},
119 {0xD401E000, 0xD401E32C, 0, "MFPR"},
120 {0xD401E800, 0xD401E830, 0, "IO_Power_0"},
121/* {0xD401EC00, 0xD401EC14, 0, "IO_Power_1"}, overlap with SFO */
122 {0xD401EC00, 0xD401EC14, 0, "SFO"},
123 {0xD401F000, 0xD401F0B0, 0, "Timer2"},
124/* {0xD4030000, 0xD403004C, 0, "TCU_0"}, not necessary */
125/* {0xD4030400, 0xD40307FC, 0, "TCU_1"}, not necessary */
126/* {0xD4031000, 0xD40318F4, 0, "XIRQ"}, not necessary */
127/* {0xD4032000, 0xD4032044, 0, "USIM1"}, not necessary */
128/* {0xD4033000, 0xD4033044, 0, "USIM2"}, not necessary */
129/* {0xD4034000, 0xD4034050, 0, "E_cip_core"}, not necessary */
130/* {0xD4034100, 0xD4034100, 0, "E_cip_data"}, not necessary */
131/* {0xD4035000, 0xD4035FFC, 0, "E_cip_ctrl"}, not necessary */
132/* {0xD4036000, 0xD403602C, 0, "GB_UART0"}, not necessary */
133/* {0xD4037000, 0xD4037058, 0, "GB_IIC"}, not necessary */
134/* {0xD4038000, 0xD403802C, 0, "GB_SCLK"}, not necessary */
135/* {0xD403B00C, 0xD403B00C, 0, "GSSP"}, inside GB Mreg */
136/* {0xD403A000, 0xD403A0AC, 0, "TimerCP"}, not necessary */
137/* {0xD403B000, 0xD403B03C, 0, "APB_CP_clock_ctrl"}, not necessary */
138/* {0xD403C000, 0xD403C014, 0, "GB_IPC"}, not necessary */
139/* {0xD403D000, 0xD403D01C, 0, "GB_R_IPC_0"}, not necessary */
140/* {0xD403D100, 0xD403D11C, 0, "GB_R_IPC_1"}, not necessary */
141/* {0xD403D200, 0xD403D21C, 0, "GB_R_IPC_2"}, not necessary */
142/* {0xD403D300, 0xD403D31C, 0, "GB_R_IPC_3"}, not necessary */
143/* {0xD4050000, 0xD405104C, 0, "Main PMU"}, already dumped above */
144/* {0xD4052000, 0xD4052058, 0, "Main_PMU_DVC"}, already dumped above */
145/* {0xD4060000, 0xD406FFFC, 0, "PMU_SCK"}, not exist in spec */
146 {0xD4070000, 0xD4070020, 0, "APB_Aux"},
147 {0xD4080000, 0xD40800AC, 0, "PMU_Timer"},
148 {0xD4090000, 0xD409000C, 0, "APB_spare_0"},
149 {0xD4090100, 0xD409010C, 0, "APB_spare_1"},
150/* {0xD4100000, 0xD41FFFFC, 0, "CoreSight"}, not necessary */
151 {0xD4101000, 0xD4101020, 0, "GenericCounter"},
152
153/* 0xD4200000 ~ 0xD4284FFF are AXI Peripheral registers */
154 {0xD4200200, 0xD4200260, 0, "AXI_Fab_0"},
155 {0xD4200408, 0xD42004CC, 0, "AXI_Fab_1"},
156/* {0xD4201000, 0xD42014C8, 0, "GEU"}, not necessary */
157 {0xD4207000, 0xD4207064, 0, "USB_utmi_phy"},
158 {0xD4207100, 0xD4207134, 0, "USB_utmi_old"},
159 {0xD4208000, 0xD42081FC, 0, "USB_device"},
160 {0xD420A000, 0xD420A23C, 0, "CCIC"},
161 {0xD420B000, 0xD420B1F4, 0, "LCD"},
162 {0xD420B800, 0xD420B9EC, 0, "DSI"},
163/* {0xD420D000, 0xD420DFFC, 0, "7542_Video_Decoder"}, not necessary */
164/* {0xD420E000, 0xD420EFFC, 0, "DTE(DDR Test)"}, not exist in spec */
165/* {0xD420F000, 0xD420FE38, 0, "ISPDMA"}, not necessary */
166/* {0xD4240000, 0xD427FFFC, 0, "DXO DMA config"}, not exist in spec */
167 {0xD4280000, 0xD428006C, 0, "SDH1_0"},
168 {0xD42800E0, 0xD42800E0, 0, "SDH1_1"},
169 {0xD42800FC, 0xD428011C, 0, "SDH1_2"},
170 {0xD4280800, 0xD428086C, 0, "SDH2_0"},
171 {0xD42808E0, 0xD42808E0, 0, "SDH2_1"},
172 {0xD42808FC, 0xD428091C, 0, "SDH2_2"},
173 {0xD4281000, 0xD428106C, 0, "SDH3_0"},
174 {0xD42810E0, 0xD42810E0, 0, "SDH3_1"},
175 {0xD42810FC, 0xD428111C, 0, "SDH3_2"},
176/* {0xD4282000, 0xD42823FC, 0, "ICU"}, already dumped above */
177/* {0xD4282800, 0xD4282970, 0, "AP PMU"}, already dumped above */
178/* {0xD4282C00, 0xD42820FC, 0, "CIU"}, already dumped above */
179/* {0xD4283000, 0xD428307C, 0, "NAND"}, if read, will hang */
180 {0xD4283800, 0xD4283840, 0, "SMC"},
181/* {0xD4284000, 0xD42840C0, 0, "DTC"}, if read, will hang */
182/* {0xD4290000, 0xD4290B78, 0, "HSI"}, if read, will hang */
183 {0xD42A0C00, 0xD42A0C8C, 0, "SSP3"},
184 {0 , 0 , 0, NULL }
185};
186
187#endif /* __ASM_MACH_REG_MAP_H
188# */