b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* |
| 3 | */ |
| 4 | |
| 5 | /* |
| 6 | * 2002-07 Benny Sjostrand benny@hostmobility.com |
| 7 | */ |
| 8 | |
| 9 | |
| 10 | #include <linux/io.h> |
| 11 | #include <linux/delay.h> |
| 12 | #include <linux/pm.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/slab.h> |
| 15 | #include <linux/vmalloc.h> |
| 16 | #include <linux/mutex.h> |
| 17 | |
| 18 | #include <sound/core.h> |
| 19 | #include <sound/control.h> |
| 20 | #include <sound/info.h> |
| 21 | #include <sound/asoundef.h> |
| 22 | #include "cs46xx.h" |
| 23 | |
| 24 | #include "cs46xx_lib.h" |
| 25 | #include "dsp_spos.h" |
| 26 | |
| 27 | static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, |
| 28 | struct dsp_scb_descriptor * fg_entry); |
| 29 | |
| 30 | static enum wide_opcode wide_opcodes[] = { |
| 31 | WIDE_FOR_BEGIN_LOOP, |
| 32 | WIDE_FOR_BEGIN_LOOP2, |
| 33 | WIDE_COND_GOTO_ADDR, |
| 34 | WIDE_COND_GOTO_CALL, |
| 35 | WIDE_TBEQ_COND_GOTO_ADDR, |
| 36 | WIDE_TBEQ_COND_CALL_ADDR, |
| 37 | WIDE_TBEQ_NCOND_GOTO_ADDR, |
| 38 | WIDE_TBEQ_NCOND_CALL_ADDR, |
| 39 | WIDE_TBEQ_COND_GOTO1_ADDR, |
| 40 | WIDE_TBEQ_COND_CALL1_ADDR, |
| 41 | WIDE_TBEQ_NCOND_GOTOI_ADDR, |
| 42 | WIDE_TBEQ_NCOND_CALL1_ADDR |
| 43 | }; |
| 44 | |
| 45 | static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size, |
| 46 | u32 overlay_begin_address) |
| 47 | { |
| 48 | unsigned int i = 0, j, nreallocated = 0; |
| 49 | u32 hival,loval,address; |
| 50 | u32 mop_operands,mop_type,wide_op; |
| 51 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 52 | |
| 53 | if (snd_BUG_ON(size %2)) |
| 54 | return -EINVAL; |
| 55 | |
| 56 | while (i < size) { |
| 57 | loval = data[i++]; |
| 58 | hival = data[i++]; |
| 59 | |
| 60 | if (ins->code.offset > 0) { |
| 61 | mop_operands = (hival >> 6) & 0x03fff; |
| 62 | mop_type = mop_operands >> 10; |
| 63 | |
| 64 | /* check for wide type instruction */ |
| 65 | if (mop_type == 0 && |
| 66 | (mop_operands & WIDE_LADD_INSTR_MASK) == 0 && |
| 67 | (mop_operands & WIDE_INSTR_MASK) != 0) { |
| 68 | wide_op = loval & 0x7f; |
| 69 | for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) { |
| 70 | if (wide_opcodes[j] == wide_op) { |
| 71 | /* need to reallocate instruction */ |
| 72 | address = (hival & 0x00FFF) << 5; |
| 73 | address |= loval >> 15; |
| 74 | |
| 75 | dev_dbg(chip->card->dev, |
| 76 | "handle_wideop[1]: %05x:%05x addr %04x\n", |
| 77 | hival, loval, address); |
| 78 | |
| 79 | if ( !(address & 0x8000) ) { |
| 80 | address += (ins->code.offset / 2) - overlay_begin_address; |
| 81 | } else { |
| 82 | dev_dbg(chip->card->dev, |
| 83 | "handle_wideop[1]: ROM symbol not reallocated\n"); |
| 84 | } |
| 85 | |
| 86 | hival &= 0xFF000; |
| 87 | loval &= 0x07FFF; |
| 88 | |
| 89 | hival |= ( (address >> 5) & 0x00FFF); |
| 90 | loval |= ( (address << 15) & 0xF8000); |
| 91 | |
| 92 | address = (hival & 0x00FFF) << 5; |
| 93 | address |= loval >> 15; |
| 94 | |
| 95 | dev_dbg(chip->card->dev, |
| 96 | "handle_wideop:[2] %05x:%05x addr %04x\n", |
| 97 | hival, loval, address); |
| 98 | nreallocated++; |
| 99 | } /* wide_opcodes[j] == wide_op */ |
| 100 | } /* for */ |
| 101 | } /* mod_type == 0 ... */ |
| 102 | } /* ins->code.offset > 0 */ |
| 103 | |
| 104 | ins->code.data[ins->code.size++] = loval; |
| 105 | ins->code.data[ins->code.size++] = hival; |
| 106 | } |
| 107 | |
| 108 | dev_dbg(chip->card->dev, |
| 109 | "dsp_spos: %d instructions reallocated\n", nreallocated); |
| 110 | return nreallocated; |
| 111 | } |
| 112 | |
| 113 | static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type) |
| 114 | { |
| 115 | int i; |
| 116 | for (i = 0;i < module->nsegments; ++i) { |
| 117 | if (module->segments[i].segment_type == seg_type) { |
| 118 | return (module->segments + i); |
| 119 | } |
| 120 | } |
| 121 | |
| 122 | return NULL; |
| 123 | }; |
| 124 | |
| 125 | static int find_free_symbol_index (struct dsp_spos_instance * ins) |
| 126 | { |
| 127 | int index = ins->symbol_table.nsymbols,i; |
| 128 | |
| 129 | for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) { |
| 130 | if (ins->symbol_table.symbols[i].deleted) { |
| 131 | index = i; |
| 132 | break; |
| 133 | } |
| 134 | } |
| 135 | |
| 136 | return index; |
| 137 | } |
| 138 | |
| 139 | static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module) |
| 140 | { |
| 141 | int i; |
| 142 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 143 | |
| 144 | if (module->symbol_table.nsymbols > 0) { |
| 145 | if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") && |
| 146 | module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) { |
| 147 | module->overlay_begin_address = module->symbol_table.symbols[0].address; |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | for (i = 0;i < module->symbol_table.nsymbols; ++i) { |
| 152 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { |
| 153 | dev_err(chip->card->dev, |
| 154 | "dsp_spos: symbol table is full\n"); |
| 155 | return -ENOMEM; |
| 156 | } |
| 157 | |
| 158 | |
| 159 | if (cs46xx_dsp_lookup_symbol(chip, |
| 160 | module->symbol_table.symbols[i].symbol_name, |
| 161 | module->symbol_table.symbols[i].symbol_type) == NULL) { |
| 162 | |
| 163 | ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i]; |
| 164 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address); |
| 165 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module; |
| 166 | ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0; |
| 167 | |
| 168 | if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index) |
| 169 | ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols; |
| 170 | |
| 171 | ins->symbol_table.nsymbols++; |
| 172 | } else { |
| 173 | #if 0 |
| 174 | dev_dbg(chip->card->dev, |
| 175 | "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n", |
| 176 | module->symbol_table.symbols[i].symbol_name); */ |
| 177 | #endif |
| 178 | } |
| 179 | } |
| 180 | |
| 181 | return 0; |
| 182 | } |
| 183 | |
| 184 | static struct dsp_symbol_entry * |
| 185 | add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type) |
| 186 | { |
| 187 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 188 | struct dsp_symbol_entry * symbol = NULL; |
| 189 | int index; |
| 190 | |
| 191 | if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) { |
| 192 | dev_err(chip->card->dev, "dsp_spos: symbol table is full\n"); |
| 193 | return NULL; |
| 194 | } |
| 195 | |
| 196 | if (cs46xx_dsp_lookup_symbol(chip, |
| 197 | symbol_name, |
| 198 | type) != NULL) { |
| 199 | dev_err(chip->card->dev, |
| 200 | "dsp_spos: symbol <%s> duplicated\n", symbol_name); |
| 201 | return NULL; |
| 202 | } |
| 203 | |
| 204 | index = find_free_symbol_index (ins); |
| 205 | |
| 206 | strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name); |
| 207 | ins->symbol_table.symbols[index].address = address; |
| 208 | ins->symbol_table.symbols[index].symbol_type = type; |
| 209 | ins->symbol_table.symbols[index].module = NULL; |
| 210 | ins->symbol_table.symbols[index].deleted = 0; |
| 211 | symbol = (ins->symbol_table.symbols + index); |
| 212 | |
| 213 | if (index > ins->symbol_table.highest_frag_index) |
| 214 | ins->symbol_table.highest_frag_index = index; |
| 215 | |
| 216 | if (index == ins->symbol_table.nsymbols) |
| 217 | ins->symbol_table.nsymbols++; /* no frag. in list */ |
| 218 | |
| 219 | return symbol; |
| 220 | } |
| 221 | |
| 222 | struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip) |
| 223 | { |
| 224 | struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL); |
| 225 | |
| 226 | if (ins == NULL) |
| 227 | return NULL; |
| 228 | |
| 229 | /* better to use vmalloc for this big table */ |
| 230 | ins->symbol_table.symbols = |
| 231 | vmalloc(array_size(DSP_MAX_SYMBOLS, |
| 232 | sizeof(struct dsp_symbol_entry))); |
| 233 | ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL); |
| 234 | ins->modules = kmalloc_array(DSP_MAX_MODULES, |
| 235 | sizeof(struct dsp_module_desc), |
| 236 | GFP_KERNEL); |
| 237 | if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) { |
| 238 | cs46xx_dsp_spos_destroy(chip); |
| 239 | goto error; |
| 240 | } |
| 241 | ins->symbol_table.nsymbols = 0; |
| 242 | ins->symbol_table.highest_frag_index = 0; |
| 243 | ins->code.offset = 0; |
| 244 | ins->code.size = 0; |
| 245 | ins->nscb = 0; |
| 246 | ins->ntask = 0; |
| 247 | ins->nmodules = 0; |
| 248 | |
| 249 | /* default SPDIF input sample rate |
| 250 | to 48000 khz */ |
| 251 | ins->spdif_in_sample_rate = 48000; |
| 252 | |
| 253 | /* maximize volume */ |
| 254 | ins->dac_volume_right = 0x8000; |
| 255 | ins->dac_volume_left = 0x8000; |
| 256 | ins->spdif_input_volume_right = 0x8000; |
| 257 | ins->spdif_input_volume_left = 0x8000; |
| 258 | |
| 259 | /* set left and right validity bits and |
| 260 | default channel status */ |
| 261 | ins->spdif_csuv_default = |
| 262 | ins->spdif_csuv_stream = |
| 263 | /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) | |
| 264 | /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) | |
| 265 | /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) | |
| 266 | /* left and right validity bits */ (1 << 13) | (1 << 12); |
| 267 | |
| 268 | return ins; |
| 269 | |
| 270 | error: |
| 271 | kfree(ins->modules); |
| 272 | kfree(ins->code.data); |
| 273 | vfree(ins->symbol_table.symbols); |
| 274 | kfree(ins); |
| 275 | return NULL; |
| 276 | } |
| 277 | |
| 278 | void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip) |
| 279 | { |
| 280 | int i; |
| 281 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 282 | |
| 283 | if (snd_BUG_ON(!ins)) |
| 284 | return; |
| 285 | |
| 286 | mutex_lock(&chip->spos_mutex); |
| 287 | for (i = 0; i < ins->nscb; ++i) { |
| 288 | if (ins->scbs[i].deleted) continue; |
| 289 | |
| 290 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); |
| 291 | #ifdef CONFIG_PM_SLEEP |
| 292 | kfree(ins->scbs[i].data); |
| 293 | #endif |
| 294 | } |
| 295 | |
| 296 | kfree(ins->code.data); |
| 297 | vfree(ins->symbol_table.symbols); |
| 298 | kfree(ins->modules); |
| 299 | kfree(ins); |
| 300 | mutex_unlock(&chip->spos_mutex); |
| 301 | } |
| 302 | |
| 303 | static int dsp_load_parameter(struct snd_cs46xx *chip, |
| 304 | struct dsp_segment_desc *parameter) |
| 305 | { |
| 306 | u32 doffset, dsize; |
| 307 | |
| 308 | if (!parameter) { |
| 309 | dev_dbg(chip->card->dev, |
| 310 | "dsp_spos: module got no parameter segment\n"); |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET); |
| 315 | dsize = parameter->size * 4; |
| 316 | |
| 317 | dev_dbg(chip->card->dev, |
| 318 | "dsp_spos: downloading parameter data to chip (%08x-%08x)\n", |
| 319 | doffset,doffset + dsize); |
| 320 | if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) { |
| 321 | dev_err(chip->card->dev, |
| 322 | "dsp_spos: failed to download parameter data to DSP\n"); |
| 323 | return -EINVAL; |
| 324 | } |
| 325 | return 0; |
| 326 | } |
| 327 | |
| 328 | static int dsp_load_sample(struct snd_cs46xx *chip, |
| 329 | struct dsp_segment_desc *sample) |
| 330 | { |
| 331 | u32 doffset, dsize; |
| 332 | |
| 333 | if (!sample) { |
| 334 | dev_dbg(chip->card->dev, |
| 335 | "dsp_spos: module got no sample segment\n"); |
| 336 | return 0; |
| 337 | } |
| 338 | |
| 339 | doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET); |
| 340 | dsize = sample->size * 4; |
| 341 | |
| 342 | dev_dbg(chip->card->dev, |
| 343 | "dsp_spos: downloading sample data to chip (%08x-%08x)\n", |
| 344 | doffset,doffset + dsize); |
| 345 | |
| 346 | if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) { |
| 347 | dev_err(chip->card->dev, |
| 348 | "dsp_spos: failed to sample data to DSP\n"); |
| 349 | return -EINVAL; |
| 350 | } |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module) |
| 355 | { |
| 356 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 357 | struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM); |
| 358 | u32 doffset, dsize; |
| 359 | int err; |
| 360 | |
| 361 | if (ins->nmodules == DSP_MAX_MODULES - 1) { |
| 362 | dev_err(chip->card->dev, |
| 363 | "dsp_spos: to many modules loaded into DSP\n"); |
| 364 | return -ENOMEM; |
| 365 | } |
| 366 | |
| 367 | dev_dbg(chip->card->dev, |
| 368 | "dsp_spos: loading module %s into DSP\n", module->module_name); |
| 369 | |
| 370 | if (ins->nmodules == 0) { |
| 371 | dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n"); |
| 372 | snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE); |
| 373 | } |
| 374 | |
| 375 | err = dsp_load_parameter(chip, get_segment_desc(module, |
| 376 | SEGTYPE_SP_PARAMETER)); |
| 377 | if (err < 0) |
| 378 | return err; |
| 379 | |
| 380 | if (ins->nmodules == 0) { |
| 381 | dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n"); |
| 382 | snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE); |
| 383 | } |
| 384 | |
| 385 | err = dsp_load_sample(chip, get_segment_desc(module, |
| 386 | SEGTYPE_SP_SAMPLE)); |
| 387 | if (err < 0) |
| 388 | return err; |
| 389 | |
| 390 | if (ins->nmodules == 0) { |
| 391 | dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n"); |
| 392 | snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); |
| 393 | } |
| 394 | |
| 395 | if (code == NULL) { |
| 396 | dev_dbg(chip->card->dev, |
| 397 | "dsp_spos: module got no code segment\n"); |
| 398 | } else { |
| 399 | if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) { |
| 400 | dev_err(chip->card->dev, |
| 401 | "dsp_spos: no space available in DSP\n"); |
| 402 | return -ENOMEM; |
| 403 | } |
| 404 | |
| 405 | module->load_address = ins->code.offset; |
| 406 | module->overlay_begin_address = 0x000; |
| 407 | |
| 408 | /* if module has a code segment it must have |
| 409 | symbol table */ |
| 410 | if (snd_BUG_ON(!module->symbol_table.symbols)) |
| 411 | return -ENOMEM; |
| 412 | if (add_symbols(chip,module)) { |
| 413 | dev_err(chip->card->dev, |
| 414 | "dsp_spos: failed to load symbol table\n"); |
| 415 | return -ENOMEM; |
| 416 | } |
| 417 | |
| 418 | doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET); |
| 419 | dsize = code->size * 4; |
| 420 | dev_dbg(chip->card->dev, |
| 421 | "dsp_spos: downloading code to chip (%08x-%08x)\n", |
| 422 | doffset,doffset + dsize); |
| 423 | |
| 424 | module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address); |
| 425 | |
| 426 | if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) { |
| 427 | dev_err(chip->card->dev, |
| 428 | "dsp_spos: failed to download code to DSP\n"); |
| 429 | return -EINVAL; |
| 430 | } |
| 431 | |
| 432 | ins->code.offset += code->size; |
| 433 | } |
| 434 | |
| 435 | /* NOTE: module segments and symbol table must be |
| 436 | statically allocated. Case that module data is |
| 437 | not generated by the ospparser */ |
| 438 | ins->modules[ins->nmodules] = *module; |
| 439 | ins->nmodules++; |
| 440 | |
| 441 | return 0; |
| 442 | } |
| 443 | |
| 444 | struct dsp_symbol_entry * |
| 445 | cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type) |
| 446 | { |
| 447 | int i; |
| 448 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 449 | |
| 450 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { |
| 451 | |
| 452 | if (ins->symbol_table.symbols[i].deleted) |
| 453 | continue; |
| 454 | |
| 455 | if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) && |
| 456 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { |
| 457 | return (ins->symbol_table.symbols + i); |
| 458 | } |
| 459 | } |
| 460 | |
| 461 | #if 0 |
| 462 | dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n", |
| 463 | symbol_name,symbol_type); |
| 464 | #endif |
| 465 | |
| 466 | return NULL; |
| 467 | } |
| 468 | |
| 469 | |
| 470 | #ifdef CONFIG_SND_PROC_FS |
| 471 | static struct dsp_symbol_entry * |
| 472 | cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type) |
| 473 | { |
| 474 | int i; |
| 475 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 476 | |
| 477 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { |
| 478 | |
| 479 | if (ins->symbol_table.symbols[i].deleted) |
| 480 | continue; |
| 481 | |
| 482 | if (ins->symbol_table.symbols[i].address == address && |
| 483 | ins->symbol_table.symbols[i].symbol_type == symbol_type) { |
| 484 | return (ins->symbol_table.symbols + i); |
| 485 | } |
| 486 | } |
| 487 | |
| 488 | |
| 489 | return NULL; |
| 490 | } |
| 491 | |
| 492 | |
| 493 | static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry, |
| 494 | struct snd_info_buffer *buffer) |
| 495 | { |
| 496 | struct snd_cs46xx *chip = entry->private_data; |
| 497 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 498 | int i; |
| 499 | |
| 500 | snd_iprintf(buffer, "SYMBOLS:\n"); |
| 501 | for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) { |
| 502 | char *module_str = "system"; |
| 503 | |
| 504 | if (ins->symbol_table.symbols[i].deleted) |
| 505 | continue; |
| 506 | |
| 507 | if (ins->symbol_table.symbols[i].module != NULL) { |
| 508 | module_str = ins->symbol_table.symbols[i].module->module_name; |
| 509 | } |
| 510 | |
| 511 | |
| 512 | snd_iprintf(buffer, "%04X <%02X> %s [%s]\n", |
| 513 | ins->symbol_table.symbols[i].address, |
| 514 | ins->symbol_table.symbols[i].symbol_type, |
| 515 | ins->symbol_table.symbols[i].symbol_name, |
| 516 | module_str); |
| 517 | } |
| 518 | } |
| 519 | |
| 520 | |
| 521 | static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry, |
| 522 | struct snd_info_buffer *buffer) |
| 523 | { |
| 524 | struct snd_cs46xx *chip = entry->private_data; |
| 525 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 526 | int i,j; |
| 527 | |
| 528 | mutex_lock(&chip->spos_mutex); |
| 529 | snd_iprintf(buffer, "MODULES:\n"); |
| 530 | for ( i = 0; i < ins->nmodules; ++i ) { |
| 531 | snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name); |
| 532 | snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols); |
| 533 | snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups); |
| 534 | |
| 535 | for (j = 0; j < ins->modules[i].nsegments; ++ j) { |
| 536 | struct dsp_segment_desc * desc = (ins->modules[i].segments + j); |
| 537 | snd_iprintf(buffer, " segment %02x offset %08x size %08x\n", |
| 538 | desc->segment_type,desc->offset, desc->size); |
| 539 | } |
| 540 | } |
| 541 | mutex_unlock(&chip->spos_mutex); |
| 542 | } |
| 543 | |
| 544 | static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry, |
| 545 | struct snd_info_buffer *buffer) |
| 546 | { |
| 547 | struct snd_cs46xx *chip = entry->private_data; |
| 548 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 549 | int i, j, col; |
| 550 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; |
| 551 | |
| 552 | mutex_lock(&chip->spos_mutex); |
| 553 | snd_iprintf(buffer, "TASK TREES:\n"); |
| 554 | for ( i = 0; i < ins->ntask; ++i) { |
| 555 | snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name); |
| 556 | |
| 557 | for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) { |
| 558 | u32 val; |
| 559 | if (col == 4) { |
| 560 | snd_iprintf(buffer,"\n"); |
| 561 | col = 0; |
| 562 | } |
| 563 | val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32)); |
| 564 | snd_iprintf(buffer,"%08x ",val); |
| 565 | } |
| 566 | } |
| 567 | |
| 568 | snd_iprintf(buffer,"\n"); |
| 569 | mutex_unlock(&chip->spos_mutex); |
| 570 | } |
| 571 | |
| 572 | static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry, |
| 573 | struct snd_info_buffer *buffer) |
| 574 | { |
| 575 | struct snd_cs46xx *chip = entry->private_data; |
| 576 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 577 | int i; |
| 578 | |
| 579 | mutex_lock(&chip->spos_mutex); |
| 580 | snd_iprintf(buffer, "SCB's:\n"); |
| 581 | for ( i = 0; i < ins->nscb; ++i) { |
| 582 | if (ins->scbs[i].deleted) |
| 583 | continue; |
| 584 | snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name); |
| 585 | |
| 586 | if (ins->scbs[i].parent_scb_ptr != NULL) { |
| 587 | snd_iprintf(buffer,"parent [%s:%04x] ", |
| 588 | ins->scbs[i].parent_scb_ptr->scb_name, |
| 589 | ins->scbs[i].parent_scb_ptr->address); |
| 590 | } else snd_iprintf(buffer,"parent [none] "); |
| 591 | |
| 592 | snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n", |
| 593 | ins->scbs[i].sub_list_ptr->scb_name, |
| 594 | ins->scbs[i].sub_list_ptr->address, |
| 595 | ins->scbs[i].next_scb_ptr->scb_name, |
| 596 | ins->scbs[i].next_scb_ptr->address, |
| 597 | ins->scbs[i].task_entry->symbol_name, |
| 598 | ins->scbs[i].task_entry->address); |
| 599 | } |
| 600 | |
| 601 | snd_iprintf(buffer,"\n"); |
| 602 | mutex_unlock(&chip->spos_mutex); |
| 603 | } |
| 604 | |
| 605 | static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry, |
| 606 | struct snd_info_buffer *buffer) |
| 607 | { |
| 608 | struct snd_cs46xx *chip = entry->private_data; |
| 609 | /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */ |
| 610 | unsigned int i, col = 0; |
| 611 | void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET; |
| 612 | struct dsp_symbol_entry * symbol; |
| 613 | |
| 614 | for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) { |
| 615 | if (col == 4) { |
| 616 | snd_iprintf(buffer,"\n"); |
| 617 | col = 0; |
| 618 | } |
| 619 | |
| 620 | if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) { |
| 621 | col = 0; |
| 622 | snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name); |
| 623 | } |
| 624 | |
| 625 | if (col == 0) { |
| 626 | snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32)); |
| 627 | } |
| 628 | |
| 629 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 630 | } |
| 631 | } |
| 632 | |
| 633 | static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry, |
| 634 | struct snd_info_buffer *buffer) |
| 635 | { |
| 636 | struct snd_cs46xx *chip = entry->private_data; |
| 637 | int i,col = 0; |
| 638 | void __iomem *dst = chip->region.idx[2].remap_addr; |
| 639 | |
| 640 | snd_iprintf(buffer,"PCMREADER:\n"); |
| 641 | for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) { |
| 642 | if (col == 4) { |
| 643 | snd_iprintf(buffer,"\n"); |
| 644 | col = 0; |
| 645 | } |
| 646 | |
| 647 | if (col == 0) { |
| 648 | snd_iprintf(buffer, "%04X ",i); |
| 649 | } |
| 650 | |
| 651 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 652 | } |
| 653 | |
| 654 | snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n"); |
| 655 | |
| 656 | col = 0; |
| 657 | for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) { |
| 658 | if (col == 4) { |
| 659 | snd_iprintf(buffer,"\n"); |
| 660 | col = 0; |
| 661 | } |
| 662 | |
| 663 | if (col == 0) { |
| 664 | snd_iprintf(buffer, "%04X ",i); |
| 665 | } |
| 666 | |
| 667 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 668 | } |
| 669 | |
| 670 | snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n"); |
| 671 | col = 0; |
| 672 | for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) { |
| 673 | if (col == 4) { |
| 674 | snd_iprintf(buffer,"\n"); |
| 675 | col = 0; |
| 676 | } |
| 677 | |
| 678 | if (col == 0) { |
| 679 | snd_iprintf(buffer, "%04X ",i); |
| 680 | } |
| 681 | |
| 682 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 683 | } |
| 684 | |
| 685 | |
| 686 | snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n"); |
| 687 | col = 0; |
| 688 | for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) { |
| 689 | if (col == 4) { |
| 690 | snd_iprintf(buffer,"\n"); |
| 691 | col = 0; |
| 692 | } |
| 693 | |
| 694 | if (col == 0) { |
| 695 | snd_iprintf(buffer, "%04X ",i); |
| 696 | } |
| 697 | |
| 698 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 699 | } |
| 700 | |
| 701 | snd_iprintf(buffer,"\n...\n"); |
| 702 | col = 0; |
| 703 | |
| 704 | for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) { |
| 705 | if (col == 4) { |
| 706 | snd_iprintf(buffer,"\n"); |
| 707 | col = 0; |
| 708 | } |
| 709 | |
| 710 | if (col == 0) { |
| 711 | snd_iprintf(buffer, "%04X ",i); |
| 712 | } |
| 713 | |
| 714 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 715 | } |
| 716 | |
| 717 | |
| 718 | snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n"); |
| 719 | col = 0; |
| 720 | for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) { |
| 721 | if (col == 4) { |
| 722 | snd_iprintf(buffer,"\n"); |
| 723 | col = 0; |
| 724 | } |
| 725 | |
| 726 | if (col == 0) { |
| 727 | snd_iprintf(buffer, "%04X ",i); |
| 728 | } |
| 729 | |
| 730 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 731 | } |
| 732 | |
| 733 | snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n"); |
| 734 | col = 0; |
| 735 | for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) { |
| 736 | if (col == 4) { |
| 737 | snd_iprintf(buffer,"\n"); |
| 738 | col = 0; |
| 739 | } |
| 740 | |
| 741 | if (col == 0) { |
| 742 | snd_iprintf(buffer, "%04X ",i); |
| 743 | } |
| 744 | |
| 745 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 746 | } |
| 747 | #if 0 |
| 748 | snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n"); |
| 749 | col = 0; |
| 750 | for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) { |
| 751 | if (col == 4) { |
| 752 | snd_iprintf(buffer,"\n"); |
| 753 | col = 0; |
| 754 | } |
| 755 | |
| 756 | if (col == 0) { |
| 757 | snd_iprintf(buffer, "%04X ",i); |
| 758 | } |
| 759 | |
| 760 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 761 | } |
| 762 | #endif |
| 763 | |
| 764 | snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n"); |
| 765 | col = 0; |
| 766 | for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) { |
| 767 | if (col == 4) { |
| 768 | snd_iprintf(buffer,"\n"); |
| 769 | col = 0; |
| 770 | } |
| 771 | |
| 772 | if (col == 0) { |
| 773 | snd_iprintf(buffer, "%04X ",i); |
| 774 | } |
| 775 | |
| 776 | snd_iprintf(buffer,"%08X ",readl(dst + i)); |
| 777 | } |
| 778 | snd_iprintf(buffer,"\n"); |
| 779 | } |
| 780 | |
| 781 | int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip) |
| 782 | { |
| 783 | struct snd_info_entry *entry; |
| 784 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 785 | int i; |
| 786 | |
| 787 | ins->snd_card = card; |
| 788 | |
| 789 | entry = snd_info_create_card_entry(card, "dsp", card->proc_root); |
| 790 | if (entry) |
| 791 | entry->mode = S_IFDIR | 0555; |
| 792 | ins->proc_dsp_dir = entry; |
| 793 | |
| 794 | if (!ins->proc_dsp_dir) |
| 795 | return -ENOMEM; |
| 796 | |
| 797 | entry = snd_info_create_card_entry(card, "spos_symbols", |
| 798 | ins->proc_dsp_dir); |
| 799 | if (entry) |
| 800 | snd_info_set_text_ops(entry, chip, |
| 801 | cs46xx_dsp_proc_symbol_table_read); |
| 802 | |
| 803 | entry = snd_info_create_card_entry(card, "spos_modules", |
| 804 | ins->proc_dsp_dir); |
| 805 | if (entry) |
| 806 | snd_info_set_text_ops(entry, chip, |
| 807 | cs46xx_dsp_proc_modules_read); |
| 808 | |
| 809 | entry = snd_info_create_card_entry(card, "parameter", |
| 810 | ins->proc_dsp_dir); |
| 811 | if (entry) |
| 812 | snd_info_set_text_ops(entry, chip, |
| 813 | cs46xx_dsp_proc_parameter_dump_read); |
| 814 | |
| 815 | entry = snd_info_create_card_entry(card, "sample", |
| 816 | ins->proc_dsp_dir); |
| 817 | if (entry) |
| 818 | snd_info_set_text_ops(entry, chip, |
| 819 | cs46xx_dsp_proc_sample_dump_read); |
| 820 | |
| 821 | entry = snd_info_create_card_entry(card, "task_tree", |
| 822 | ins->proc_dsp_dir); |
| 823 | if (entry) |
| 824 | snd_info_set_text_ops(entry, chip, |
| 825 | cs46xx_dsp_proc_task_tree_read); |
| 826 | |
| 827 | entry = snd_info_create_card_entry(card, "scb_info", |
| 828 | ins->proc_dsp_dir); |
| 829 | if (entry) |
| 830 | snd_info_set_text_ops(entry, chip, |
| 831 | cs46xx_dsp_proc_scb_read); |
| 832 | |
| 833 | mutex_lock(&chip->spos_mutex); |
| 834 | /* register/update SCB's entries on proc */ |
| 835 | for (i = 0; i < ins->nscb; ++i) { |
| 836 | if (ins->scbs[i].deleted) continue; |
| 837 | |
| 838 | cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i)); |
| 839 | } |
| 840 | mutex_unlock(&chip->spos_mutex); |
| 841 | |
| 842 | return 0; |
| 843 | } |
| 844 | |
| 845 | int cs46xx_dsp_proc_done (struct snd_cs46xx *chip) |
| 846 | { |
| 847 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 848 | int i; |
| 849 | |
| 850 | if (!ins) |
| 851 | return 0; |
| 852 | |
| 853 | mutex_lock(&chip->spos_mutex); |
| 854 | for (i = 0; i < ins->nscb; ++i) { |
| 855 | if (ins->scbs[i].deleted) continue; |
| 856 | cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) ); |
| 857 | } |
| 858 | mutex_unlock(&chip->spos_mutex); |
| 859 | |
| 860 | snd_info_free_entry(ins->proc_dsp_dir); |
| 861 | ins->proc_dsp_dir = NULL; |
| 862 | |
| 863 | return 0; |
| 864 | } |
| 865 | #endif /* CONFIG_SND_PROC_FS */ |
| 866 | |
| 867 | static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data, |
| 868 | u32 dest, int size) |
| 869 | { |
| 870 | void __iomem *spdst = chip->region.idx[1].remap_addr + |
| 871 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); |
| 872 | int i; |
| 873 | |
| 874 | for (i = 0; i < size; ++i) { |
| 875 | dev_dbg(chip->card->dev, "addr %p, val %08x\n", |
| 876 | spdst, task_data[i]); |
| 877 | writel(task_data[i],spdst); |
| 878 | spdst += sizeof(u32); |
| 879 | } |
| 880 | } |
| 881 | |
| 882 | static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest) |
| 883 | { |
| 884 | void __iomem *spdst = chip->region.idx[1].remap_addr + |
| 885 | DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32); |
| 886 | int i; |
| 887 | |
| 888 | for (i = 0; i < 0x10; ++i) { |
| 889 | dev_dbg(chip->card->dev, "addr %p, val %08x\n", |
| 890 | spdst, scb_data[i]); |
| 891 | writel(scb_data[i],spdst); |
| 892 | spdst += sizeof(u32); |
| 893 | } |
| 894 | } |
| 895 | |
| 896 | static int find_free_scb_index (struct dsp_spos_instance * ins) |
| 897 | { |
| 898 | int index = ins->nscb, i; |
| 899 | |
| 900 | for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) { |
| 901 | if (ins->scbs[i].deleted) { |
| 902 | index = i; |
| 903 | break; |
| 904 | } |
| 905 | } |
| 906 | |
| 907 | return index; |
| 908 | } |
| 909 | |
| 910 | static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest) |
| 911 | { |
| 912 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 913 | struct dsp_scb_descriptor * desc = NULL; |
| 914 | int index; |
| 915 | |
| 916 | if (ins->nscb == DSP_MAX_SCB_DESC - 1) { |
| 917 | dev_err(chip->card->dev, |
| 918 | "dsp_spos: got no place for other SCB\n"); |
| 919 | return NULL; |
| 920 | } |
| 921 | |
| 922 | index = find_free_scb_index (ins); |
| 923 | |
| 924 | memset(&ins->scbs[index], 0, sizeof(ins->scbs[index])); |
| 925 | strcpy(ins->scbs[index].scb_name, name); |
| 926 | ins->scbs[index].address = dest; |
| 927 | ins->scbs[index].index = index; |
| 928 | ins->scbs[index].ref_count = 1; |
| 929 | |
| 930 | desc = (ins->scbs + index); |
| 931 | ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER); |
| 932 | |
| 933 | if (index > ins->scb_highest_frag_index) |
| 934 | ins->scb_highest_frag_index = index; |
| 935 | |
| 936 | if (index == ins->nscb) |
| 937 | ins->nscb++; |
| 938 | |
| 939 | return desc; |
| 940 | } |
| 941 | |
| 942 | static struct dsp_task_descriptor * |
| 943 | _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size) |
| 944 | { |
| 945 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 946 | struct dsp_task_descriptor * desc = NULL; |
| 947 | |
| 948 | if (ins->ntask == DSP_MAX_TASK_DESC - 1) { |
| 949 | dev_err(chip->card->dev, |
| 950 | "dsp_spos: got no place for other TASK\n"); |
| 951 | return NULL; |
| 952 | } |
| 953 | |
| 954 | if (name) |
| 955 | strcpy(ins->tasks[ins->ntask].task_name, name); |
| 956 | else |
| 957 | strcpy(ins->tasks[ins->ntask].task_name, "(NULL)"); |
| 958 | ins->tasks[ins->ntask].address = dest; |
| 959 | ins->tasks[ins->ntask].size = size; |
| 960 | |
| 961 | /* quick find in list */ |
| 962 | ins->tasks[ins->ntask].index = ins->ntask; |
| 963 | desc = (ins->tasks + ins->ntask); |
| 964 | ins->ntask++; |
| 965 | |
| 966 | if (name) |
| 967 | add_symbol (chip,name,dest,SYMBOL_PARAMETER); |
| 968 | return desc; |
| 969 | } |
| 970 | |
| 971 | #define SCB_BYTES (0x10 * 4) |
| 972 | |
| 973 | struct dsp_scb_descriptor * |
| 974 | cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest) |
| 975 | { |
| 976 | struct dsp_scb_descriptor * desc; |
| 977 | |
| 978 | #ifdef CONFIG_PM_SLEEP |
| 979 | /* copy the data for resume */ |
| 980 | scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL); |
| 981 | if (!scb_data) |
| 982 | return NULL; |
| 983 | #endif |
| 984 | |
| 985 | desc = _map_scb (chip,name,dest); |
| 986 | if (desc) { |
| 987 | desc->data = scb_data; |
| 988 | _dsp_create_scb(chip,scb_data,dest); |
| 989 | } else { |
| 990 | dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n"); |
| 991 | #ifdef CONFIG_PM_SLEEP |
| 992 | kfree(scb_data); |
| 993 | #endif |
| 994 | } |
| 995 | |
| 996 | return desc; |
| 997 | } |
| 998 | |
| 999 | |
| 1000 | static struct dsp_task_descriptor * |
| 1001 | cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data, |
| 1002 | u32 dest, int size) |
| 1003 | { |
| 1004 | struct dsp_task_descriptor * desc; |
| 1005 | |
| 1006 | desc = _map_task_tree (chip,name,dest,size); |
| 1007 | if (desc) { |
| 1008 | desc->data = task_data; |
| 1009 | _dsp_create_task_tree(chip,task_data,dest,size); |
| 1010 | } else { |
| 1011 | dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n"); |
| 1012 | } |
| 1013 | |
| 1014 | return desc; |
| 1015 | } |
| 1016 | |
| 1017 | int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip) |
| 1018 | { |
| 1019 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1020 | struct dsp_symbol_entry * fg_task_tree_header_code; |
| 1021 | struct dsp_symbol_entry * task_tree_header_code; |
| 1022 | struct dsp_symbol_entry * task_tree_thread; |
| 1023 | struct dsp_symbol_entry * null_algorithm; |
| 1024 | struct dsp_symbol_entry * magic_snoop_task; |
| 1025 | |
| 1026 | struct dsp_scb_descriptor * timing_master_scb; |
| 1027 | struct dsp_scb_descriptor * codec_out_scb; |
| 1028 | struct dsp_scb_descriptor * codec_in_scb; |
| 1029 | struct dsp_scb_descriptor * src_task_scb; |
| 1030 | struct dsp_scb_descriptor * master_mix_scb; |
| 1031 | struct dsp_scb_descriptor * rear_mix_scb; |
| 1032 | struct dsp_scb_descriptor * record_mix_scb; |
| 1033 | struct dsp_scb_descriptor * write_back_scb; |
| 1034 | struct dsp_scb_descriptor * vari_decimate_scb; |
| 1035 | struct dsp_scb_descriptor * rear_codec_out_scb; |
| 1036 | struct dsp_scb_descriptor * clfe_codec_out_scb; |
| 1037 | struct dsp_scb_descriptor * magic_snoop_scb; |
| 1038 | |
| 1039 | int fifo_addr, fifo_span, valid_slots; |
| 1040 | |
| 1041 | static struct dsp_spos_control_block sposcb = { |
| 1042 | /* 0 */ HFG_TREE_SCB,HFG_STACK, |
| 1043 | /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR, |
| 1044 | /* 2 */ DSP_SPOS_DC,0, |
| 1045 | /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC, |
| 1046 | /* 4 */ 0,0, |
| 1047 | /* 5 */ DSP_SPOS_UU,0, |
| 1048 | /* 6 */ FG_TASK_HEADER_ADDR,0, |
| 1049 | /* 7 */ 0,0, |
| 1050 | /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC, |
| 1051 | /* 9 */ 0, |
| 1052 | /* A */ 0,HFG_FIRST_EXECUTE_MODE, |
| 1053 | /* B */ DSP_SPOS_UU,DSP_SPOS_UU, |
| 1054 | /* C */ DSP_SPOS_DC_DC, |
| 1055 | /* D */ DSP_SPOS_DC_DC, |
| 1056 | /* E */ DSP_SPOS_DC_DC, |
| 1057 | /* F */ DSP_SPOS_DC_DC |
| 1058 | }; |
| 1059 | |
| 1060 | cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10); |
| 1061 | |
| 1062 | null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE); |
| 1063 | if (null_algorithm == NULL) { |
| 1064 | dev_err(chip->card->dev, |
| 1065 | "dsp_spos: symbol NULLALGORITHM not found\n"); |
| 1066 | return -EIO; |
| 1067 | } |
| 1068 | |
| 1069 | fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE); |
| 1070 | if (fg_task_tree_header_code == NULL) { |
| 1071 | dev_err(chip->card->dev, |
| 1072 | "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n"); |
| 1073 | return -EIO; |
| 1074 | } |
| 1075 | |
| 1076 | task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE); |
| 1077 | if (task_tree_header_code == NULL) { |
| 1078 | dev_err(chip->card->dev, |
| 1079 | "dsp_spos: symbol TASKTREEHEADERCODE not found\n"); |
| 1080 | return -EIO; |
| 1081 | } |
| 1082 | |
| 1083 | task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE); |
| 1084 | if (task_tree_thread == NULL) { |
| 1085 | dev_err(chip->card->dev, |
| 1086 | "dsp_spos: symbol TASKTREETHREAD not found\n"); |
| 1087 | return -EIO; |
| 1088 | } |
| 1089 | |
| 1090 | magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE); |
| 1091 | if (magic_snoop_task == NULL) { |
| 1092 | dev_err(chip->card->dev, |
| 1093 | "dsp_spos: symbol MAGICSNOOPTASK not found\n"); |
| 1094 | return -EIO; |
| 1095 | } |
| 1096 | |
| 1097 | { |
| 1098 | /* create the null SCB */ |
| 1099 | static struct dsp_generic_scb null_scb = { |
| 1100 | { 0, 0, 0, 0 }, |
| 1101 | { 0, 0, 0, 0, 0 }, |
| 1102 | NULL_SCB_ADDR, NULL_SCB_ADDR, |
| 1103 | 0, 0, 0, 0, 0, |
| 1104 | { |
| 1105 | 0,0, |
| 1106 | 0,0, |
| 1107 | } |
| 1108 | }; |
| 1109 | |
| 1110 | null_scb.entry_point = null_algorithm->address; |
| 1111 | ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR); |
| 1112 | ins->the_null_scb->task_entry = null_algorithm; |
| 1113 | ins->the_null_scb->sub_list_ptr = ins->the_null_scb; |
| 1114 | ins->the_null_scb->next_scb_ptr = ins->the_null_scb; |
| 1115 | ins->the_null_scb->parent_scb_ptr = NULL; |
| 1116 | cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb); |
| 1117 | } |
| 1118 | |
| 1119 | { |
| 1120 | /* setup foreground task tree */ |
| 1121 | static struct dsp_task_tree_control_block fg_task_tree_hdr = { |
| 1122 | { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10), |
| 1123 | DSP_SPOS_DC_DC, |
| 1124 | DSP_SPOS_DC_DC, |
| 1125 | 0x0000,DSP_SPOS_DC, |
| 1126 | DSP_SPOS_DC, DSP_SPOS_DC, |
| 1127 | DSP_SPOS_DC_DC, |
| 1128 | DSP_SPOS_DC_DC, |
| 1129 | DSP_SPOS_DC_DC, |
| 1130 | DSP_SPOS_DC,DSP_SPOS_DC }, |
| 1131 | |
| 1132 | { |
| 1133 | BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR, |
| 1134 | 0, |
| 1135 | FG_TASK_HEADER_ADDR + TCBData, |
| 1136 | }, |
| 1137 | |
| 1138 | { |
| 1139 | 4,0, |
| 1140 | 1,0, |
| 1141 | 2,SPOSCB_ADDR + HFGFlags, |
| 1142 | 0,0, |
| 1143 | FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK |
| 1144 | }, |
| 1145 | |
| 1146 | { |
| 1147 | DSP_SPOS_DC,0, |
| 1148 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1149 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1150 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1151 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1152 | DSP_SPOS_DCDC, |
| 1153 | DSP_SPOS_UU,1, |
| 1154 | DSP_SPOS_DCDC, |
| 1155 | DSP_SPOS_DCDC, |
| 1156 | DSP_SPOS_DCDC, |
| 1157 | DSP_SPOS_DCDC, |
| 1158 | DSP_SPOS_DCDC, |
| 1159 | DSP_SPOS_DCDC, |
| 1160 | DSP_SPOS_DCDC, |
| 1161 | DSP_SPOS_DCDC, |
| 1162 | DSP_SPOS_DCDC, |
| 1163 | DSP_SPOS_DCDC, |
| 1164 | DSP_SPOS_DCDC, |
| 1165 | DSP_SPOS_DCDC, |
| 1166 | DSP_SPOS_DCDC, |
| 1167 | DSP_SPOS_DCDC, |
| 1168 | DSP_SPOS_DCDC, |
| 1169 | DSP_SPOS_DCDC, |
| 1170 | DSP_SPOS_DCDC, |
| 1171 | DSP_SPOS_DCDC, |
| 1172 | DSP_SPOS_DCDC, |
| 1173 | DSP_SPOS_DCDC, |
| 1174 | DSP_SPOS_DCDC, |
| 1175 | DSP_SPOS_DCDC, |
| 1176 | DSP_SPOS_DCDC, |
| 1177 | DSP_SPOS_DCDC, |
| 1178 | DSP_SPOS_DCDC, |
| 1179 | DSP_SPOS_DCDC, |
| 1180 | DSP_SPOS_DCDC, |
| 1181 | DSP_SPOS_DCDC |
| 1182 | }, |
| 1183 | { |
| 1184 | FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, |
| 1185 | 0,0 |
| 1186 | } |
| 1187 | }; |
| 1188 | |
| 1189 | fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address; |
| 1190 | fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; |
| 1191 | cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35); |
| 1192 | } |
| 1193 | |
| 1194 | |
| 1195 | { |
| 1196 | /* setup foreground task tree */ |
| 1197 | static struct dsp_task_tree_control_block bg_task_tree_hdr = { |
| 1198 | { DSP_SPOS_DC_DC, |
| 1199 | DSP_SPOS_DC_DC, |
| 1200 | DSP_SPOS_DC_DC, |
| 1201 | DSP_SPOS_DC, DSP_SPOS_DC, |
| 1202 | DSP_SPOS_DC, DSP_SPOS_DC, |
| 1203 | DSP_SPOS_DC_DC, |
| 1204 | DSP_SPOS_DC_DC, |
| 1205 | DSP_SPOS_DC_DC, |
| 1206 | DSP_SPOS_DC,DSP_SPOS_DC }, |
| 1207 | |
| 1208 | { |
| 1209 | NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */ |
| 1210 | 0, |
| 1211 | BG_TREE_SCB_ADDR + TCBData, |
| 1212 | }, |
| 1213 | |
| 1214 | { |
| 1215 | 9999,0, |
| 1216 | 0,1, |
| 1217 | 0,SPOSCB_ADDR + HFGFlags, |
| 1218 | 0,0, |
| 1219 | BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK |
| 1220 | }, |
| 1221 | |
| 1222 | { |
| 1223 | DSP_SPOS_DC,0, |
| 1224 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1225 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1226 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1227 | DSP_SPOS_DC,DSP_SPOS_DC, |
| 1228 | DSP_SPOS_DCDC, |
| 1229 | DSP_SPOS_UU,1, |
| 1230 | DSP_SPOS_DCDC, |
| 1231 | DSP_SPOS_DCDC, |
| 1232 | DSP_SPOS_DCDC, |
| 1233 | DSP_SPOS_DCDC, |
| 1234 | DSP_SPOS_DCDC, |
| 1235 | DSP_SPOS_DCDC, |
| 1236 | DSP_SPOS_DCDC, |
| 1237 | DSP_SPOS_DCDC, |
| 1238 | DSP_SPOS_DCDC, |
| 1239 | DSP_SPOS_DCDC, |
| 1240 | DSP_SPOS_DCDC, |
| 1241 | DSP_SPOS_DCDC, |
| 1242 | DSP_SPOS_DCDC, |
| 1243 | DSP_SPOS_DCDC, |
| 1244 | DSP_SPOS_DCDC, |
| 1245 | DSP_SPOS_DCDC, |
| 1246 | DSP_SPOS_DCDC, |
| 1247 | DSP_SPOS_DCDC, |
| 1248 | DSP_SPOS_DCDC, |
| 1249 | DSP_SPOS_DCDC, |
| 1250 | DSP_SPOS_DCDC, |
| 1251 | DSP_SPOS_DCDC, |
| 1252 | DSP_SPOS_DCDC, |
| 1253 | DSP_SPOS_DCDC, |
| 1254 | DSP_SPOS_DCDC, |
| 1255 | DSP_SPOS_DCDC, |
| 1256 | DSP_SPOS_DCDC, |
| 1257 | DSP_SPOS_DCDC |
| 1258 | }, |
| 1259 | { |
| 1260 | BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU, |
| 1261 | 0,0 |
| 1262 | } |
| 1263 | }; |
| 1264 | |
| 1265 | bg_task_tree_hdr.links.entry_point = task_tree_header_code->address; |
| 1266 | bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address; |
| 1267 | cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35); |
| 1268 | } |
| 1269 | |
| 1270 | /* create timing master SCB */ |
| 1271 | timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip); |
| 1272 | |
| 1273 | /* create the CODEC output task */ |
| 1274 | codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000, |
| 1275 | MASTERMIX_SCB_ADDR, |
| 1276 | CODECOUT_SCB_ADDR,timing_master_scb, |
| 1277 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1278 | |
| 1279 | if (!codec_out_scb) goto _fail_end; |
| 1280 | /* create the master mix SCB */ |
| 1281 | master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB", |
| 1282 | MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR, |
| 1283 | codec_out_scb, |
| 1284 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1285 | ins->master_mix_scb = master_mix_scb; |
| 1286 | |
| 1287 | if (!master_mix_scb) goto _fail_end; |
| 1288 | |
| 1289 | /* create codec in */ |
| 1290 | codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0, |
| 1291 | CODEC_INPUT_BUF1, |
| 1292 | CODECIN_SCB_ADDR,codec_out_scb, |
| 1293 | SCB_ON_PARENT_NEXT_SCB); |
| 1294 | if (!codec_in_scb) goto _fail_end; |
| 1295 | ins->codec_in_scb = codec_in_scb; |
| 1296 | |
| 1297 | /* create write back scb */ |
| 1298 | write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB", |
| 1299 | WRITE_BACK_BUF1,WRITE_BACK_SPB, |
| 1300 | WRITEBACK_SCB_ADDR, |
| 1301 | timing_master_scb, |
| 1302 | SCB_ON_PARENT_NEXT_SCB); |
| 1303 | if (!write_back_scb) goto _fail_end; |
| 1304 | |
| 1305 | { |
| 1306 | static struct dsp_mix2_ostream_spb mix2_ostream_spb = { |
| 1307 | 0x00020000, |
| 1308 | 0x0000ffff |
| 1309 | }; |
| 1310 | |
| 1311 | if (!cs46xx_dsp_create_task_tree(chip, NULL, |
| 1312 | (u32 *)&mix2_ostream_spb, |
| 1313 | WRITE_BACK_SPB, 2)) |
| 1314 | goto _fail_end; |
| 1315 | } |
| 1316 | |
| 1317 | /* input sample converter */ |
| 1318 | vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB", |
| 1319 | VARI_DECIMATE_BUF0, |
| 1320 | VARI_DECIMATE_BUF1, |
| 1321 | VARIDECIMATE_SCB_ADDR, |
| 1322 | write_back_scb, |
| 1323 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1324 | if (!vari_decimate_scb) goto _fail_end; |
| 1325 | |
| 1326 | /* create the record mixer SCB */ |
| 1327 | record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB", |
| 1328 | MIX_SAMPLE_BUF2, |
| 1329 | RECORD_MIXER_SCB_ADDR, |
| 1330 | vari_decimate_scb, |
| 1331 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1332 | ins->record_mixer_scb = record_mix_scb; |
| 1333 | |
| 1334 | if (!record_mix_scb) goto _fail_end; |
| 1335 | |
| 1336 | valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV); |
| 1337 | |
| 1338 | if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2)) |
| 1339 | goto _fail_end; |
| 1340 | |
| 1341 | if (chip->nr_ac97_codecs == 1) { |
| 1342 | /* output on slot 5 and 11 |
| 1343 | on primary CODEC */ |
| 1344 | fifo_addr = 0x20; |
| 1345 | fifo_span = 0x60; |
| 1346 | |
| 1347 | /* enable slot 5 and 11 */ |
| 1348 | valid_slots |= ACOSV_SLV5 | ACOSV_SLV11; |
| 1349 | } else { |
| 1350 | /* output on slot 7 and 8 |
| 1351 | on secondary CODEC */ |
| 1352 | fifo_addr = 0x40; |
| 1353 | fifo_span = 0x10; |
| 1354 | |
| 1355 | /* enable slot 7 and 8 */ |
| 1356 | valid_slots |= ACOSV_SLV7 | ACOSV_SLV8; |
| 1357 | } |
| 1358 | /* create CODEC tasklet for rear speakers output*/ |
| 1359 | rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr, |
| 1360 | REAR_MIXER_SCB_ADDR, |
| 1361 | REAR_CODECOUT_SCB_ADDR,codec_in_scb, |
| 1362 | SCB_ON_PARENT_NEXT_SCB); |
| 1363 | if (!rear_codec_out_scb) goto _fail_end; |
| 1364 | |
| 1365 | |
| 1366 | /* create the rear PCM channel mixer SCB */ |
| 1367 | rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB", |
| 1368 | MIX_SAMPLE_BUF3, |
| 1369 | REAR_MIXER_SCB_ADDR, |
| 1370 | rear_codec_out_scb, |
| 1371 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1372 | ins->rear_mix_scb = rear_mix_scb; |
| 1373 | if (!rear_mix_scb) goto _fail_end; |
| 1374 | |
| 1375 | if (chip->nr_ac97_codecs == 2) { |
| 1376 | /* create CODEC tasklet for rear Center/LFE output |
| 1377 | slot 6 and 9 on secondary CODEC */ |
| 1378 | clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030, |
| 1379 | CLFE_MIXER_SCB_ADDR, |
| 1380 | CLFE_CODEC_SCB_ADDR, |
| 1381 | rear_codec_out_scb, |
| 1382 | SCB_ON_PARENT_NEXT_SCB); |
| 1383 | if (!clfe_codec_out_scb) goto _fail_end; |
| 1384 | |
| 1385 | |
| 1386 | /* create the rear PCM channel mixer SCB */ |
| 1387 | ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB", |
| 1388 | MIX_SAMPLE_BUF4, |
| 1389 | CLFE_MIXER_SCB_ADDR, |
| 1390 | clfe_codec_out_scb, |
| 1391 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1392 | if (!ins->center_lfe_mix_scb) goto _fail_end; |
| 1393 | |
| 1394 | /* enable slot 6 and 9 */ |
| 1395 | valid_slots |= ACOSV_SLV6 | ACOSV_SLV9; |
| 1396 | } else { |
| 1397 | clfe_codec_out_scb = rear_codec_out_scb; |
| 1398 | ins->center_lfe_mix_scb = rear_mix_scb; |
| 1399 | } |
| 1400 | |
| 1401 | /* enable slots depending on CODEC configuration */ |
| 1402 | snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots); |
| 1403 | |
| 1404 | /* the magic snooper */ |
| 1405 | magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR, |
| 1406 | OUTPUT_SNOOP_BUFFER, |
| 1407 | codec_out_scb, |
| 1408 | clfe_codec_out_scb, |
| 1409 | SCB_ON_PARENT_NEXT_SCB); |
| 1410 | |
| 1411 | |
| 1412 | if (!magic_snoop_scb) goto _fail_end; |
| 1413 | ins->ref_snoop_scb = magic_snoop_scb; |
| 1414 | |
| 1415 | /* SP IO access */ |
| 1416 | if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR, |
| 1417 | magic_snoop_scb, |
| 1418 | SCB_ON_PARENT_NEXT_SCB)) |
| 1419 | goto _fail_end; |
| 1420 | |
| 1421 | /* SPDIF input sampel rate converter */ |
| 1422 | src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI", |
| 1423 | ins->spdif_in_sample_rate, |
| 1424 | SRC_OUTPUT_BUF1, |
| 1425 | SRC_DELAY_BUF1,SRCTASK_SCB_ADDR, |
| 1426 | master_mix_scb, |
| 1427 | SCB_ON_PARENT_SUBLIST_SCB,1); |
| 1428 | |
| 1429 | if (!src_task_scb) goto _fail_end; |
| 1430 | cs46xx_src_unlink(chip,src_task_scb); |
| 1431 | |
| 1432 | /* NOTE: when we now how to detect the SPDIF input |
| 1433 | sample rate we will use this SRC to adjust it */ |
| 1434 | ins->spdif_in_src = src_task_scb; |
| 1435 | |
| 1436 | cs46xx_dsp_async_init(chip,timing_master_scb); |
| 1437 | return 0; |
| 1438 | |
| 1439 | _fail_end: |
| 1440 | dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n"); |
| 1441 | return -EINVAL; |
| 1442 | } |
| 1443 | |
| 1444 | static int cs46xx_dsp_async_init (struct snd_cs46xx *chip, |
| 1445 | struct dsp_scb_descriptor * fg_entry) |
| 1446 | { |
| 1447 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1448 | struct dsp_symbol_entry * s16_async_codec_input_task; |
| 1449 | struct dsp_symbol_entry * spdifo_task; |
| 1450 | struct dsp_symbol_entry * spdifi_task; |
| 1451 | struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc; |
| 1452 | |
| 1453 | s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE); |
| 1454 | if (s16_async_codec_input_task == NULL) { |
| 1455 | dev_err(chip->card->dev, |
| 1456 | "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n"); |
| 1457 | return -EIO; |
| 1458 | } |
| 1459 | spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE); |
| 1460 | if (spdifo_task == NULL) { |
| 1461 | dev_err(chip->card->dev, |
| 1462 | "dsp_spos: symbol SPDIFOTASK not found\n"); |
| 1463 | return -EIO; |
| 1464 | } |
| 1465 | |
| 1466 | spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE); |
| 1467 | if (spdifi_task == NULL) { |
| 1468 | dev_err(chip->card->dev, |
| 1469 | "dsp_spos: symbol SPDIFITASK not found\n"); |
| 1470 | return -EIO; |
| 1471 | } |
| 1472 | |
| 1473 | { |
| 1474 | /* 0xBC0 */ |
| 1475 | struct dsp_spdifoscb spdifo_scb = { |
| 1476 | /* 0 */ DSP_SPOS_UUUU, |
| 1477 | { |
| 1478 | /* 1 */ 0xb0, |
| 1479 | /* 2 */ 0, |
| 1480 | /* 3 */ 0, |
| 1481 | /* 4 */ 0, |
| 1482 | }, |
| 1483 | /* NOTE: the SPDIF output task read samples in mono |
| 1484 | format, the AsynchFGTxSCB task writes to buffer |
| 1485 | in stereo format |
| 1486 | */ |
| 1487 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256, |
| 1488 | /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC, |
| 1489 | /* 7 */ 0,0, |
| 1490 | /* 8 */ 0, |
| 1491 | /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR, |
| 1492 | /* A */ spdifo_task->address, |
| 1493 | SPDIFO_SCB_INST + SPDIFOFIFOPointer, |
| 1494 | { |
| 1495 | /* B */ 0x0040, /*DSP_SPOS_UUUU,*/ |
| 1496 | /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/ |
| 1497 | }, |
| 1498 | /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */ |
| 1499 | /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */ |
| 1500 | /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */ |
| 1501 | }; |
| 1502 | |
| 1503 | /* 0xBB0 */ |
| 1504 | struct dsp_spdifiscb spdifi_scb = { |
| 1505 | /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI, |
| 1506 | /* 1 */ 0, |
| 1507 | /* 2 */ 0, |
| 1508 | /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */ |
| 1509 | /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */ |
| 1510 | /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */ |
| 1511 | /* 6 */ DSP_SPOS_UUUU, /* Free3 */ |
| 1512 | /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/ |
| 1513 | /* 8 */ DSP_SPOS_UUUU, /* TempStatus */ |
| 1514 | /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR, |
| 1515 | /* A */ spdifi_task->address, |
| 1516 | SPDIFI_SCB_INST + SPDIFIFIFOPointer, |
| 1517 | /* NOTE: The SPDIF input task write the sample in mono |
| 1518 | format from the HW FIFO, the AsynchFGRxSCB task reads |
| 1519 | them in stereo |
| 1520 | */ |
| 1521 | /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128, |
| 1522 | /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, |
| 1523 | /* D */ 0x8048,0, |
| 1524 | /* E */ 0x01f0,0x0001, |
| 1525 | /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */ |
| 1526 | }; |
| 1527 | |
| 1528 | /* 0xBA0 */ |
| 1529 | struct dsp_async_codec_input_scb async_codec_input_scb = { |
| 1530 | /* 0 */ DSP_SPOS_UUUU, |
| 1531 | /* 1 */ 0, |
| 1532 | /* 2 */ 0, |
| 1533 | /* 3 */ 1,4000, |
| 1534 | /* 4 */ 0x0118,0x0001, |
| 1535 | /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64, |
| 1536 | /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC, |
| 1537 | /* 7 */ DSP_SPOS_UU,0x3, |
| 1538 | /* 8 */ DSP_SPOS_UUUU, |
| 1539 | /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR, |
| 1540 | /* A */ s16_async_codec_input_task->address, |
| 1541 | HFG_TREE_SCB + AsyncCIOFIFOPointer, |
| 1542 | |
| 1543 | /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64, |
| 1544 | /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/ |
| 1545 | |
| 1546 | #ifdef UseASER1Input |
| 1547 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; |
| 1548 | Init. 0000:8042: for ASER1 |
| 1549 | 0000:8044: for ASER2 */ |
| 1550 | /* D */ 0x8042,0, |
| 1551 | |
| 1552 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; |
| 1553 | Init 1 stero:8050 ASER1 |
| 1554 | Init 0 mono:8070 ASER2 |
| 1555 | Init 1 Stereo : 0100 ASER1 (Set by script) */ |
| 1556 | /* E */ 0x0100,0x0001, |
| 1557 | |
| 1558 | #endif |
| 1559 | |
| 1560 | #ifdef UseASER2Input |
| 1561 | /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr; |
| 1562 | Init. 0000:8042: for ASER1 |
| 1563 | 0000:8044: for ASER2 */ |
| 1564 | /* D */ 0x8044,0, |
| 1565 | |
| 1566 | /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr; |
| 1567 | Init 1 stero:8050 ASER1 |
| 1568 | Init 0 mono:8070 ASER2 |
| 1569 | Init 1 Stereo : 0100 ASER1 (Set by script) */ |
| 1570 | /* E */ 0x0110,0x0001, |
| 1571 | |
| 1572 | #endif |
| 1573 | |
| 1574 | /* short AsyncCIOutputBufModulo:AsyncCIFree; |
| 1575 | AsyncCIOutputBufModulo: The modulo size for |
| 1576 | the output buffer of this task */ |
| 1577 | /* F */ 0, /* DSP_SPOS_UUUU */ |
| 1578 | }; |
| 1579 | |
| 1580 | spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST); |
| 1581 | |
| 1582 | if (snd_BUG_ON(!spdifo_scb_desc)) |
| 1583 | return -EIO; |
| 1584 | spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST); |
| 1585 | if (snd_BUG_ON(!spdifi_scb_desc)) |
| 1586 | return -EIO; |
| 1587 | async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB); |
| 1588 | if (snd_BUG_ON(!async_codec_scb_desc)) |
| 1589 | return -EIO; |
| 1590 | |
| 1591 | async_codec_scb_desc->parent_scb_ptr = NULL; |
| 1592 | async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc; |
| 1593 | async_codec_scb_desc->sub_list_ptr = ins->the_null_scb; |
| 1594 | async_codec_scb_desc->task_entry = s16_async_codec_input_task; |
| 1595 | |
| 1596 | spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc; |
| 1597 | spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc; |
| 1598 | spdifi_scb_desc->sub_list_ptr = ins->the_null_scb; |
| 1599 | spdifi_scb_desc->task_entry = spdifi_task; |
| 1600 | |
| 1601 | spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc; |
| 1602 | spdifo_scb_desc->next_scb_ptr = fg_entry; |
| 1603 | spdifo_scb_desc->sub_list_ptr = ins->the_null_scb; |
| 1604 | spdifo_scb_desc->task_entry = spdifo_task; |
| 1605 | |
| 1606 | /* this one is faked, as the parnet of SPDIFO task |
| 1607 | is the FG task tree */ |
| 1608 | fg_entry->parent_scb_ptr = spdifo_scb_desc; |
| 1609 | |
| 1610 | /* for proc fs */ |
| 1611 | cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc); |
| 1612 | cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc); |
| 1613 | cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc); |
| 1614 | |
| 1615 | /* Async MASTER ENABLE, affects both SPDIF input and output */ |
| 1616 | snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 ); |
| 1617 | } |
| 1618 | |
| 1619 | return 0; |
| 1620 | } |
| 1621 | |
| 1622 | static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip) |
| 1623 | { |
| 1624 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1625 | |
| 1626 | /* set SPDIF output FIFO slot */ |
| 1627 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0); |
| 1628 | |
| 1629 | /* SPDIF output MASTER ENABLE */ |
| 1630 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0); |
| 1631 | |
| 1632 | /* right and left validate bit */ |
| 1633 | /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/ |
| 1634 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0); |
| 1635 | |
| 1636 | /* clear fifo pointer */ |
| 1637 | cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0); |
| 1638 | |
| 1639 | /* monitor state */ |
| 1640 | ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED; |
| 1641 | } |
| 1642 | |
| 1643 | int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip) |
| 1644 | { |
| 1645 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1646 | |
| 1647 | /* if hw-ctrl already enabled, turn off to reset logic ... */ |
| 1648 | cs46xx_dsp_disable_spdif_hw (chip); |
| 1649 | udelay(50); |
| 1650 | |
| 1651 | /* set SPDIF output FIFO slot */ |
| 1652 | snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) )); |
| 1653 | |
| 1654 | /* SPDIF output MASTER ENABLE */ |
| 1655 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000); |
| 1656 | |
| 1657 | /* right and left validate bit */ |
| 1658 | cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default); |
| 1659 | |
| 1660 | /* monitor state */ |
| 1661 | ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED; |
| 1662 | |
| 1663 | return 0; |
| 1664 | } |
| 1665 | |
| 1666 | int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip) |
| 1667 | { |
| 1668 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1669 | |
| 1670 | /* turn on amplifier */ |
| 1671 | chip->active_ctrl(chip, 1); |
| 1672 | chip->amplifier_ctrl(chip, 1); |
| 1673 | |
| 1674 | if (snd_BUG_ON(ins->asynch_rx_scb)) |
| 1675 | return -EINVAL; |
| 1676 | if (snd_BUG_ON(!ins->spdif_in_src)) |
| 1677 | return -EINVAL; |
| 1678 | |
| 1679 | mutex_lock(&chip->spos_mutex); |
| 1680 | |
| 1681 | if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) { |
| 1682 | /* time countdown enable */ |
| 1683 | cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005); |
| 1684 | /* NOTE: 80000005 value is just magic. With all values |
| 1685 | that I've tested this one seem to give the best result. |
| 1686 | Got no explication why. (Benny) */ |
| 1687 | |
| 1688 | /* SPDIF input MASTER ENABLE */ |
| 1689 | cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff); |
| 1690 | |
| 1691 | ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED; |
| 1692 | } |
| 1693 | |
| 1694 | /* create and start the asynchronous receiver SCB */ |
| 1695 | ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB", |
| 1696 | ASYNCRX_SCB_ADDR, |
| 1697 | SPDIFI_SCB_INST, |
| 1698 | SPDIFI_IP_OUTPUT_BUFFER1, |
| 1699 | ins->spdif_in_src, |
| 1700 | SCB_ON_PARENT_SUBLIST_SCB); |
| 1701 | |
| 1702 | spin_lock_irq(&chip->reg_lock); |
| 1703 | |
| 1704 | /* reset SPDIF input sample buffer pointer */ |
| 1705 | /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, |
| 1706 | (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/ |
| 1707 | |
| 1708 | /* reset FIFO ptr */ |
| 1709 | /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/ |
| 1710 | cs46xx_src_link(chip,ins->spdif_in_src); |
| 1711 | |
| 1712 | /* unmute SRC volume */ |
| 1713 | cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); |
| 1714 | |
| 1715 | spin_unlock_irq(&chip->reg_lock); |
| 1716 | |
| 1717 | /* set SPDIF input sample rate and unmute |
| 1718 | NOTE: only 48khz support for SPDIF input this time */ |
| 1719 | /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */ |
| 1720 | |
| 1721 | /* monitor state */ |
| 1722 | ins->spdif_status_in = 1; |
| 1723 | mutex_unlock(&chip->spos_mutex); |
| 1724 | |
| 1725 | return 0; |
| 1726 | } |
| 1727 | |
| 1728 | int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip) |
| 1729 | { |
| 1730 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1731 | |
| 1732 | if (snd_BUG_ON(!ins->asynch_rx_scb)) |
| 1733 | return -EINVAL; |
| 1734 | if (snd_BUG_ON(!ins->spdif_in_src)) |
| 1735 | return -EINVAL; |
| 1736 | |
| 1737 | mutex_lock(&chip->spos_mutex); |
| 1738 | |
| 1739 | /* Remove the asynchronous receiver SCB */ |
| 1740 | cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb); |
| 1741 | ins->asynch_rx_scb = NULL; |
| 1742 | |
| 1743 | cs46xx_src_unlink(chip,ins->spdif_in_src); |
| 1744 | |
| 1745 | /* monitor state */ |
| 1746 | ins->spdif_status_in = 0; |
| 1747 | mutex_unlock(&chip->spos_mutex); |
| 1748 | |
| 1749 | /* restore amplifier */ |
| 1750 | chip->active_ctrl(chip, -1); |
| 1751 | chip->amplifier_ctrl(chip, -1); |
| 1752 | |
| 1753 | return 0; |
| 1754 | } |
| 1755 | |
| 1756 | int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip) |
| 1757 | { |
| 1758 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1759 | |
| 1760 | if (snd_BUG_ON(ins->pcm_input)) |
| 1761 | return -EINVAL; |
| 1762 | if (snd_BUG_ON(!ins->ref_snoop_scb)) |
| 1763 | return -EINVAL; |
| 1764 | |
| 1765 | mutex_lock(&chip->spos_mutex); |
| 1766 | ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR, |
| 1767 | "PCMSerialInput_Wave"); |
| 1768 | mutex_unlock(&chip->spos_mutex); |
| 1769 | |
| 1770 | return 0; |
| 1771 | } |
| 1772 | |
| 1773 | int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip) |
| 1774 | { |
| 1775 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1776 | |
| 1777 | if (snd_BUG_ON(!ins->pcm_input)) |
| 1778 | return -EINVAL; |
| 1779 | |
| 1780 | mutex_lock(&chip->spos_mutex); |
| 1781 | cs46xx_dsp_remove_scb (chip,ins->pcm_input); |
| 1782 | ins->pcm_input = NULL; |
| 1783 | mutex_unlock(&chip->spos_mutex); |
| 1784 | |
| 1785 | return 0; |
| 1786 | } |
| 1787 | |
| 1788 | int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip) |
| 1789 | { |
| 1790 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1791 | |
| 1792 | if (snd_BUG_ON(ins->adc_input)) |
| 1793 | return -EINVAL; |
| 1794 | if (snd_BUG_ON(!ins->codec_in_scb)) |
| 1795 | return -EINVAL; |
| 1796 | |
| 1797 | mutex_lock(&chip->spos_mutex); |
| 1798 | ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR, |
| 1799 | "PCMSerialInput_ADC"); |
| 1800 | mutex_unlock(&chip->spos_mutex); |
| 1801 | |
| 1802 | return 0; |
| 1803 | } |
| 1804 | |
| 1805 | int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip) |
| 1806 | { |
| 1807 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1808 | |
| 1809 | if (snd_BUG_ON(!ins->adc_input)) |
| 1810 | return -EINVAL; |
| 1811 | |
| 1812 | mutex_lock(&chip->spos_mutex); |
| 1813 | cs46xx_dsp_remove_scb (chip,ins->adc_input); |
| 1814 | ins->adc_input = NULL; |
| 1815 | mutex_unlock(&chip->spos_mutex); |
| 1816 | |
| 1817 | return 0; |
| 1818 | } |
| 1819 | |
| 1820 | int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data) |
| 1821 | { |
| 1822 | u32 temp; |
| 1823 | int i; |
| 1824 | |
| 1825 | /* santiy check the parameters. (These numbers are not 100% correct. They are |
| 1826 | a rough guess from looking at the controller spec.) */ |
| 1827 | if (address < 0x8000 || address >= 0x9000) |
| 1828 | return -EINVAL; |
| 1829 | |
| 1830 | /* initialize the SP_IO_WRITE SCB with the data. */ |
| 1831 | temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */ |
| 1832 | |
| 1833 | snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp); |
| 1834 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */ |
| 1835 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */ |
| 1836 | |
| 1837 | /* Poke this location to tell the task to start */ |
| 1838 | snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10); |
| 1839 | |
| 1840 | /* Verify that the task ran */ |
| 1841 | for (i=0; i<25; i++) { |
| 1842 | udelay(125); |
| 1843 | |
| 1844 | temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2)); |
| 1845 | if (temp == 0x00000000) |
| 1846 | break; |
| 1847 | } |
| 1848 | |
| 1849 | if (i == 25) { |
| 1850 | dev_err(chip->card->dev, |
| 1851 | "dsp_spos: SPIOWriteTask not responding\n"); |
| 1852 | return -EBUSY; |
| 1853 | } |
| 1854 | |
| 1855 | return 0; |
| 1856 | } |
| 1857 | |
| 1858 | int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right) |
| 1859 | { |
| 1860 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1861 | struct dsp_scb_descriptor * scb; |
| 1862 | |
| 1863 | mutex_lock(&chip->spos_mutex); |
| 1864 | |
| 1865 | /* main output */ |
| 1866 | scb = ins->master_mix_scb->sub_list_ptr; |
| 1867 | while (scb != ins->the_null_scb) { |
| 1868 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); |
| 1869 | scb = scb->next_scb_ptr; |
| 1870 | } |
| 1871 | |
| 1872 | /* rear output */ |
| 1873 | scb = ins->rear_mix_scb->sub_list_ptr; |
| 1874 | while (scb != ins->the_null_scb) { |
| 1875 | cs46xx_dsp_scb_set_volume (chip,scb,left,right); |
| 1876 | scb = scb->next_scb_ptr; |
| 1877 | } |
| 1878 | |
| 1879 | ins->dac_volume_left = left; |
| 1880 | ins->dac_volume_right = right; |
| 1881 | |
| 1882 | mutex_unlock(&chip->spos_mutex); |
| 1883 | |
| 1884 | return 0; |
| 1885 | } |
| 1886 | |
| 1887 | int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right) |
| 1888 | { |
| 1889 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1890 | |
| 1891 | mutex_lock(&chip->spos_mutex); |
| 1892 | |
| 1893 | if (ins->asynch_rx_scb != NULL) |
| 1894 | cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb, |
| 1895 | left,right); |
| 1896 | |
| 1897 | ins->spdif_input_volume_left = left; |
| 1898 | ins->spdif_input_volume_right = right; |
| 1899 | |
| 1900 | mutex_unlock(&chip->spos_mutex); |
| 1901 | |
| 1902 | return 0; |
| 1903 | } |
| 1904 | |
| 1905 | #ifdef CONFIG_PM_SLEEP |
| 1906 | int cs46xx_dsp_resume(struct snd_cs46xx * chip) |
| 1907 | { |
| 1908 | struct dsp_spos_instance * ins = chip->dsp_spos_instance; |
| 1909 | int i, err; |
| 1910 | |
| 1911 | /* clear parameter, sample and code areas */ |
| 1912 | snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, |
| 1913 | DSP_PARAMETER_BYTE_SIZE); |
| 1914 | snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, |
| 1915 | DSP_SAMPLE_BYTE_SIZE); |
| 1916 | snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE); |
| 1917 | |
| 1918 | for (i = 0; i < ins->nmodules; i++) { |
| 1919 | struct dsp_module_desc *module = &ins->modules[i]; |
| 1920 | struct dsp_segment_desc *seg; |
| 1921 | u32 doffset, dsize; |
| 1922 | |
| 1923 | seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER); |
| 1924 | err = dsp_load_parameter(chip, seg); |
| 1925 | if (err < 0) |
| 1926 | return err; |
| 1927 | |
| 1928 | seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE); |
| 1929 | err = dsp_load_sample(chip, seg); |
| 1930 | if (err < 0) |
| 1931 | return err; |
| 1932 | |
| 1933 | seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM); |
| 1934 | if (!seg) |
| 1935 | continue; |
| 1936 | |
| 1937 | doffset = seg->offset * 4 + module->load_address * 4 |
| 1938 | + DSP_CODE_BYTE_OFFSET; |
| 1939 | dsize = seg->size * 4; |
| 1940 | err = snd_cs46xx_download(chip, |
| 1941 | ins->code.data + module->load_address, |
| 1942 | doffset, dsize); |
| 1943 | if (err < 0) |
| 1944 | return err; |
| 1945 | } |
| 1946 | |
| 1947 | for (i = 0; i < ins->ntask; i++) { |
| 1948 | struct dsp_task_descriptor *t = &ins->tasks[i]; |
| 1949 | _dsp_create_task_tree(chip, t->data, t->address, t->size); |
| 1950 | } |
| 1951 | |
| 1952 | for (i = 0; i < ins->nscb; i++) { |
| 1953 | struct dsp_scb_descriptor *s = &ins->scbs[i]; |
| 1954 | if (s->deleted) |
| 1955 | continue; |
| 1956 | _dsp_create_scb(chip, s->data, s->address); |
| 1957 | } |
| 1958 | for (i = 0; i < ins->nscb; i++) { |
| 1959 | struct dsp_scb_descriptor *s = &ins->scbs[i]; |
| 1960 | if (s->deleted) |
| 1961 | continue; |
| 1962 | if (s->updated) |
| 1963 | cs46xx_dsp_spos_update_scb(chip, s); |
| 1964 | if (s->volume_set) |
| 1965 | cs46xx_dsp_scb_set_volume(chip, s, |
| 1966 | s->volume[0], s->volume[1]); |
| 1967 | } |
| 1968 | if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) { |
| 1969 | cs46xx_dsp_enable_spdif_hw(chip); |
| 1970 | snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2, |
| 1971 | (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10); |
| 1972 | if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN) |
| 1973 | cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV, |
| 1974 | ins->spdif_csuv_stream); |
| 1975 | } |
| 1976 | if (chip->dsp_spos_instance->spdif_status_in) { |
| 1977 | cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005); |
| 1978 | cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff); |
| 1979 | } |
| 1980 | return 0; |
| 1981 | } |
| 1982 | #endif |