blob: cc6ae76e2132f72e1a2777d89abc8e2b13a928ec [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * ALSA SoC codec for HDMI encoder drivers
4 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
5 * Author: Jyri Sarha <jsarha@ti.com>
6 */
7#include <linux/module.h>
8#include <linux/string.h>
9#include <sound/core.h>
10#include <sound/jack.h>
11#include <sound/pcm.h>
12#include <sound/pcm_params.h>
13#include <sound/soc.h>
14#include <sound/tlv.h>
15#include <sound/pcm_drm_eld.h>
16#include <sound/hdmi-codec.h>
17#include <sound/pcm_iec958.h>
18
19#include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
20
21#define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1
22
23struct hdmi_codec_channel_map_table {
24 unsigned char map; /* ALSA API channel map position */
25 unsigned long spk_mask; /* speaker position bit mask */
26};
27
28/*
29 * CEA speaker placement for HDMI 1.4:
30 *
31 * FL FLC FC FRC FR FRW
32 *
33 * LFE
34 *
35 * RL RLC RC RRC RR
36 *
37 * Speaker placement has to be extended to support HDMI 2.0
38 */
39enum hdmi_codec_cea_spk_placement {
40 FL = BIT(0), /* Front Left */
41 FC = BIT(1), /* Front Center */
42 FR = BIT(2), /* Front Right */
43 FLC = BIT(3), /* Front Left Center */
44 FRC = BIT(4), /* Front Right Center */
45 RL = BIT(5), /* Rear Left */
46 RC = BIT(6), /* Rear Center */
47 RR = BIT(7), /* Rear Right */
48 RLC = BIT(8), /* Rear Left Center */
49 RRC = BIT(9), /* Rear Right Center */
50 LFE = BIT(10), /* Low Frequency Effect */
51};
52
53/*
54 * cea Speaker allocation structure
55 */
56struct hdmi_codec_cea_spk_alloc {
57 const int ca_id;
58 unsigned int n_ch;
59 unsigned long mask;
60};
61
62/* Channel maps stereo HDMI */
63static const struct snd_pcm_chmap_elem hdmi_codec_stereo_chmaps[] = {
64 { .channels = 2,
65 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
66 { }
67};
68
69/* Channel maps for multi-channel playbacks, up to 8 n_ch */
70static const struct snd_pcm_chmap_elem hdmi_codec_8ch_chmaps[] = {
71 { .channels = 2, /* CA_ID 0x00 */
72 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } },
73 { .channels = 4, /* CA_ID 0x01 */
74 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
75 SNDRV_CHMAP_NA } },
76 { .channels = 4, /* CA_ID 0x02 */
77 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
78 SNDRV_CHMAP_FC } },
79 { .channels = 4, /* CA_ID 0x03 */
80 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
81 SNDRV_CHMAP_FC } },
82 { .channels = 6, /* CA_ID 0x04 */
83 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
84 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
85 { .channels = 6, /* CA_ID 0x05 */
86 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
87 SNDRV_CHMAP_NA, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
88 { .channels = 6, /* CA_ID 0x06 */
89 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
90 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
91 { .channels = 6, /* CA_ID 0x07 */
92 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
93 SNDRV_CHMAP_FC, SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
94 { .channels = 6, /* CA_ID 0x08 */
95 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
96 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
97 { .channels = 6, /* CA_ID 0x09 */
98 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
99 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
100 { .channels = 6, /* CA_ID 0x0A */
101 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
102 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
103 { .channels = 6, /* CA_ID 0x0B */
104 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
105 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
106 { .channels = 8, /* CA_ID 0x0C */
107 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
108 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
109 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
110 { .channels = 8, /* CA_ID 0x0D */
111 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
112 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
113 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
114 { .channels = 8, /* CA_ID 0x0E */
115 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
116 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
117 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
118 { .channels = 8, /* CA_ID 0x0F */
119 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
120 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
121 SNDRV_CHMAP_RC, SNDRV_CHMAP_NA } },
122 { .channels = 8, /* CA_ID 0x10 */
123 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
124 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
125 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
126 { .channels = 8, /* CA_ID 0x11 */
127 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
128 SNDRV_CHMAP_NA, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
129 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
130 { .channels = 8, /* CA_ID 0x12 */
131 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
132 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
133 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
134 { .channels = 8, /* CA_ID 0x13 */
135 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
136 SNDRV_CHMAP_FC, SNDRV_CHMAP_RL, SNDRV_CHMAP_RR,
137 SNDRV_CHMAP_RLC, SNDRV_CHMAP_RRC } },
138 { .channels = 8, /* CA_ID 0x14 */
139 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
140 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
141 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
142 { .channels = 8, /* CA_ID 0x15 */
143 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
144 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
145 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
146 { .channels = 8, /* CA_ID 0x16 */
147 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
148 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
149 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
150 { .channels = 8, /* CA_ID 0x17 */
151 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
152 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
153 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
154 { .channels = 8, /* CA_ID 0x18 */
155 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
156 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
157 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
158 { .channels = 8, /* CA_ID 0x19 */
159 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
160 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
161 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
162 { .channels = 8, /* CA_ID 0x1A */
163 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
164 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
165 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
166 { .channels = 8, /* CA_ID 0x1B */
167 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
168 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
169 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
170 { .channels = 8, /* CA_ID 0x1C */
171 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
172 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
173 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
174 { .channels = 8, /* CA_ID 0x1D */
175 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
176 SNDRV_CHMAP_NA, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
177 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
178 { .channels = 8, /* CA_ID 0x1E */
179 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_NA,
180 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
181 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
182 { .channels = 8, /* CA_ID 0x1F */
183 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, SNDRV_CHMAP_LFE,
184 SNDRV_CHMAP_FC, SNDRV_CHMAP_NA, SNDRV_CHMAP_NA,
185 SNDRV_CHMAP_FLC, SNDRV_CHMAP_FRC } },
186 { }
187};
188
189/*
190 * hdmi_codec_channel_alloc: speaker configuration available for CEA
191 *
192 * This is an ordered list where ca_id must exist in hdmi_codec_8ch_chmaps
193 * The preceding ones have better chances to be selected by
194 * hdmi_codec_get_ch_alloc_table_idx().
195 */
196static const struct hdmi_codec_cea_spk_alloc hdmi_codec_channel_alloc[] = {
197 { .ca_id = 0x00, .n_ch = 2,
198 .mask = FL | FR },
199 { .ca_id = 0x03, .n_ch = 4,
200 .mask = FL | FR | LFE | FC },
201 { .ca_id = 0x02, .n_ch = 4,
202 .mask = FL | FR | FC },
203 { .ca_id = 0x01, .n_ch = 4,
204 .mask = FL | FR | LFE },
205 { .ca_id = 0x0b, .n_ch = 6,
206 .mask = FL | FR | LFE | FC | RL | RR },
207 { .ca_id = 0x0a, .n_ch = 6,
208 .mask = FL | FR | FC | RL | RR },
209 { .ca_id = 0x09, .n_ch = 6,
210 .mask = FL | FR | LFE | RL | RR },
211 { .ca_id = 0x08, .n_ch = 6,
212 .mask = FL | FR | RL | RR },
213 { .ca_id = 0x07, .n_ch = 6,
214 .mask = FL | FR | LFE | FC | RC },
215 { .ca_id = 0x06, .n_ch = 6,
216 .mask = FL | FR | FC | RC },
217 { .ca_id = 0x05, .n_ch = 6,
218 .mask = FL | FR | LFE | RC },
219 { .ca_id = 0x04, .n_ch = 6,
220 .mask = FL | FR | RC },
221 { .ca_id = 0x13, .n_ch = 8,
222 .mask = FL | FR | LFE | FC | RL | RR | RLC | RRC },
223 { .ca_id = 0x1f, .n_ch = 8,
224 .mask = FL | FR | LFE | FC | RL | RR | FLC | FRC },
225 { .ca_id = 0x12, .n_ch = 8,
226 .mask = FL | FR | FC | RL | RR | RLC | RRC },
227 { .ca_id = 0x1e, .n_ch = 8,
228 .mask = FL | FR | FC | RL | RR | FLC | FRC },
229 { .ca_id = 0x11, .n_ch = 8,
230 .mask = FL | FR | LFE | RL | RR | RLC | RRC },
231 { .ca_id = 0x1d, .n_ch = 8,
232 .mask = FL | FR | LFE | RL | RR | FLC | FRC },
233 { .ca_id = 0x10, .n_ch = 8,
234 .mask = FL | FR | RL | RR | RLC | RRC },
235 { .ca_id = 0x1c, .n_ch = 8,
236 .mask = FL | FR | RL | RR | FLC | FRC },
237 { .ca_id = 0x0f, .n_ch = 8,
238 .mask = FL | FR | LFE | FC | RL | RR | RC },
239 { .ca_id = 0x1b, .n_ch = 8,
240 .mask = FL | FR | LFE | RC | FC | FLC | FRC },
241 { .ca_id = 0x0e, .n_ch = 8,
242 .mask = FL | FR | FC | RL | RR | RC },
243 { .ca_id = 0x1a, .n_ch = 8,
244 .mask = FL | FR | RC | FC | FLC | FRC },
245 { .ca_id = 0x0d, .n_ch = 8,
246 .mask = FL | FR | LFE | RL | RR | RC },
247 { .ca_id = 0x19, .n_ch = 8,
248 .mask = FL | FR | LFE | RC | FLC | FRC },
249 { .ca_id = 0x0c, .n_ch = 8,
250 .mask = FL | FR | RC | RL | RR },
251 { .ca_id = 0x18, .n_ch = 8,
252 .mask = FL | FR | RC | FLC | FRC },
253 { .ca_id = 0x17, .n_ch = 8,
254 .mask = FL | FR | LFE | FC | FLC | FRC },
255 { .ca_id = 0x16, .n_ch = 8,
256 .mask = FL | FR | FC | FLC | FRC },
257 { .ca_id = 0x15, .n_ch = 8,
258 .mask = FL | FR | LFE | FLC | FRC },
259 { .ca_id = 0x14, .n_ch = 8,
260 .mask = FL | FR | FLC | FRC },
261 { .ca_id = 0x0b, .n_ch = 8,
262 .mask = FL | FR | LFE | FC | RL | RR },
263 { .ca_id = 0x0a, .n_ch = 8,
264 .mask = FL | FR | FC | RL | RR },
265 { .ca_id = 0x09, .n_ch = 8,
266 .mask = FL | FR | LFE | RL | RR },
267 { .ca_id = 0x08, .n_ch = 8,
268 .mask = FL | FR | RL | RR },
269 { .ca_id = 0x07, .n_ch = 8,
270 .mask = FL | FR | LFE | FC | RC },
271 { .ca_id = 0x06, .n_ch = 8,
272 .mask = FL | FR | FC | RC },
273 { .ca_id = 0x05, .n_ch = 8,
274 .mask = FL | FR | LFE | RC },
275 { .ca_id = 0x04, .n_ch = 8,
276 .mask = FL | FR | RC },
277 { .ca_id = 0x03, .n_ch = 8,
278 .mask = FL | FR | LFE | FC },
279 { .ca_id = 0x02, .n_ch = 8,
280 .mask = FL | FR | FC },
281 { .ca_id = 0x01, .n_ch = 8,
282 .mask = FL | FR | LFE },
283};
284
285struct hdmi_codec_priv {
286 struct hdmi_codec_pdata hcd;
287 uint8_t eld[MAX_ELD_BYTES];
288 struct snd_pcm_chmap *chmap_info;
289 unsigned int chmap_idx;
290 unsigned long busy;
291 struct snd_soc_jack *jack;
292 unsigned int jack_status;
293};
294
295static const struct snd_soc_dapm_widget hdmi_widgets[] = {
296 SND_SOC_DAPM_OUTPUT("TX"),
297};
298
299enum {
300 DAI_ID_I2S = 0,
301 DAI_ID_SPDIF,
302};
303
304static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
305 struct snd_ctl_elem_info *uinfo)
306{
307 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
308 uinfo->count = FIELD_SIZEOF(struct hdmi_codec_priv, eld);
309
310 return 0;
311}
312
313static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
314 struct snd_ctl_elem_value *ucontrol)
315{
316 struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
317 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
318
319 memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
320
321 return 0;
322}
323
324static unsigned long hdmi_codec_spk_mask_from_alloc(int spk_alloc)
325{
326 int i;
327 static const unsigned long hdmi_codec_eld_spk_alloc_bits[] = {
328 [0] = FL | FR, [1] = LFE, [2] = FC, [3] = RL | RR,
329 [4] = RC, [5] = FLC | FRC, [6] = RLC | RRC,
330 };
331 unsigned long spk_mask = 0;
332
333 for (i = 0; i < ARRAY_SIZE(hdmi_codec_eld_spk_alloc_bits); i++) {
334 if (spk_alloc & (1 << i))
335 spk_mask |= hdmi_codec_eld_spk_alloc_bits[i];
336 }
337
338 return spk_mask;
339}
340
341static void hdmi_codec_eld_chmap(struct hdmi_codec_priv *hcp)
342{
343 u8 spk_alloc;
344 unsigned long spk_mask;
345
346 spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
347 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
348
349 /* Detect if only stereo supported, else return 8 channels mappings */
350 if ((spk_mask & ~(FL | FR)) && hcp->chmap_info->max_channels > 2)
351 hcp->chmap_info->chmap = hdmi_codec_8ch_chmaps;
352 else
353 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
354}
355
356static int hdmi_codec_get_ch_alloc_table_idx(struct hdmi_codec_priv *hcp,
357 unsigned char channels)
358{
359 int i;
360 u8 spk_alloc;
361 unsigned long spk_mask;
362 const struct hdmi_codec_cea_spk_alloc *cap = hdmi_codec_channel_alloc;
363
364 spk_alloc = drm_eld_get_spk_alloc(hcp->eld);
365 spk_mask = hdmi_codec_spk_mask_from_alloc(spk_alloc);
366
367 for (i = 0; i < ARRAY_SIZE(hdmi_codec_channel_alloc); i++, cap++) {
368 /* If spk_alloc == 0, HDMI is unplugged return stereo config*/
369 if (!spk_alloc && cap->ca_id == 0)
370 return i;
371 if (cap->n_ch != channels)
372 continue;
373 if (!(cap->mask == (spk_mask & cap->mask)))
374 continue;
375 return i;
376 }
377
378 return -EINVAL;
379}
380static int hdmi_codec_chmap_ctl_get(struct snd_kcontrol *kcontrol,
381 struct snd_ctl_elem_value *ucontrol)
382{
383 unsigned const char *map;
384 unsigned int i;
385 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
386 struct hdmi_codec_priv *hcp = info->private_data;
387
388 if (hcp->chmap_idx != HDMI_CODEC_CHMAP_IDX_UNKNOWN)
389 map = info->chmap[hcp->chmap_idx].map;
390
391 for (i = 0; i < info->max_channels; i++) {
392 if (hcp->chmap_idx == HDMI_CODEC_CHMAP_IDX_UNKNOWN)
393 ucontrol->value.integer.value[i] = 0;
394 else
395 ucontrol->value.integer.value[i] = map[i];
396 }
397
398 return 0;
399}
400
401static int hdmi_codec_startup(struct snd_pcm_substream *substream,
402 struct snd_soc_dai *dai)
403{
404 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
405 int ret = 0;
406
407 ret = test_and_set_bit(0, &hcp->busy);
408 if (ret) {
409 dev_err(dai->dev, "Only one simultaneous stream supported!\n");
410 return -EINVAL;
411 }
412
413 if (hcp->hcd.ops->audio_startup) {
414 ret = hcp->hcd.ops->audio_startup(dai->dev->parent, hcp->hcd.data);
415 if (ret)
416 goto err;
417 }
418
419 if (hcp->hcd.ops->get_eld) {
420 ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->hcd.data,
421 hcp->eld, sizeof(hcp->eld));
422
423 if (!ret) {
424 ret = snd_pcm_hw_constraint_eld(substream->runtime,
425 hcp->eld);
426 if (ret)
427 goto err;
428 }
429 /* Select chmap supported */
430 hdmi_codec_eld_chmap(hcp);
431 }
432 return 0;
433
434err:
435 /* Release the exclusive lock on error */
436 clear_bit(0, &hcp->busy);
437 return ret;
438}
439
440static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
441 struct snd_soc_dai *dai)
442{
443 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
444
445 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
446 hcp->hcd.ops->audio_shutdown(dai->dev->parent, hcp->hcd.data);
447
448 clear_bit(0, &hcp->busy);
449}
450
451static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
452 struct snd_pcm_hw_params *params,
453 struct snd_soc_dai *dai)
454{
455 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
456 struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
457 struct hdmi_codec_params hp = {
458 .iec = {
459 .status = { 0 },
460 .subcode = { 0 },
461 .pad = 0,
462 .dig_subframe = { 0 },
463 }
464 };
465 int ret, idx;
466
467 dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
468 params_width(params), params_rate(params),
469 params_channels(params));
470
471 ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status,
472 sizeof(hp.iec.status));
473 if (ret < 0) {
474 dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
475 ret);
476 return ret;
477 }
478
479 hdmi_audio_infoframe_init(&hp.cea);
480 hp.cea.channels = params_channels(params);
481 hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
482 hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
483 hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
484
485 /* Select a channel allocation that matches with ELD and pcm channels */
486 idx = hdmi_codec_get_ch_alloc_table_idx(hcp, hp.cea.channels);
487 if (idx < 0) {
488 dev_err(dai->dev, "Not able to map channels to speakers (%d)\n",
489 idx);
490 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
491 return idx;
492 }
493 hp.cea.channel_allocation = hdmi_codec_channel_alloc[idx].ca_id;
494 hcp->chmap_idx = hdmi_codec_channel_alloc[idx].ca_id;
495
496 hp.sample_width = params_width(params);
497 hp.sample_rate = params_rate(params);
498 hp.channels = params_channels(params);
499
500 return hcp->hcd.ops->hw_params(dai->dev->parent, hcp->hcd.data,
501 cf, &hp);
502}
503
504static int hdmi_codec_i2s_set_fmt(struct snd_soc_dai *dai,
505 unsigned int fmt)
506{
507 struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
508
509 /* Reset daifmt */
510 memset(cf, 0, sizeof(*cf));
511
512 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
513 case SND_SOC_DAIFMT_CBM_CFM:
514 cf->bit_clk_master = 1;
515 cf->frame_clk_master = 1;
516 break;
517 case SND_SOC_DAIFMT_CBS_CFM:
518 cf->frame_clk_master = 1;
519 break;
520 case SND_SOC_DAIFMT_CBM_CFS:
521 cf->bit_clk_master = 1;
522 break;
523 case SND_SOC_DAIFMT_CBS_CFS:
524 break;
525 default:
526 return -EINVAL;
527 }
528
529 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
530 case SND_SOC_DAIFMT_NB_NF:
531 break;
532 case SND_SOC_DAIFMT_NB_IF:
533 cf->frame_clk_inv = 1;
534 break;
535 case SND_SOC_DAIFMT_IB_NF:
536 cf->bit_clk_inv = 1;
537 break;
538 case SND_SOC_DAIFMT_IB_IF:
539 cf->frame_clk_inv = 1;
540 cf->bit_clk_inv = 1;
541 break;
542 }
543
544 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
545 case SND_SOC_DAIFMT_I2S:
546 cf->fmt = HDMI_I2S;
547 break;
548 case SND_SOC_DAIFMT_DSP_A:
549 cf->fmt = HDMI_DSP_A;
550 break;
551 case SND_SOC_DAIFMT_DSP_B:
552 cf->fmt = HDMI_DSP_B;
553 break;
554 case SND_SOC_DAIFMT_RIGHT_J:
555 cf->fmt = HDMI_RIGHT_J;
556 break;
557 case SND_SOC_DAIFMT_LEFT_J:
558 cf->fmt = HDMI_LEFT_J;
559 break;
560 case SND_SOC_DAIFMT_AC97:
561 cf->fmt = HDMI_AC97;
562 break;
563 default:
564 dev_err(dai->dev, "Invalid DAI interface format\n");
565 return -EINVAL;
566 }
567
568 return 0;
569}
570
571static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute)
572{
573 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
574
575 if (hcp->hcd.ops->digital_mute)
576 return hcp->hcd.ops->digital_mute(dai->dev->parent,
577 hcp->hcd.data, mute);
578
579 return 0;
580}
581
582static const struct snd_soc_dai_ops hdmi_codec_i2s_dai_ops = {
583 .startup = hdmi_codec_startup,
584 .shutdown = hdmi_codec_shutdown,
585 .hw_params = hdmi_codec_hw_params,
586 .set_fmt = hdmi_codec_i2s_set_fmt,
587 .digital_mute = hdmi_codec_digital_mute,
588};
589
590static const struct snd_soc_dai_ops hdmi_codec_spdif_dai_ops = {
591 .startup = hdmi_codec_startup,
592 .shutdown = hdmi_codec_shutdown,
593 .hw_params = hdmi_codec_hw_params,
594 .digital_mute = hdmi_codec_digital_mute,
595};
596
597#define HDMI_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
598 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |\
599 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
600 SNDRV_PCM_RATE_192000)
601
602#define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
603 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
604 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
605 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
606
607/*
608 * This list is only for formats allowed on the I2S bus. So there is
609 * some formats listed that are not supported by HDMI interface. For
610 * instance allowing the 32-bit formats enables 24-precision with CPU
611 * DAIs that do not support 24-bit formats. If the extra formats cause
612 * problems, we should add the video side driver an option to disable
613 * them.
614 */
615#define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE |\
616 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE |\
617 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE |\
618 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE |\
619 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE)
620
621static int hdmi_codec_pcm_new(struct snd_soc_pcm_runtime *rtd,
622 struct snd_soc_dai *dai)
623{
624 struct snd_soc_dai_driver *drv = dai->driver;
625 struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
626 struct snd_kcontrol *kctl;
627 struct snd_kcontrol_new hdmi_eld_ctl = {
628 .access = SNDRV_CTL_ELEM_ACCESS_READ |
629 SNDRV_CTL_ELEM_ACCESS_VOLATILE,
630 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
631 .name = "ELD",
632 .info = hdmi_eld_ctl_info,
633 .get = hdmi_eld_ctl_get,
634 .device = rtd->pcm->device,
635 };
636 int ret;
637
638 ret = snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
639 NULL, drv->playback.channels_max, 0,
640 &hcp->chmap_info);
641 if (ret < 0)
642 return ret;
643
644 /* override handlers */
645 hcp->chmap_info->private_data = hcp;
646 hcp->chmap_info->kctl->get = hdmi_codec_chmap_ctl_get;
647
648 /* default chmap supported is stereo */
649 hcp->chmap_info->chmap = hdmi_codec_stereo_chmaps;
650 hcp->chmap_idx = HDMI_CODEC_CHMAP_IDX_UNKNOWN;
651
652 /* add ELD ctl with the device number corresponding to the PCM stream */
653 kctl = snd_ctl_new1(&hdmi_eld_ctl, dai->component);
654 if (!kctl)
655 return -ENOMEM;
656
657 return snd_ctl_add(rtd->card->snd_card, kctl);
658}
659
660static int hdmi_dai_probe(struct snd_soc_dai *dai)
661{
662 struct snd_soc_dapm_context *dapm;
663 struct hdmi_codec_daifmt *daifmt;
664 struct snd_soc_dapm_route route = {
665 .sink = "TX",
666 .source = dai->driver->playback.stream_name,
667 };
668 int ret;
669
670 dapm = snd_soc_component_get_dapm(dai->component);
671 ret = snd_soc_dapm_add_routes(dapm, &route, 1);
672 if (ret)
673 return ret;
674
675 daifmt = kzalloc(sizeof(*daifmt), GFP_KERNEL);
676 if (!daifmt)
677 return -ENOMEM;
678
679 dai->playback_dma_data = daifmt;
680 return 0;
681}
682
683static void hdmi_codec_jack_report(struct hdmi_codec_priv *hcp,
684 unsigned int jack_status)
685{
686 if (hcp->jack && jack_status != hcp->jack_status) {
687 snd_soc_jack_report(hcp->jack, jack_status, SND_JACK_LINEOUT);
688 hcp->jack_status = jack_status;
689 }
690}
691
692static void plugged_cb(struct device *dev, bool plugged)
693{
694 struct hdmi_codec_priv *hcp = dev_get_drvdata(dev);
695
696 if (plugged)
697 hdmi_codec_jack_report(hcp, SND_JACK_LINEOUT);
698 else
699 hdmi_codec_jack_report(hcp, 0);
700}
701
702/**
703 * hdmi_codec_set_jack_detect - register HDMI plugged callback
704 * @component: the hdmi-codec instance
705 * @jack: ASoC jack to report (dis)connection events on
706 */
707int hdmi_codec_set_jack_detect(struct snd_soc_component *component,
708 struct snd_soc_jack *jack)
709{
710 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
711 int ret = -EOPNOTSUPP;
712
713 if (hcp->hcd.ops->hook_plugged_cb) {
714 hcp->jack = jack;
715 ret = hcp->hcd.ops->hook_plugged_cb(component->dev->parent,
716 hcp->hcd.data,
717 plugged_cb,
718 component->dev);
719 if (ret)
720 hcp->jack = NULL;
721 }
722 return ret;
723}
724EXPORT_SYMBOL_GPL(hdmi_codec_set_jack_detect);
725
726static int hdmi_dai_spdif_probe(struct snd_soc_dai *dai)
727{
728 struct hdmi_codec_daifmt *cf = dai->playback_dma_data;
729 int ret;
730
731 ret = hdmi_dai_probe(dai);
732 if (ret)
733 return ret;
734
735 cf = dai->playback_dma_data;
736 cf->fmt = HDMI_SPDIF;
737
738 return 0;
739}
740
741static int hdmi_codec_dai_remove(struct snd_soc_dai *dai)
742{
743 kfree(dai->playback_dma_data);
744 return 0;
745}
746
747static const struct snd_soc_dai_driver hdmi_i2s_dai = {
748 .name = "i2s-hifi",
749 .id = DAI_ID_I2S,
750 .probe = hdmi_dai_probe,
751 .remove = hdmi_codec_dai_remove,
752 .playback = {
753 .stream_name = "I2S Playback",
754 .channels_min = 2,
755 .channels_max = 8,
756 .rates = HDMI_RATES,
757 .formats = I2S_FORMATS,
758 .sig_bits = 24,
759 },
760 .ops = &hdmi_codec_i2s_dai_ops,
761 .pcm_new = hdmi_codec_pcm_new,
762};
763
764static const struct snd_soc_dai_driver hdmi_spdif_dai = {
765 .name = "spdif-hifi",
766 .id = DAI_ID_SPDIF,
767 .probe = hdmi_dai_spdif_probe,
768 .remove = hdmi_codec_dai_remove,
769 .playback = {
770 .stream_name = "SPDIF Playback",
771 .channels_min = 2,
772 .channels_max = 2,
773 .rates = HDMI_RATES,
774 .formats = SPDIF_FORMATS,
775 },
776 .ops = &hdmi_codec_spdif_dai_ops,
777 .pcm_new = hdmi_codec_pcm_new,
778};
779
780static int hdmi_of_xlate_dai_id(struct snd_soc_component *component,
781 struct device_node *endpoint)
782{
783 struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
784 int ret = -ENOTSUPP; /* see snd_soc_get_dai_id() */
785
786 if (hcp->hcd.ops->get_dai_id)
787 ret = hcp->hcd.ops->get_dai_id(component, endpoint);
788
789 return ret;
790}
791
792static const struct snd_soc_component_driver hdmi_driver = {
793 .dapm_widgets = hdmi_widgets,
794 .num_dapm_widgets = ARRAY_SIZE(hdmi_widgets),
795 .of_xlate_dai_id = hdmi_of_xlate_dai_id,
796 .idle_bias_on = 1,
797 .use_pmdown_time = 1,
798 .endianness = 1,
799 .non_legacy_dai_naming = 1,
800};
801
802static int hdmi_codec_probe(struct platform_device *pdev)
803{
804 struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
805 struct snd_soc_dai_driver *daidrv;
806 struct device *dev = &pdev->dev;
807 struct hdmi_codec_priv *hcp;
808 int dai_count, i = 0;
809 int ret;
810
811 if (!hcd) {
812 dev_err(dev, "%s: No platform data\n", __func__);
813 return -EINVAL;
814 }
815
816 dai_count = hcd->i2s + hcd->spdif;
817 if (dai_count < 1 || !hcd->ops || !hcd->ops->hw_params ||
818 !hcd->ops->audio_shutdown) {
819 dev_err(dev, "%s: Invalid parameters\n", __func__);
820 return -EINVAL;
821 }
822
823 hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
824 if (!hcp)
825 return -ENOMEM;
826
827 hcp->hcd = *hcd;
828 daidrv = devm_kcalloc(dev, dai_count, sizeof(*daidrv), GFP_KERNEL);
829 if (!daidrv)
830 return -ENOMEM;
831
832 if (hcd->i2s) {
833 daidrv[i] = hdmi_i2s_dai;
834 daidrv[i].playback.channels_max = hcd->max_i2s_channels;
835 i++;
836 }
837
838 if (hcd->spdif)
839 daidrv[i] = hdmi_spdif_dai;
840
841 dev_set_drvdata(dev, hcp);
842
843 ret = devm_snd_soc_register_component(dev, &hdmi_driver, daidrv,
844 dai_count);
845 if (ret) {
846 dev_err(dev, "%s: snd_soc_register_component() failed (%d)\n",
847 __func__, ret);
848 return ret;
849 }
850 return 0;
851}
852
853static struct platform_driver hdmi_codec_driver = {
854 .driver = {
855 .name = HDMI_CODEC_DRV_NAME,
856 },
857 .probe = hdmi_codec_probe,
858};
859
860module_platform_driver(hdmi_codec_driver);
861
862MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
863MODULE_DESCRIPTION("HDMI Audio Codec Driver");
864MODULE_LICENSE("GPL");
865MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);