| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * (C)Copyright 2005 - 2008 Marvell. All Rights Reserved. |
| 4 | * |
| 5 | * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MARVELL. |
| 6 | * The copyright notice above does not evidence any actual or intended |
| 7 | * publication of such source code. |
| 8 | * This Module contains Proprietary Information of Marvell and should be |
| 9 | * treated as Confidential. |
| 10 | * The information in this file is provided for the exclusive use of the |
| 11 | * licensees of Marvell. |
| 12 | * Such users have the right to use, modify, and incorporate this code into |
| 13 | * products for purposes authorized by the license agreement provided they |
| 14 | * include this notice and the associated copyright notice with any such |
| 15 | * product. |
| 16 | * The information in this file is provided "AS IS" without warranty. |
| 17 | * |
| 18 | * |
| 19 | * |
| 20 | * FILENAME: xllp_dfc.h |
| 21 | * |
| 22 | * PURPOSE: XLLP interface to the data flash controller (DFC). |
| 23 | * |
| 24 | ******************************************************************************/ |
| 25 | |
| 26 | #ifndef __XLLP_DFC_H__ |
| 27 | #define __XLLP_DFC_H__ |
| 28 | |
| 29 | #include "Typedef.h" |
| 30 | #include "xllp_dfc_defs.h" |
| 31 | #include "nand.h" |
| 32 | |
| 33 | #define DMA_OPERATION_TIMEOUT_MS 10 |
| 34 | #define NFU_FIFO_SIZE 2048 |
| 35 | #define DFC_SR_WRTOCLR_MASK 0x001F9FFF // all of the non-reserved fields above |
| 36 | |
| 37 | /* NAND command has four parts: */ |
| 38 | typedef struct NAND_CMD_S |
| 39 | { |
| 40 | NDCB0_REG cb0; |
| 41 | NDCB1_REG cb1; |
| 42 | NDCB2_REG cb2; |
| 43 | NDCB3_REG cb3; |
| 44 | } NAND_CMD_T, *P_NAND_CMD_T; |
| 45 | |
| 46 | |
| 47 | /////////////////////////////////////////////////////////////////////////////// |
| 48 | ///// |
| 49 | /// D F C I N T E R F A C E R O U T I N E S |
| 50 | /// |
| 51 | /////////////////////////////////////////////////////////////////////////////// |
| 52 | UINT_T XllpDfcInit (UINT_T width, P_NAND_Properties_T pNAND_Prop); |
| 53 | INT xdfc_write (P_DFC_BUFFER buffer, UINT_T address, UINT_T bytes, UINT_T bUseSpareArea, UINT_T bUseHwEcc, P_NAND_Properties_T pNAND_Prop); |
| 54 | UINT_T xdfc_write_LP (P_DFC_BUFFER buffer, UINT_T address, UINT_T bytes, UINT_T bUseSA,P_NAND_Properties_T pNAND_Prop); |
| 55 | UINT_T xdfc_read_nonDMA(P_DFC_BUFFER buffer, UINT_T address, UINT_T bytes, UINT_T* SpareArea, P_NAND_Properties_T pNAND_Prop); |
| 56 | UINT_T xdfc_read_LP (P_DFC_BUFFER buffer, unsigned int address, unsigned int bytes, unsigned int* SpareArea, P_NAND_Properties_T pNAND_Prop); |
| 57 | UINT_T xdfc_erase (UINT_T address, P_NAND_Properties_T pNAND_Prop); |
| 58 | // for FBF downloading |
| 59 | void xdfc_enable_ecc( unsigned int bEnable ); |
| 60 | void xdfc_enable_spare( unsigned int bEnable ); |
| 61 | UINT_T xdfc_read(unsigned int buffer, |
| 62 | unsigned int address, |
| 63 | unsigned int bytes, |
| 64 | unsigned int* SpareArea, |
| 65 | P_NAND_Properties_T pNAND_Prop); |
| 66 | UINT_T GetDMAReqNum(UINT_T *data, UINT_T *cmd); |
| 67 | |
| 68 | //workhorses |
| 69 | UINT_T xdfc_reset (P_NAND_Properties_T pNAND_Prop); |
| 70 | UINT_T xdfc_readstatus (P_DFC_BUFFER buffer, P_NAND_Properties_T pNAND_Prop); |
| 71 | UINT_T xdfc_readID (P_DFC_BUFFER buffer, DEVICE_TYPE dev_type); |
| 72 | void xdfc_setTiming (FLASH_TIMING* flash); |
| 73 | void Delay (UINT_T); |
| 74 | UINT_T xdfc_getStatusPadding(P_NAND_Properties_T pNAND_Prop); |
| 75 | UINT_T xdfc_getSpareArea_LP(P_NAND_Properties_T pNAND_Prop); |
| 76 | UINT_T xdfc_getECCArea_LP(P_NAND_Properties_T pNAND_Prop); |
| 77 | |
| 78 | |
| 79 | // helper routines |
| 80 | DEVICE_TYPE XllpCheckDeviceType( P_DFC_BUFFER buffer, P_NAND_Properties_T pNAND_Prop); |
| 81 | void XllpLoadProperties(P_DFC_BUFFER buffer, P_NAND_Properties_T pNAND_Prop); |
| 82 | void getAddr(UINT_T address, NDCB1_REG * addr1234, NDCB2_REG * addr5, P_NAND_Properties_T pNAND_Prop); |
| 83 | void getEraseAddr(UINT_T address, NDCB1_REG * addr1234, NDCB2_REG * addr5, P_NAND_Properties_T pNAND_Prop); |
| 84 | UINT_T _WaitForDFCOperationComplete(UINT_T statusMask, UINT32 TimeOutMillisec); |
| 85 | UINT_T _WaitForDFCOperationPulldown(UINT_T statusMask, UINT32 TimeOutMicrosec); |
| 86 | unsigned int xdfc_stripPad(unsigned int upper, unsigned int lower); |
| 87 | void XllpDfcDeviceSpecificInit(P_NAND_Properties_T pNAND_Prop); |
| 88 | |
| 89 | /********************* Internal Debug macro definitions ******************************/ |
| 90 | // DFC Register access macros |
| 91 | |
| 92 | #define DFC_REG_WRITE(regAddress, wval) \ |
| 93 | ( (* ( (volatile UINT32*)(regAddress) ) ) = wval); |
| 94 | |
| 95 | #define DFC_REG_READ(regAddress, rval) \ |
| 96 | rval = (* ( (volatile UINT32*)(regAddress))); |
| 97 | |
| 98 | |
| 99 | |
| 100 | #endif |