| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * (C)Copyright 2013 Marvell Hefei Branch. All Rights Reserved. |
| 4 | * |
| 5 | * THIS IS UNPUBLISHED PROPRIETARY SOURCE CODE OF MARVELL. |
| 6 | * The copyright notice above does not evidence any actual or intended |
| 7 | * publication of such source code. |
| 8 | * This Module contains Proprietary Information of Marvell and should be |
| 9 | * treated as Confidential. |
| 10 | * The information in this file is provided for the exclusive use of the |
| 11 | * licensees of Marvell. |
| 12 | * Such users have the right to use, modify, and incorporate this code into |
| 13 | * products for purposes authorized by the license agreement provided they |
| 14 | * include this notice and the associated copyright notice with any such |
| 15 | * product. |
| 16 | * The information in this file is provided "AS IS" without warranty. |
| 17 | * |
| 18 | ******************************************************************************/ |
| 19 | |
| 20 | #include "wdt.h" |
| 21 | |
| 22 | #define WDT_GEN_INT 0 |
| 23 | #define WDT_GEN_RESET 1 |
| 24 | |
| 25 | static void wdt_access(void) |
| 26 | { |
| 27 | *(VUINT_T *)WDT_WFAR = 0xbaba; |
| 28 | *(VUINT_T *)WDT_WSAR = 0xeb10; |
| 29 | } |
| 30 | |
| 31 | static void wdt_enable(void) |
| 32 | { |
| 33 | UINT_T temp; |
| 34 | |
| 35 | wdt_access(); |
| 36 | *(VUINT_T *)WDT_WMER = 0x3; |
| 37 | |
| 38 | Delay(100); |
| 39 | temp = (*(VUINT_T *)WDT_WMER); |
| 40 | Delay(100); |
| 41 | } |
| 42 | |
| 43 | static void wdt_set_match(unsigned int match) |
| 44 | { |
| 45 | UINT_T temp; |
| 46 | |
| 47 | wdt_access(); |
| 48 | *(VUINT_T *)WDT_WMR = 0xffff & match; |
| 49 | |
| 50 | Delay(100); |
| 51 | temp = (*(VUINT_T *)WDT_WMR); |
| 52 | Delay(100); |
| 53 | } |
| 54 | |
| 55 | static void wdt_reset_counter(void) |
| 56 | { |
| 57 | wdt_access(); |
| 58 | *(VUINT_T *)WDT_CER = 0x7; |
| 59 | |
| 60 | wdt_access(); |
| 61 | *(VUINT_T *)WDT_WCR = 0x1; |
| 62 | } |
| 63 | |
| 64 | static void wdt_irq(void *data) |
| 65 | { |
| 66 | data = data; |
| 67 | wdt_access(); |
| 68 | *(VUINT_T *)WDT_WICR = 1; // clear wdt int |
| 69 | |
| 70 | wdt_access(); |
| 71 | *(VUINT_T *)WDT_WMER &= ~0x1; // disable wdt |
| 72 | } |
| 73 | |
| 74 | void wdt_test(unsigned int seconds) |
| 75 | { |
| 76 | // wdt 13Mhz |
| 77 | *(VUINT_T *)PMUM_WDTPCR = 0x7; |
| 78 | Delay(10); |
| 79 | *(VUINT_T *)PMUM_WDTPCR = 0x3; |
| 80 | Delay(100); |
| 81 | *(VUINT_T *)PMUM_APRR |= 0x10; |
| 82 | |
| 83 | //EnablePeripheralIRQInterrupt(INT_CP_TMR1); |
| 84 | |
| 85 | wdt_reset_counter(); |
| 86 | |
| 87 | wdt_set_match(seconds * 256); |
| 88 | wdt_enable(); |
| 89 | |
| 90 | obm_printf("----------------------------- WDT rest --------------\n\r"); |
| 91 | |
| 92 | while (1); |
| 93 | } |
| 94 | |
| 95 | void do_wdt_reset(void) |
| 96 | { |
| 97 | //clear PMIC power down log to indicate system reboot |
| 98 | #if CONFIG_PMIC_CLR_PD_LOG_ON_RST |
| 99 | PmicClearPowerDownLog(); |
| 100 | #endif |
| 101 | #if SPINOR_CODE |
| 102 | SPINOR_Disable4BytesMode(); |
| 103 | #endif |
| 104 | |
| 105 | wdt_test(1); |
| 106 | } |
| 107 | |