| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * boot-common.c |
| 3 | * |
| 4 | * Common bootmode functions for omap based boards |
| 5 | * |
| 6 | * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <spl.h> |
| 13 | #include <asm/omap_common.h> |
| 14 | #include <asm/arch/omap.h> |
| 15 | #include <asm/arch/mmc_host_def.h> |
| 16 | #include <asm/arch/sys_proto.h> |
| 17 | #include <watchdog.h> |
| 18 | |
| 19 | DECLARE_GLOBAL_DATA_PTR; |
| 20 | |
| 21 | void save_omap_boot_params(void) |
| 22 | { |
| 23 | u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS); |
| 24 | u8 boot_device; |
| 25 | u32 dev_desc, dev_data; |
| 26 | |
| 27 | if ((rom_params < NON_SECURE_SRAM_START) || |
| 28 | (rom_params > NON_SECURE_SRAM_END)) |
| 29 | return; |
| 30 | |
| 31 | /* |
| 32 | * rom_params can be type casted to omap_boot_parameters and |
| 33 | * used. But it not correct to assume that romcode structure |
| 34 | * encoding would be same as u-boot. So use the defined offsets. |
| 35 | */ |
| 36 | gd->arch.omap_boot_params.omap_bootdevice = boot_device = |
| 37 | *((u8 *)(rom_params + BOOT_DEVICE_OFFSET)); |
| 38 | |
| 39 | gd->arch.omap_boot_params.ch_flags = |
| 40 | *((u8 *)(rom_params + CH_FLAGS_OFFSET)); |
| 41 | |
| 42 | if ((boot_device >= MMC_BOOT_DEVICES_START) && |
| 43 | (boot_device <= MMC_BOOT_DEVICES_END)) { |
| 44 | #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \ |
| 45 | !defined(CONFIG_AM43XX) |
| 46 | if ((omap_hw_init_context() == |
| 47 | OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) { |
| 48 | gd->arch.omap_boot_params.omap_bootmode = |
| 49 | *((u8 *)(rom_params + BOOT_MODE_OFFSET)); |
| 50 | } else |
| 51 | #endif |
| 52 | { |
| 53 | dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET)); |
| 54 | dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET)); |
| 55 | gd->arch.omap_boot_params.omap_bootmode = |
| 56 | *((u32 *)(dev_data + BOOT_MODE_OFFSET)); |
| 57 | } |
| 58 | } |
| 59 | } |
| 60 | |
| 61 | #ifdef CONFIG_SPL_BUILD |
| 62 | u32 spl_boot_device(void) |
| 63 | { |
| 64 | return (u32) (gd->arch.omap_boot_params.omap_bootdevice); |
| 65 | } |
| 66 | |
| 67 | u32 spl_boot_mode(void) |
| 68 | { |
| 69 | return gd->arch.omap_boot_params.omap_bootmode; |
| 70 | } |
| 71 | |
| 72 | void spl_board_init(void) |
| 73 | { |
| 74 | #ifdef CONFIG_SPL_NAND_SUPPORT |
| 75 | gpmc_init(); |
| 76 | #endif |
| 77 | #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT) |
| 78 | arch_misc_init(); |
| 79 | #endif |
| 80 | #if defined(CONFIG_HW_WATCHDOG) |
| 81 | hw_watchdog_init(); |
| 82 | #endif |
| 83 | #ifdef CONFIG_AM33XX |
| 84 | am33xx_spl_board_init(); |
| 85 | #endif |
| 86 | } |
| 87 | |
| 88 | int board_mmc_init(bd_t *bis) |
| 89 | { |
| 90 | switch (spl_boot_device()) { |
| 91 | case BOOT_DEVICE_MMC1: |
| 92 | omap_mmc_init(0, 0, 0, -1, -1); |
| 93 | break; |
| 94 | case BOOT_DEVICE_MMC2: |
| 95 | case BOOT_DEVICE_MMC2_2: |
| 96 | omap_mmc_init(1, 0, 0, -1, -1); |
| 97 | break; |
| 98 | } |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) |
| 103 | { |
| 104 | typedef void __noreturn (*image_entry_noargs_t)(u32 *); |
| 105 | image_entry_noargs_t image_entry = |
| 106 | (image_entry_noargs_t) spl_image->entry_point; |
| 107 | |
| 108 | debug("image entry point: 0x%X\n", spl_image->entry_point); |
| 109 | /* Pass the saved boot_params from rom code */ |
| 110 | image_entry((u32 *)&gd->arch.omap_boot_params); |
| 111 | } |
| 112 | #endif |