| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 8 | * Alex Zuepke <azu@sysgo.de> |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | /* |
| 14 | * CPU specific code |
| 15 | */ |
| 16 | |
| 17 | #include <common.h> |
| 18 | #include <command.h> |
| 19 | #include <netdev.h> |
| 20 | #include <asm/arch/ixp425.h> |
| 21 | #include <asm/system.h> |
| 22 | |
| 23 | static void cache_flush(void); |
| 24 | |
| 25 | #if defined(CONFIG_DISPLAY_CPUINFO) |
| 26 | int print_cpuinfo (void) |
| 27 | { |
| 28 | unsigned long id; |
| 29 | int speed = 0; |
| 30 | |
| 31 | asm ("mrc p15, 0, %0, c0, c0, 0":"=r" (id)); |
| 32 | |
| 33 | puts("CPU: Intel IXP425 at "); |
| 34 | switch ((id & 0x000003f0) >> 4) { |
| 35 | case 0x1c: |
| 36 | speed = 533; |
| 37 | break; |
| 38 | |
| 39 | case 0x1d: |
| 40 | speed = 400; |
| 41 | break; |
| 42 | |
| 43 | case 0x1f: |
| 44 | speed = 266; |
| 45 | break; |
| 46 | } |
| 47 | |
| 48 | if (speed) |
| 49 | printf("%d MHz\n", speed); |
| 50 | else |
| 51 | puts("unknown revision\n"); |
| 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | #endif /* CONFIG_DISPLAY_CPUINFO */ |
| 56 | |
| 57 | int cleanup_before_linux (void) |
| 58 | { |
| 59 | /* |
| 60 | * this function is called just before we call linux |
| 61 | * it prepares the processor for linux |
| 62 | * |
| 63 | * just disable everything that can disturb booting linux |
| 64 | */ |
| 65 | |
| 66 | disable_interrupts (); |
| 67 | |
| 68 | /* turn off I-cache */ |
| 69 | icache_disable(); |
| 70 | dcache_disable(); |
| 71 | |
| 72 | /* flush I-cache */ |
| 73 | cache_flush(); |
| 74 | |
| 75 | return 0; |
| 76 | } |
| 77 | |
| 78 | /* flush I/D-cache */ |
| 79 | static void cache_flush (void) |
| 80 | { |
| 81 | unsigned long i = 0; |
| 82 | |
| 83 | asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i)); |
| 84 | } |
| 85 | |
| 86 | /* FIXME */ |
| 87 | /* |
| 88 | void pci_init(void) |
| 89 | { |
| 90 | return; |
| 91 | } |
| 92 | */ |
| 93 | |
| 94 | int cpu_eth_init(bd_t *bis) |
| 95 | { |
| 96 | #ifdef CONFIG_IXP4XX_NPE |
| 97 | npe_initialize(bis); |
| 98 | #endif |
| 99 | return 0; |
| 100 | } |