b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2007 Michal Simek |
| 3 | * (C) Copyright 2004 Atmark Techno, Inc. |
| 4 | * |
| 5 | * Michal SIMEK <monstr@monstr.eu> |
| 6 | * Yasushi SHOJI <yashi@atmark-techno.com> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
| 13 | #include <malloc.h> |
| 14 | #include <asm/microblaze_intc.h> |
| 15 | #include <asm/asm.h> |
| 16 | |
| 17 | #undef DEBUG_INT |
| 18 | |
| 19 | void enable_interrupts(void) |
| 20 | { |
| 21 | MSRSET(0x2); |
| 22 | } |
| 23 | |
| 24 | int disable_interrupts(void) |
| 25 | { |
| 26 | unsigned int msr; |
| 27 | |
| 28 | MFS(msr, rmsr); |
| 29 | MSRCLR(0x2); |
| 30 | return (msr & 0x2) != 0; |
| 31 | } |
| 32 | |
| 33 | static struct irq_action *vecs; |
| 34 | static u32 irq_no; |
| 35 | |
| 36 | /* mapping structure to interrupt controller */ |
| 37 | microblaze_intc_t *intc; |
| 38 | |
| 39 | /* default handler */ |
| 40 | static void def_hdlr(void) |
| 41 | { |
| 42 | puts("def_hdlr\n"); |
| 43 | } |
| 44 | |
| 45 | static void enable_one_interrupt(int irq) |
| 46 | { |
| 47 | int mask; |
| 48 | int offset = 1; |
| 49 | |
| 50 | offset <<= irq; |
| 51 | mask = intc->ier; |
| 52 | intc->ier = (mask | offset); |
| 53 | #ifdef DEBUG_INT |
| 54 | printf("Enable one interrupt irq %x - mask %x,ier %x\n", offset, mask, |
| 55 | intc->ier); |
| 56 | printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 57 | intc->iar, intc->mer); |
| 58 | #endif |
| 59 | } |
| 60 | |
| 61 | static void disable_one_interrupt(int irq) |
| 62 | { |
| 63 | int mask; |
| 64 | int offset = 1; |
| 65 | |
| 66 | offset <<= irq; |
| 67 | mask = intc->ier; |
| 68 | intc->ier = (mask & ~offset); |
| 69 | #ifdef DEBUG_INT |
| 70 | printf("Disable one interrupt irq %x - mask %x,ier %x\n", irq, mask, |
| 71 | intc->ier); |
| 72 | printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 73 | intc->iar, intc->mer); |
| 74 | #endif |
| 75 | } |
| 76 | |
| 77 | int install_interrupt_handler(int irq, interrupt_handler_t *hdlr, void *arg) |
| 78 | { |
| 79 | struct irq_action *act; |
| 80 | |
| 81 | /* irq out of range */ |
| 82 | if ((irq < 0) || (irq > irq_no)) { |
| 83 | puts("IRQ out of range\n"); |
| 84 | return -1; |
| 85 | } |
| 86 | act = &vecs[irq]; |
| 87 | if (hdlr) { /* enable */ |
| 88 | act->handler = hdlr; |
| 89 | act->arg = arg; |
| 90 | act->count = 0; |
| 91 | enable_one_interrupt (irq); |
| 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | /* Disable */ |
| 96 | act->handler = (interrupt_handler_t *) def_hdlr; |
| 97 | act->arg = (void *)irq; |
| 98 | disable_one_interrupt(irq); |
| 99 | return 1; |
| 100 | } |
| 101 | |
| 102 | /* initialization interrupt controller - hardware */ |
| 103 | static void intc_init(void) |
| 104 | { |
| 105 | intc->mer = 0; |
| 106 | intc->ier = 0; |
| 107 | intc->iar = 0xFFFFFFFF; |
| 108 | /* XIntc_Start - hw_interrupt enable and all interrupt enable */ |
| 109 | intc->mer = 0x3; |
| 110 | #ifdef DEBUG_INT |
| 111 | printf("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 112 | intc->iar, intc->mer); |
| 113 | #endif |
| 114 | } |
| 115 | |
| 116 | int interrupts_init(void) |
| 117 | { |
| 118 | int i; |
| 119 | |
| 120 | #if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) |
| 121 | intc = (microblaze_intc_t *) (CONFIG_SYS_INTC_0_ADDR); |
| 122 | irq_no = CONFIG_SYS_INTC_0_NUM; |
| 123 | #endif |
| 124 | if (irq_no) { |
| 125 | vecs = calloc(1, sizeof(struct irq_action) * irq_no); |
| 126 | if (vecs == NULL) { |
| 127 | puts("Interrupt vector allocation failed\n"); |
| 128 | return -1; |
| 129 | } |
| 130 | |
| 131 | /* initialize irq list */ |
| 132 | for (i = 0; i < irq_no; i++) { |
| 133 | vecs[i].handler = (interrupt_handler_t *) def_hdlr; |
| 134 | vecs[i].arg = (void *)i; |
| 135 | vecs[i].count = 0; |
| 136 | } |
| 137 | /* initialize intc controller */ |
| 138 | intc_init(); |
| 139 | enable_interrupts(); |
| 140 | } else { |
| 141 | puts("Undefined interrupt controller\n"); |
| 142 | } |
| 143 | return 0; |
| 144 | } |
| 145 | |
| 146 | void interrupt_handler(void) |
| 147 | { |
| 148 | int irqs = intc->ivr; /* find active interrupt */ |
| 149 | int mask = 1; |
| 150 | #ifdef DEBUG_INT |
| 151 | int value; |
| 152 | printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, |
| 153 | intc->iar, intc->mer); |
| 154 | R14(value); |
| 155 | printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); |
| 156 | #endif |
| 157 | struct irq_action *act = vecs + irqs; |
| 158 | |
| 159 | #ifdef DEBUG_INT |
| 160 | printf |
| 161 | ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", |
| 162 | act->handler, act->count, act->arg); |
| 163 | #endif |
| 164 | act->handler (act->arg); |
| 165 | act->count++; |
| 166 | |
| 167 | intc->iar = mask << irqs; |
| 168 | |
| 169 | #ifdef DEBUG_INT |
| 170 | printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, |
| 171 | intc->ier, intc->iar, intc->mer); |
| 172 | R14(value); |
| 173 | printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); |
| 174 | #endif |
| 175 | } |
| 176 | |
| 177 | #if defined(CONFIG_CMD_IRQ) |
| 178 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[]) |
| 179 | { |
| 180 | int i; |
| 181 | struct irq_action *act = vecs; |
| 182 | |
| 183 | if (irq_no) { |
| 184 | puts("\nInterrupt-Information:\n\n" |
| 185 | "Nr Routine Arg Count\n" |
| 186 | "-----------------------------\n"); |
| 187 | |
| 188 | for (i = 0; i < irq_no; i++) { |
| 189 | if (act->handler != (interrupt_handler_t *) def_hdlr) { |
| 190 | printf("%02d %08x %08x %d\n", i, |
| 191 | (int)act->handler, (int)act->arg, |
| 192 | act->count); |
| 193 | } |
| 194 | act++; |
| 195 | } |
| 196 | puts("\n"); |
| 197 | } else { |
| 198 | puts("Undefined interrupt controller\n"); |
| 199 | } |
| 200 | return 0; |
| 201 | } |
| 202 | #endif |