blob: 18a0f0ba24ee68c1bc87cfbdeab69a1bc2d7cd8e [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*
2 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 * Copyright (C) 2008 Renesas Solutions Corp.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _ASM_CPU_SH2_H_
9#define _ASM_CPU_SH2_H_
10
11/* cache control */
12#define CCR_CACHE_STOP 0x00000008
13#define CCR_CACHE_ENABLE 0x00000005
14#define CCR_CACHE_ICI 0x00000008
15
16#define CACHE_OC_ADDRESS_ARRAY 0xf0000000
17#define CACHE_OC_WAY_SHIFT 13
18#define CACHE_OC_NUM_ENTRIES 256
19#define CACHE_OC_ENTRY_SHIFT 4
20
21#if defined(CONFIG_CPU_SH7203)
22# include <asm/cpu_sh7203.h>
23#elif defined(CONFIG_CPU_SH7264)
24# include <asm/cpu_sh7264.h>
25#elif defined(CONFIG_CPU_SH7269)
26# include <asm/cpu_sh7269.h>
27#else
28# error "Unknown SH2 variant"
29#endif
30
31#endif /* _ASM_CPU_SH2_H_ */