| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2011 The Chromium OS Authors. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/arch/clock.h> |
| 10 | #include <asm/arch/emc.h> |
| 11 | #include <asm/arch/pmu.h> |
| 12 | #include <asm/arch/tegra.h> |
| 13 | #include <asm/arch-tegra/ap.h> |
| 14 | #include <asm/arch-tegra/clk_rst.h> |
| 15 | #include <asm/arch-tegra/sys_proto.h> |
| 16 | |
| 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
| 19 | /* These rates are hard-coded for now, until fdt provides them */ |
| 20 | #define EMC_SDRAM_RATE_T20 (333000 * 2 * 1000) |
| 21 | #define EMC_SDRAM_RATE_T25 (380000 * 2 * 1000) |
| 22 | |
| 23 | int board_emc_init(void) |
| 24 | { |
| 25 | unsigned rate; |
| 26 | |
| 27 | switch (tegra_get_chip_sku()) { |
| 28 | default: |
| 29 | case TEGRA_SOC_T20: |
| 30 | rate = EMC_SDRAM_RATE_T20; |
| 31 | break; |
| 32 | case TEGRA_SOC_T25: |
| 33 | rate = EMC_SDRAM_RATE_T25; |
| 34 | break; |
| 35 | } |
| 36 | return tegra_set_emc(gd->fdt_blob, rate); |
| 37 | } |