| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * Keith Outwater, keith_outwater@mvis.com. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * Virtex2 FPGA configuration support for the QUANTUM computer |
| 11 | */ |
| 12 | int fpga_boot(unsigned char *fpgadata, int size); |
| 13 | |
| 14 | #define ERROR_FPGA_PRG_INIT_LOW -1 /* Timeout after PRG* asserted */ |
| 15 | #define ERROR_FPGA_PRG_INIT_HIGH -2 /* Timeout after PRG* deasserted */ |
| 16 | #define ERROR_FPGA_PRG_DONE -3 /* Timeout after programming */ |