b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * (C) Copyright 2000, 2001 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * FPGA support |
| 10 | */ |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
| 13 | #include <fpga.h> |
| 14 | #include <malloc.h> |
| 15 | |
| 16 | /* Local functions */ |
| 17 | static int fpga_get_op(char *opstr); |
| 18 | |
| 19 | /* Local defines */ |
| 20 | #define FPGA_NONE -1 |
| 21 | #define FPGA_INFO 0 |
| 22 | #define FPGA_LOAD 1 |
| 23 | #define FPGA_LOADB 2 |
| 24 | #define FPGA_DUMP 3 |
| 25 | #define FPGA_LOADMK 4 |
| 26 | |
| 27 | /* ------------------------------------------------------------------------- */ |
| 28 | /* command form: |
| 29 | * fpga <op> <device number> <data addr> <datasize> |
| 30 | * where op is 'load', 'dump', or 'info' |
| 31 | * If there is no device number field, the fpga environment variable is used. |
| 32 | * If there is no data addr field, the fpgadata environment variable is used. |
| 33 | * The info command requires no data address field. |
| 34 | */ |
| 35 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
| 36 | { |
| 37 | int op, dev = FPGA_INVALID_DEVICE; |
| 38 | size_t data_size = 0; |
| 39 | void *fpga_data = NULL; |
| 40 | char *devstr = getenv("fpga"); |
| 41 | char *datastr = getenv("fpgadata"); |
| 42 | int rc = FPGA_FAIL; |
| 43 | int wrong_parms = 0; |
| 44 | #if defined(CONFIG_FIT) |
| 45 | const char *fit_uname = NULL; |
| 46 | ulong fit_addr; |
| 47 | #endif |
| 48 | |
| 49 | if (devstr) |
| 50 | dev = (int) simple_strtoul(devstr, NULL, 16); |
| 51 | if (datastr) |
| 52 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
| 53 | |
| 54 | switch (argc) { |
| 55 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
| 56 | data_size = simple_strtoul(argv[4], NULL, 16); |
| 57 | |
| 58 | case 4: /* fpga <op> <dev> <data> */ |
| 59 | #if defined(CONFIG_FIT) |
| 60 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 61 | &fit_addr, &fit_uname)) { |
| 62 | fpga_data = (void *)fit_addr; |
| 63 | debug("* fpga: subimage '%s' from FIT image ", |
| 64 | fit_uname); |
| 65 | debug("at 0x%08lx\n", fit_addr); |
| 66 | } else |
| 67 | #endif |
| 68 | { |
| 69 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
| 70 | debug("* fpga: cmdline image address = 0x%08lx\n", |
| 71 | (ulong)fpga_data); |
| 72 | } |
| 73 | debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data); |
| 74 | |
| 75 | case 3: /* fpga <op> <dev | data addr> */ |
| 76 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
| 77 | debug("%s: device = %d\n", __func__, dev); |
| 78 | /* FIXME - this is a really weak test */ |
| 79 | if ((argc == 3) && (dev > fpga_count())) { |
| 80 | /* must be buffer ptr */ |
| 81 | debug("%s: Assuming buffer pointer in arg 3\n", |
| 82 | __func__); |
| 83 | |
| 84 | #if defined(CONFIG_FIT) |
| 85 | if (fit_parse_subimage(argv[2], (ulong)fpga_data, |
| 86 | &fit_addr, &fit_uname)) { |
| 87 | fpga_data = (void *)fit_addr; |
| 88 | debug("* fpga: subimage '%s' from FIT image ", |
| 89 | fit_uname); |
| 90 | debug("at 0x%08lx\n", fit_addr); |
| 91 | } else |
| 92 | #endif |
| 93 | { |
| 94 | fpga_data = (void *)dev; |
| 95 | debug("* fpga: cmdline image addr = 0x%08lx\n", |
| 96 | (ulong)fpga_data); |
| 97 | } |
| 98 | |
| 99 | debug("%s: fpga_data = 0x%x\n", |
| 100 | __func__, (uint)fpga_data); |
| 101 | dev = FPGA_INVALID_DEVICE; /* reset device num */ |
| 102 | } |
| 103 | |
| 104 | case 2: /* fpga <op> */ |
| 105 | op = (int)fpga_get_op(argv[1]); |
| 106 | break; |
| 107 | |
| 108 | default: |
| 109 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
| 110 | op = FPGA_NONE; /* force usage display */ |
| 111 | break; |
| 112 | } |
| 113 | |
| 114 | if (dev == FPGA_INVALID_DEVICE) { |
| 115 | puts("FPGA device not specified\n"); |
| 116 | op = FPGA_NONE; |
| 117 | } |
| 118 | |
| 119 | switch (op) { |
| 120 | case FPGA_NONE: |
| 121 | case FPGA_INFO: |
| 122 | break; |
| 123 | case FPGA_LOAD: |
| 124 | case FPGA_LOADB: |
| 125 | case FPGA_DUMP: |
| 126 | if (!fpga_data || !data_size) |
| 127 | wrong_parms = 1; |
| 128 | break; |
| 129 | case FPGA_LOADMK: |
| 130 | if (!fpga_data) |
| 131 | wrong_parms = 1; |
| 132 | break; |
| 133 | } |
| 134 | |
| 135 | if (wrong_parms) { |
| 136 | puts("Wrong parameters for FPGA request\n"); |
| 137 | op = FPGA_NONE; |
| 138 | } |
| 139 | |
| 140 | switch (op) { |
| 141 | case FPGA_NONE: |
| 142 | return CMD_RET_USAGE; |
| 143 | |
| 144 | case FPGA_INFO: |
| 145 | rc = fpga_info(dev); |
| 146 | break; |
| 147 | |
| 148 | case FPGA_LOAD: |
| 149 | rc = fpga_load(dev, fpga_data, data_size); |
| 150 | break; |
| 151 | |
| 152 | case FPGA_LOADB: |
| 153 | rc = fpga_loadbitstream(dev, fpga_data, data_size); |
| 154 | break; |
| 155 | |
| 156 | case FPGA_LOADMK: |
| 157 | switch (genimg_get_format(fpga_data)) { |
| 158 | case IMAGE_FORMAT_LEGACY: |
| 159 | { |
| 160 | image_header_t *hdr = |
| 161 | (image_header_t *)fpga_data; |
| 162 | ulong data; |
| 163 | uint8_t comp; |
| 164 | |
| 165 | comp = image_get_comp(hdr); |
| 166 | if (comp == IH_COMP_GZIP) { |
| 167 | ulong image_buf = image_get_data(hdr); |
| 168 | data = image_get_load(hdr); |
| 169 | ulong image_size = ~0UL; |
| 170 | |
| 171 | if (gunzip((void *)data, ~0UL, |
| 172 | (void *)image_buf, |
| 173 | &image_size) != 0) { |
| 174 | puts("GUNZIP: error\n"); |
| 175 | return 1; |
| 176 | } |
| 177 | data_size = image_size; |
| 178 | } else { |
| 179 | data = (ulong)image_get_data(hdr); |
| 180 | data_size = image_get_data_size(hdr); |
| 181 | } |
| 182 | rc = fpga_load(dev, (void *)data, data_size); |
| 183 | } |
| 184 | break; |
| 185 | #if defined(CONFIG_FIT) |
| 186 | case IMAGE_FORMAT_FIT: |
| 187 | { |
| 188 | const void *fit_hdr = (const void *)fpga_data; |
| 189 | int noffset; |
| 190 | const void *fit_data; |
| 191 | |
| 192 | if (fit_uname == NULL) { |
| 193 | puts("No FIT subimage unit name\n"); |
| 194 | return 1; |
| 195 | } |
| 196 | |
| 197 | if (!fit_check_format(fit_hdr)) { |
| 198 | puts("Bad FIT image format\n"); |
| 199 | return 1; |
| 200 | } |
| 201 | |
| 202 | /* get fpga component image node offset */ |
| 203 | noffset = fit_image_get_node(fit_hdr, |
| 204 | fit_uname); |
| 205 | if (noffset < 0) { |
| 206 | printf("Can't find '%s' FIT subimage\n", |
| 207 | fit_uname); |
| 208 | return 1; |
| 209 | } |
| 210 | |
| 211 | /* verify integrity */ |
| 212 | if (!fit_image_verify(fit_hdr, noffset)) { |
| 213 | puts ("Bad Data Hash\n"); |
| 214 | return 1; |
| 215 | } |
| 216 | |
| 217 | /* get fpga subimage data address and length */ |
| 218 | if (fit_image_get_data(fit_hdr, noffset, |
| 219 | &fit_data, &data_size)) { |
| 220 | puts("Fpga subimage data not found\n"); |
| 221 | return 1; |
| 222 | } |
| 223 | |
| 224 | rc = fpga_load(dev, fit_data, data_size); |
| 225 | } |
| 226 | break; |
| 227 | #endif |
| 228 | default: |
| 229 | puts("** Unknown image type\n"); |
| 230 | rc = FPGA_FAIL; |
| 231 | break; |
| 232 | } |
| 233 | break; |
| 234 | |
| 235 | case FPGA_DUMP: |
| 236 | rc = fpga_dump(dev, fpga_data, data_size); |
| 237 | break; |
| 238 | |
| 239 | default: |
| 240 | printf("Unknown operation\n"); |
| 241 | return CMD_RET_USAGE; |
| 242 | } |
| 243 | return rc; |
| 244 | } |
| 245 | |
| 246 | /* |
| 247 | * Map op to supported operations. We don't use a table since we |
| 248 | * would just have to relocate it from flash anyway. |
| 249 | */ |
| 250 | static int fpga_get_op(char *opstr) |
| 251 | { |
| 252 | int op = FPGA_NONE; |
| 253 | |
| 254 | if (!strcmp("info", opstr)) |
| 255 | op = FPGA_INFO; |
| 256 | else if (!strcmp("loadb", opstr)) |
| 257 | op = FPGA_LOADB; |
| 258 | else if (!strcmp("load", opstr)) |
| 259 | op = FPGA_LOAD; |
| 260 | else if (!strcmp("loadmk", opstr)) |
| 261 | op = FPGA_LOADMK; |
| 262 | else if (!strcmp("dump", opstr)) |
| 263 | op = FPGA_DUMP; |
| 264 | |
| 265 | if (op == FPGA_NONE) |
| 266 | printf("Unknown fpga operation \"%s\"\n", opstr); |
| 267 | |
| 268 | return op; |
| 269 | } |
| 270 | |
| 271 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
| 272 | "loadable FPGA image support", |
| 273 | "[operation type] [device number] [image address] [image size]\n" |
| 274 | "fpga operations:\n" |
| 275 | " dump\t[dev]\t\t\tLoad device to memory buffer\n" |
| 276 | " info\t[dev]\t\t\tlist known device information\n" |
| 277 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
| 278 | " loadb\t[dev] [address] [size]\t" |
| 279 | "Load device from bitstream buffer (Xilinx only)\n" |
| 280 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
| 281 | #if defined(CONFIG_FIT) |
| 282 | "\n" |
| 283 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 284 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
| 285 | #endif |
| 286 | ); |