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b.liue9582032025-04-17 19:18:16 +08001/*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8/*
9 * netdev.h - definitions an prototypes for network devices
10 */
11
12#ifndef _NETDEV_H_
13#define _NETDEV_H_
14
15/*
16 * Board and CPU-specific initialization functions
17 * board_eth_init() has highest priority. cpu_eth_init() only
18 * gets called if board_eth_init() isn't instantiated or fails.
19 * Return values:
20 * 0: success
21 * -1: failure
22 */
23
24int board_eth_init(bd_t *bis);
25int cpu_eth_init(bd_t *bis);
26
27/* Driver initialization prototypes */
28int altera_tse_initialize(u8 dev_num, int mac_base,
29 int sgdma_rx_base, int sgdma_tx_base,
30 u32 sgdma_desc_base, u32 sgdma_desc_size);
31int at91emac_register(bd_t *bis, unsigned long iobase);
32int au1x00_enet_initialize(bd_t*);
33int ax88180_initialize(bd_t *bis);
34int bfin_EMAC_initialize(bd_t *bis);
35int calxedaxgmac_initialize(u32 id, ulong base_addr);
36int cs8900_initialize(u8 dev_num, int base_addr);
37int davinci_emac_initialize(void);
38int dc21x4x_initialize(bd_t *bis);
39int designware_initialize(u32 id, ulong base_addr, u32 phy_addr, u32 interface);
40int dm9000_initialize(bd_t *bis);
41int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
42int e1000_initialize(bd_t *bis);
43int eepro100_initialize(bd_t *bis);
44int enc28j60_initialize(unsigned int bus, unsigned int cs,
45 unsigned int max_hz, unsigned int mode);
46int ep93xx_eth_initialize(u8 dev_num, int base_addr);
47int eth_3com_initialize (bd_t * bis);
48int ethoc_initialize(u8 dev_num, int base_addr);
49int fec_initialize (bd_t *bis);
50int fecmxc_initialize(bd_t *bis);
51int fecmxc_initialize_multi(bd_t *bis, int dev_id, int phy_id, uint32_t addr);
52int ftgmac100_initialize(bd_t *bits);
53int ftmac100_initialize(bd_t *bits);
54int ftmac110_initialize(bd_t *bits);
55int greth_initialize(bd_t *bis);
56void gt6426x_eth_initialize(bd_t *bis);
57int inca_switch_initialize(bd_t *bis);
58int ks8695_eth_initialize(void);
59int ks8851_mll_initialize(u8 dev_num, int base_addr);
60int lan91c96_initialize(u8 dev_num, int base_addr);
61int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
62int mcdmafec_initialize(bd_t *bis);
63int mcffec_initialize(bd_t *bis);
64int mpc512x_fec_initialize(bd_t *bis);
65int mpc5xxx_fec_initialize(bd_t *bis);
66int mpc82xx_scc_enet_initialize(bd_t *bis);
67int mvgbe_initialize(bd_t *bis);
68int natsemi_initialize(bd_t *bis);
69int ne2k_register(void);
70int npe_initialize(bd_t *bis);
71int ns8382x_initialize(bd_t *bis);
72int pcnet_initialize(bd_t *bis);
73int plb2800_eth_initialize(bd_t *bis);
74int ppc_4xx_eth_initialize (bd_t *bis);
75int rtl8139_initialize(bd_t *bis);
76int rtl8169_initialize(bd_t *bis);
77int scc_initialize(bd_t *bis);
78int sh_eth_initialize(bd_t *bis);
79int skge_initialize(bd_t *bis);
80int smc91111_initialize(u8 dev_num, int base_addr);
81int smc911x_initialize(u8 dev_num, int base_addr);
82int sunxi_wemac_initialize(bd_t *bis);
83int tsi108_eth_initialize(bd_t *bis);
84int uec_standard_init(bd_t *bis);
85int uli526x_initialize(bd_t *bis);
86int armada100_fec_register(unsigned long base_addr);
87int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr,
88 unsigned long dma_addr);
89int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr,
90 int txpp, int rxpp);
91int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags,
92 unsigned long ctrl_addr);
93int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio);
94/*
95 * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
96 * exported by a public hader file, we need a global definition at this point.
97 */
98#if defined(CONFIG_XILINX_LL_TEMAC)
99#define XILINX_LL_TEMAC_M_FIFO 0 /* use FIFO Ctrl */
100#define XILINX_LL_TEMAC_M_SDMA_PLB (1 << 0)/* use SDMA Ctrl via PLB */
101#define XILINX_LL_TEMAC_M_SDMA_DCR (1 << 1)/* use SDMA Ctrl via DCR */
102#endif
103
104/* Boards with PCI network controllers can call this from their board_eth_init()
105 * function to initialize whatever's on board.
106 * Return value is total # of devices found */
107
108static inline int pci_eth_init(bd_t *bis)
109{
110 int num = 0;
111
112#ifdef CONFIG_PCI
113
114#ifdef CONFIG_EEPRO100
115 num += eepro100_initialize(bis);
116#endif
117#ifdef CONFIG_TULIP
118 num += dc21x4x_initialize(bis);
119#endif
120#ifdef CONFIG_E1000
121 num += e1000_initialize(bis);
122#endif
123#ifdef CONFIG_PCNET
124 num += pcnet_initialize(bis);
125#endif
126#ifdef CONFIG_NATSEMI
127 num += natsemi_initialize(bis);
128#endif
129#ifdef CONFIG_NS8382X
130 num += ns8382x_initialize(bis);
131#endif
132#if defined(CONFIG_RTL8139)
133 num += rtl8139_initialize(bis);
134#endif
135#if defined(CONFIG_RTL8169)
136 num += rtl8169_initialize(bis);
137#endif
138#if defined(CONFIG_ULI526X)
139 num += uli526x_initialize(bis);
140#endif
141
142#endif /* CONFIG_PCI */
143 return num;
144}
145
146/*
147 * Boards with mv88e61xx switch can use this by defining
148 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
149 * the stuct and enums here are used to specify switch configuration params
150 */
151#if defined(CONFIG_MV88E61XX_SWITCH)
152
153/* constants for any 88E61xx switch */
154#define MV88E61XX_MAX_PORTS_NUM 6
155
156enum mv88e61xx_cfg_mdip {
157 MV88E61XX_MDIP_NOCHANGE,
158 MV88E61XX_MDIP_REVERSE
159};
160
161enum mv88e61xx_cfg_ledinit {
162 MV88E61XX_LED_INIT_DIS,
163 MV88E61XX_LED_INIT_EN
164};
165
166enum mv88e61xx_cfg_rgmiid {
167 MV88E61XX_RGMII_DELAY_DIS,
168 MV88E61XX_RGMII_DELAY_EN
169};
170
171enum mv88e61xx_cfg_prtstt {
172 MV88E61XX_PORTSTT_DISABLED,
173 MV88E61XX_PORTSTT_BLOCKING,
174 MV88E61XX_PORTSTT_LEARNING,
175 MV88E61XX_PORTSTT_FORWARDING
176};
177
178struct mv88e61xx_config {
179 char *name;
180 u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
181 enum mv88e61xx_cfg_rgmiid rgmii_delay;
182 enum mv88e61xx_cfg_prtstt portstate;
183 enum mv88e61xx_cfg_ledinit led_init;
184 enum mv88e61xx_cfg_mdip mdip;
185 u32 ports_enabled;
186 u8 cpuport;
187};
188
189/*
190 * Common mappings for Internal VLANs
191 * These mappings consider that all ports are useable; the driver
192 * will mask inexistent/unused ports.
193 */
194
195/* Switch mode : routes any port to any port */
196#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
197
198/* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
199#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
200
201int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
202#endif /* CONFIG_MV88E61XX_SWITCH */
203
204struct mii_dev *fec_get_miibus(uint32_t base_addr, int dev_id);
205#ifdef CONFIG_PHYLIB
206struct phy_device;
207int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
208 struct mii_dev *bus, struct phy_device *phydev);
209#else
210/*
211 * Allow FEC to fine-tune MII configuration on boards which require this.
212 */
213int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
214#endif
215
216#endif /* _NETDEV_H_ */