| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From b1b3c3d2ce62872c8dec4a7d645af6b3c565e094 Mon Sep 17 00:00:00 2001 |
| 2 | From: Sam Shih <sam.shih@mediatek.com> |
| 3 | Date: Mon, 20 Apr 2020 17:11:32 +0800 |
| 4 | Subject: [PATCH 2/3] mt7622 uboot: add dts and config for spi nand |
| 5 | |
| 6 | This patch add dts and config for mt7622 spi nand |
| 7 | |
| 8 | Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> |
| 9 | --- |
| 10 | arch/arm/dts/mt7622-rfb.dts | 6 ++++++ |
| 11 | arch/arm/dts/mt7622.dtsi | 20 ++++++++++++++++++++ |
| 12 | 2 files changed, 26 insertions(+) |
| 13 | |
| 14 | diff --git a/arch/arm/dts/mt7622-rfb.dts b/arch/arm/dts/mt7622-rfb.dts |
| 15 | index f05c3fe14d..05502bddec 100644 |
| 16 | --- a/arch/arm/dts/mt7622-rfb.dts |
| 17 | +++ b/arch/arm/dts/mt7622-rfb.dts |
| 18 | @@ -143,6 +143,12 @@ |
| 19 | }; |
| 20 | }; |
| 21 | |
| 22 | +&nandc { |
| 23 | + pinctrl-names = "default"; |
| 24 | + pinctrl-0 = <&snfi_pins>; |
| 25 | + status = "okay"; |
| 26 | +}; |
| 27 | + |
| 28 | &uart0 { |
| 29 | pinctrl-names = "default"; |
| 30 | pinctrl-0 = <&uart0_pins>; |
| 31 | diff --git a/arch/arm/dts/mt7622.dtsi b/arch/arm/dts/mt7622.dtsi |
| 32 | index 1e8ec9b48b..63fdb63d4a 100644 |
| 33 | --- a/arch/arm/dts/mt7622.dtsi |
| 34 | +++ b/arch/arm/dts/mt7622.dtsi |
| 35 | @@ -52,6 +52,26 @@ |
| 36 | #size-cells = <0>; |
| 37 | }; |
| 38 | |
| 39 | + nandc: nfi@1100d000 { |
| 40 | + compatible = "mediatek,mt7622-nfc"; |
| 41 | + reg = <0x1100d000 0x1000>, |
| 42 | + <0x1100e000 0x1000>; |
| 43 | + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>, |
| 44 | + <GIC_SPI 95 IRQ_TYPE_LEVEL_LOW>; |
| 45 | + clocks = <&pericfg CLK_PERI_NFI_PD>, |
| 46 | + <&pericfg CLK_PERI_NFIECC_PD>, |
| 47 | + <&pericfg CLK_PERI_SNFI_PD>, |
| 48 | + <&topckgen CLK_TOP_NFI_INFRA_SEL>, |
| 49 | + <&topckgen CLK_TOP_UNIVPLL2_D8>; |
| 50 | + clock-names = "nfi_clk", |
| 51 | + "ecc_clk", |
| 52 | + "snfi_clk", |
| 53 | + "spinfi_sel", |
| 54 | + "spinfi_parent_50m"; |
| 55 | + nand-ecc-mode = "hw"; |
| 56 | + status = "disabled"; |
| 57 | + }; |
| 58 | + |
| 59 | timer { |
| 60 | compatible = "arm,armv8-timer"; |
| 61 | interrupt-parent = <&gic>; |
| 62 | -- |
| 63 | 2.17.1 |
| 64 | |