blob: 466c0702590092e713559d2d483fe198d626337c [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001/*++
2Copyright (c) Realtek Semiconductor Corp. All rights reserved.
3
4Module Name:
5 HalPwrSeqCmd.c
6
7Abstract:
8 Implement HW Power sequence configuration CMD handling routine for Realtek devices.
9
10Major Change History:
11 When Who What
12 ---------- --------------- -------------------------------
13 2011-07-07 Roger Create.
14
15--*/
16#ifdef __ECOS
17#include <cyg/io/eth/rltk/819x/wrapper/sys_support.h>
18#include <cyg/io/eth/rltk/819x/wrapper/skbuff.h>
19#include <cyg/io/eth/rltk/819x/wrapper/timer.h>
20#include <cyg/io/eth/rltk/819x/wrapper/wrapper.h>
21#endif
22
23
24/*
25#if !defined(__ECOS) && !defined(CPTCFG_CFG80211_MODULE)
26#include "mp_precomp.h"
27#else
28#include "../mp_precomp.h"
29#endif
30*/
31#ifdef __KERNEL__
32#include <linux/kernel.h>
33#endif
34#include "8192cd.h"
35#include "8192cd_debug.h"
36#include "8192cd_headers.h"
37#include "8192cd_util.h"
38
39#if defined(CONFIG_RTL_88E_SUPPORT) || defined(CONFIG_RTL_8812_SUPPORT) || defined(CONFIG_RTL_8723B_SUPPORT)
40
41#define TRUE 1
42#define FALSE 0
43
44//
45// Description:
46// This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
47//
48// Assumption:
49// We should follow specific format which was released from HW SD.
50//
51// 2011.07.07, added by Roger.
52//
53unsigned int HalPwrSeqCmdParsing(struct rtl8192cd_priv *priv, unsigned char CutVersion, unsigned char FabVersion,
54 unsigned char InterfaceType, WLAN_PWR_CFG PwrSeqCmd[])
55{
56
57 WLAN_PWR_CFG PwrCfgCmd = {0};
58 unsigned int bPollingBit = FALSE;
59 unsigned int AryIdx=0;
60 unsigned char value = 0;
61 unsigned int offset = 0;
62 unsigned int pollingCount = 0; // polling autoload done.
63 unsigned int maxPollingCnt = 5000;
64 unsigned int round = 0;
65
66 do {
67 PwrCfgCmd=PwrSeqCmd[AryIdx];
68
69 DEBUG_INFO("%s %d, ENTRY, offset:0x%x, cut_msk:0x%x, fab_msk:0x%x, if_msk:0x%x, base:0x%x, cmd:0x%x, msk:0x%x, value:0x%x\n",
70 __FUNCTION__, __LINE__, GET_PWR_CFG_OFFSET(PwrCfgCmd), GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
71 GET_PWR_CFG_FAB_MASK(PwrCfgCmd), GET_PWR_CFG_INTF_MASK(PwrCfgCmd), GET_PWR_CFG_BASE(PwrCfgCmd),
72 GET_PWR_CFG_CMD(PwrCfgCmd), GET_PWR_CFG_MASK(PwrCfgCmd), GET_PWR_CFG_VALUE(PwrCfgCmd));
73
74 //2 Only Handle the command whose FAB, CUT, and Interface are matched
75 if((GET_PWR_CFG_FAB_MASK(PwrCfgCmd)&FabVersion)&&
76 (GET_PWR_CFG_CUT_MASK(PwrCfgCmd)&CutVersion)&&
77 (GET_PWR_CFG_INTF_MASK(PwrCfgCmd)&InterfaceType)) {
78 switch(GET_PWR_CFG_CMD(PwrCfgCmd))
79 {
80 case PWR_CMD_READ:
81 DEBUG_INFO("%s %d, PWR_CMD_READ\n", __FUNCTION__, __LINE__);
82 break;
83
84 case PWR_CMD_WRITE:
85 DEBUG_INFO("%s %d, PWR_CMD_WRITE\n", __FUNCTION__, __LINE__);
86 offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
87
88#ifdef CONFIG_SDIO_HCI
89 //
90 // <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface
91 // 2011.07.07.
92 //
93 if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
94 {
95 // Read Back SDIO Local value
96 value = SdioLocalCmd52Read1Byte(priv, offset);
97
98 value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
99 value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
100
101 // Write Back SDIO Local value
102 SdioLocalCmd52Write1Byte(priv, offset, value);
103 }
104 else
105#endif
106 {
107 //Read the value from system register
108 value = RTL_R8(offset);
109 value = value&(~(GET_PWR_CFG_MASK(PwrCfgCmd)));
110 value = value|(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd));
111
112 //Write the value back to sytem register
113 RTL_W8(offset, value);
114 }
115 break;
116
117 case PWR_CMD_POLLING:
118 DEBUG_INFO("%s %d, PWR_CMD_POLLING\n", __FUNCTION__, __LINE__);
119 bPollingBit = FALSE;
120 offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
121
122 do {
123#ifdef CONFIG_SDIO_HCI
124 if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
125 value = SdioLocalCmd52Read1Byte(priv, offset);
126 else
127#endif
128 value = RTL_R8(offset);
129 value=value&GET_PWR_CFG_MASK(PwrCfgCmd);
130 if(value==(GET_PWR_CFG_VALUE(PwrCfgCmd)&GET_PWR_CFG_MASK(PwrCfgCmd)))
131 bPollingBit=TRUE;
132 else
133 delay_us(10);
134
135 if(pollingCount++ > maxPollingCnt){
136 DEBUG_WARN("%s %d, PWR_CMD_POLLING, Fail to polling Offset[0x%x]\n", __FUNCTION__, __LINE__, offset);
137 return FALSE;
138 }
139 }while(!bPollingBit);
140
141 break;
142
143 case PWR_CMD_DELAY:
144 DEBUG_INFO("%s %d, PWR_CMD_DELAY\n", __FUNCTION__, __LINE__);
145 if(GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
146 delay_us(GET_PWR_CFG_OFFSET(PwrCfgCmd));
147 else
148 delay_us(GET_PWR_CFG_OFFSET(PwrCfgCmd)*1000);
149 break;
150
151 case PWR_CMD_END:
152 // When this command is parsed, end the process
153 DEBUG_INFO("%s %d, PWR_CMD_END\n", __FUNCTION__, __LINE__);
154 return TRUE;
155 break;
156
157 default:
158 DEBUG_ERR("%s %d, Unknown CMD!!\n", __FUNCTION__, __LINE__);
159 break;
160 }
161
162 }
163
164 AryIdx++;//Add Array Index
165
166 if (++round > 10000) {
167 panic_printk("%s[%d] while (1) goes too many\n", __FUNCTION__, __LINE__);
168 break;
169 }
170 }while(1);
171
172 return TRUE;
173}
174#endif
175