b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | --- a/include/libunwind-ppc32.h |
| 2 | +++ b/include/libunwind-ppc32.h |
| 3 | @@ -81,6 +81,88 @@ typedef int64_t unw_sword_t; |
| 4 | |
| 5 | typedef long double unw_tdep_fpreg_t; |
| 6 | |
| 7 | +#ifndef __GLIBC__ |
| 8 | + |
| 9 | +/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */ |
| 10 | + |
| 11 | +#define PT_R0 0 |
| 12 | +#define PT_R1 1 |
| 13 | +#define PT_R2 2 |
| 14 | +#define PT_R3 3 |
| 15 | +#define PT_R4 4 |
| 16 | +#define PT_R5 5 |
| 17 | +#define PT_R6 6 |
| 18 | +#define PT_R7 7 |
| 19 | +#define PT_R8 8 |
| 20 | +#define PT_R9 9 |
| 21 | +#define PT_R10 10 |
| 22 | +#define PT_R11 11 |
| 23 | +#define PT_R12 12 |
| 24 | +#define PT_R13 13 |
| 25 | +#define PT_R14 14 |
| 26 | +#define PT_R15 15 |
| 27 | +#define PT_R16 16 |
| 28 | +#define PT_R17 17 |
| 29 | +#define PT_R18 18 |
| 30 | +#define PT_R19 19 |
| 31 | +#define PT_R20 20 |
| 32 | +#define PT_R21 21 |
| 33 | +#define PT_R22 22 |
| 34 | +#define PT_R23 23 |
| 35 | +#define PT_R24 24 |
| 36 | +#define PT_R25 25 |
| 37 | +#define PT_R26 26 |
| 38 | +#define PT_R27 27 |
| 39 | +#define PT_R28 28 |
| 40 | +#define PT_R29 29 |
| 41 | +#define PT_R30 30 |
| 42 | +#define PT_R31 31 |
| 43 | + |
| 44 | +#define PT_NIP 32 |
| 45 | +#define PT_MSR 33 |
| 46 | +#define PT_ORIG_R3 34 |
| 47 | +#define PT_CTR 35 |
| 48 | +#define PT_LNK 36 |
| 49 | +#define PT_XER 37 |
| 50 | +#define PT_CCR 38 |
| 51 | +#ifndef __powerpc64__ |
| 52 | +#define PT_MQ 39 |
| 53 | +#else |
| 54 | +#define PT_SOFTE 39 |
| 55 | +#endif |
| 56 | +#define PT_TRAP 40 |
| 57 | +#define PT_DAR 41 |
| 58 | +#define PT_DSISR 42 |
| 59 | +#define PT_RESULT 43 |
| 60 | +#define PT_DSCR 44 |
| 61 | +#define PT_REGS_COUNT 44 |
| 62 | + |
| 63 | +#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ |
| 64 | + |
| 65 | +#ifndef __powerpc64__ |
| 66 | + |
| 67 | +#define PT_FPR31 (PT_FPR0 + 2*31) |
| 68 | +#define PT_FPSCR (PT_FPR0 + 2*32 + 1) |
| 69 | + |
| 70 | +#else /* __powerpc64__ */ |
| 71 | + |
| 72 | +#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ |
| 73 | + |
| 74 | + |
| 75 | +#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ |
| 76 | +#define PT_VSCR (PT_VR0 + 32*2 + 1) |
| 77 | +#define PT_VRSAVE (PT_VR0 + 33*2) |
| 78 | + |
| 79 | + |
| 80 | +/* |
| 81 | + * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 |
| 82 | + */ |
| 83 | +#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ |
| 84 | +#define PT_VSR31 (PT_VSR0 + 2*31) |
| 85 | +#endif /* __powerpc64__ */ |
| 86 | + |
| 87 | +#endif /* !__GLIBC__ */ |
| 88 | + |
| 89 | typedef enum |
| 90 | { |
| 91 | UNW_PPC32_R0, |
| 92 | --- a/include/libunwind-ppc64.h |
| 93 | +++ b/include/libunwind-ppc64.h |
| 94 | @@ -88,6 +88,88 @@ typedef struct { |
| 95 | uint64_t halves[2]; |
| 96 | } unw_tdep_vreg_t; |
| 97 | |
| 98 | +#ifndef __GLIBC__ |
| 99 | + |
| 100 | +/* We can't include asm/ptrace.h here, as it conflicts with musl's definitions */ |
| 101 | + |
| 102 | +#define PT_R0 0 |
| 103 | +#define PT_R1 1 |
| 104 | +#define PT_R2 2 |
| 105 | +#define PT_R3 3 |
| 106 | +#define PT_R4 4 |
| 107 | +#define PT_R5 5 |
| 108 | +#define PT_R6 6 |
| 109 | +#define PT_R7 7 |
| 110 | +#define PT_R8 8 |
| 111 | +#define PT_R9 9 |
| 112 | +#define PT_R10 10 |
| 113 | +#define PT_R11 11 |
| 114 | +#define PT_R12 12 |
| 115 | +#define PT_R13 13 |
| 116 | +#define PT_R14 14 |
| 117 | +#define PT_R15 15 |
| 118 | +#define PT_R16 16 |
| 119 | +#define PT_R17 17 |
| 120 | +#define PT_R18 18 |
| 121 | +#define PT_R19 19 |
| 122 | +#define PT_R20 20 |
| 123 | +#define PT_R21 21 |
| 124 | +#define PT_R22 22 |
| 125 | +#define PT_R23 23 |
| 126 | +#define PT_R24 24 |
| 127 | +#define PT_R25 25 |
| 128 | +#define PT_R26 26 |
| 129 | +#define PT_R27 27 |
| 130 | +#define PT_R28 28 |
| 131 | +#define PT_R29 29 |
| 132 | +#define PT_R30 30 |
| 133 | +#define PT_R31 31 |
| 134 | + |
| 135 | +#define PT_NIP 32 |
| 136 | +#define PT_MSR 33 |
| 137 | +#define PT_ORIG_R3 34 |
| 138 | +#define PT_CTR 35 |
| 139 | +#define PT_LNK 36 |
| 140 | +#define PT_XER 37 |
| 141 | +#define PT_CCR 38 |
| 142 | +#ifndef __powerpc64__ |
| 143 | +#define PT_MQ 39 |
| 144 | +#else |
| 145 | +#define PT_SOFTE 39 |
| 146 | +#endif |
| 147 | +#define PT_TRAP 40 |
| 148 | +#define PT_DAR 41 |
| 149 | +#define PT_DSISR 42 |
| 150 | +#define PT_RESULT 43 |
| 151 | +#define PT_DSCR 44 |
| 152 | +#define PT_REGS_COUNT 44 |
| 153 | + |
| 154 | +#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ |
| 155 | + |
| 156 | +#ifndef __powerpc64__ |
| 157 | + |
| 158 | +#define PT_FPR31 (PT_FPR0 + 2*31) |
| 159 | +#define PT_FPSCR (PT_FPR0 + 2*32 + 1) |
| 160 | + |
| 161 | +#else /* __powerpc64__ */ |
| 162 | + |
| 163 | +#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ |
| 164 | + |
| 165 | + |
| 166 | +#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ |
| 167 | +#define PT_VSCR (PT_VR0 + 32*2 + 1) |
| 168 | +#define PT_VRSAVE (PT_VR0 + 33*2) |
| 169 | + |
| 170 | + |
| 171 | +/* |
| 172 | + * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 |
| 173 | + */ |
| 174 | +#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ |
| 175 | +#define PT_VSR31 (PT_VSR0 + 2*31) |
| 176 | +#endif /* __powerpc64__ */ |
| 177 | + |
| 178 | +#endif /* !__GLIBC__ */ |
| 179 | + |
| 180 | typedef enum |
| 181 | { |
| 182 | UNW_PPC64_R0, |
| 183 | --- a/src/ppc32/Ginit.c |
| 184 | +++ b/src/ppc32/Ginit.c |
| 185 | @@ -46,10 +46,15 @@ static void * |
| 186 | uc_addr (ucontext_t *uc, int reg) |
| 187 | { |
| 188 | void *addr; |
| 189 | +#ifdef __GLIBC__ |
| 190 | + mcontext_t *mc = uc->uc_mcontext.uc_regs; |
| 191 | +#else |
| 192 | + mcontext_t *mc = &uc->uc_mcontext; |
| 193 | +#endif |
| 194 | |
| 195 | if ((unsigned) (reg - UNW_PPC32_R0) < 32) |
| 196 | #if defined(__linux__) |
| 197 | - addr = &uc->uc_mcontext.uc_regs->gregs[reg - UNW_PPC32_R0]; |
| 198 | + addr = &mc->gregs[reg - UNW_PPC32_R0]; |
| 199 | #elif defined(__FreeBSD__) |
| 200 | addr = &uc->uc_mcontext.mc_gpr[reg - UNW_PPC32_R0]; |
| 201 | #endif |
| 202 | @@ -58,7 +63,7 @@ uc_addr (ucontext_t *uc, int reg) |
| 203 | if ( ((unsigned) (reg - UNW_PPC32_F0) < 32) && |
| 204 | ((unsigned) (reg - UNW_PPC32_F0) >= 0) ) |
| 205 | #if defined(__linux__) |
| 206 | - addr = &uc->uc_mcontext.uc_regs->fpregs.fpregs[reg - UNW_PPC32_F0]; |
| 207 | + addr = &mc->fpregs.fpregs[reg - UNW_PPC32_F0]; |
| 208 | #elif defined(__FreeBSD__) |
| 209 | addr = &uc->uc_mcontext.mc_fpreg[reg - UNW_PPC32_F0]; |
| 210 | #endif |
| 211 | @@ -85,7 +90,7 @@ uc_addr (ucontext_t *uc, int reg) |
| 212 | return NULL; |
| 213 | } |
| 214 | #if defined(__linux__) |
| 215 | - addr = &uc->uc_mcontext.uc_regs->gregs[gregs_idx]; |
| 216 | + addr = &mc->gregs[gregs_idx]; |
| 217 | #elif defined(__FreeBSD__) |
| 218 | addr = &uc->uc_mcontext.mc_gpr[gregs_idx]; |
| 219 | #endif |
| 220 | --- a/src/ppc32/ucontext_i.h |
| 221 | +++ b/src/ppc32/ucontext_i.h |
| 222 | @@ -44,8 +44,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DE |
| 223 | //#define MQ_IDX 36 |
| 224 | #define LINK_IDX 36 |
| 225 | |
| 226 | +#ifdef __GLIBC__ |
| 227 | #define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->gregs[x] - (void *)&dmy_ctxt) ) |
| 228 | #define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.uc_regs->fpregs.fpregs[x] - (void *)&dmy_ctxt) ) |
| 229 | +#else |
| 230 | +#define _UC_MCONTEXT_GPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.gregs[x] - (void *)&dmy_ctxt) ) |
| 231 | +#define _UC_MCONTEXT_FPR(x) ( ((void *)&dmy_ctxt.uc_mcontext.fpregs.fpregs[x] - (void *)&dmy_ctxt) ) |
| 232 | +#endif |
| 233 | |
| 234 | /* These are dummy structures used only for obtaining the offsets of the |
| 235 | various structure members. */ |