b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 |
| 2 | From: Luiz Angelo Daros de Luca <luizluca@gmail.com> |
| 3 | Date: Mon, 10 Feb 2020 16:11:27 -0300 |
| 4 | Subject: [PATCH] spi: ath79: Implement the spi_mem interface |
| 5 | |
| 6 | Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> |
| 7 | --- |
| 8 | drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ |
| 9 | 1 file changed, 35 insertions(+) |
| 10 | |
| 11 | --- a/drivers/spi/spi-ath79.c |
| 12 | +++ b/drivers/spi/spi-ath79.c |
| 13 | @@ -15,6 +15,7 @@ |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/spi/spi.h> |
| 17 | +#include <linux/spi/spi-mem.h> |
| 18 | #include <linux/spi/spi_bitbang.h> |
| 19 | #include <linux/bitops.h> |
| 20 | #include <linux/clk.h> |
| 21 | @@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s |
| 22 | return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); |
| 23 | } |
| 24 | |
| 25 | +static int ath79_exec_mem_op(struct spi_mem *mem, |
| 26 | + const struct spi_mem_op *op) |
| 27 | +{ |
| 28 | + struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); |
| 29 | + |
| 30 | + /* Ensures that reading is performed on device connected |
| 31 | + to hardware cs0 */ |
| 32 | + if (mem->spi->chip_select || mem->spi->cs_gpiod) |
| 33 | + return -ENOTSUPP; |
| 34 | + |
| 35 | + /* Only use for fast-read op. */ |
| 36 | + if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || |
| 37 | + op->addr.nbytes != 3 || op->dummy.nbytes != 1) |
| 38 | + return -ENOTSUPP; |
| 39 | + |
| 40 | + /* disable GPIO mode */ |
| 41 | + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); |
| 42 | + |
| 43 | + memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); |
| 44 | + |
| 45 | + /* enable GPIO mode */ |
| 46 | + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); |
| 47 | + |
| 48 | + /* restore IOC register */ |
| 49 | + ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); |
| 50 | + |
| 51 | + return 0; |
| 52 | +} |
| 53 | + |
| 54 | +static const struct spi_controller_mem_ops ath79_mem_ops = { |
| 55 | + .exec_op = ath79_exec_mem_op, |
| 56 | +}; |
| 57 | + |
| 58 | static int ath79_spi_probe(struct platform_device *pdev) |
| 59 | { |
| 60 | struct spi_master *master; |
| 61 | @@ -164,6 +198,7 @@ static int ath79_spi_probe(struct platfo |
| 62 | ret = PTR_ERR(sp->base); |
| 63 | goto err_put_master; |
| 64 | } |
| 65 | + master->mem_ops = &ath79_mem_ops; |
| 66 | |
| 67 | sp->clk = devm_clk_get(&pdev->dev, "ahb"); |
| 68 | if (IS_ERR(sp->clk)) { |