blob: bf1c4a2842d4df1f33550f619365dfa3d8865f14 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
2From: Jonas Gorski <jogo@openwrt.org>
3Date: Sun, 9 Mar 2014 04:28:14 +0100
4Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
5 flash address
6
7Allow board implementations to force the physmap address.
8
9Signed-off-by: Jonas Gorski <jogo@openwrt.org>
10---
11 arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
12 .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
13 2 files changed, 16 insertions(+), 5 deletions(-)
14
15--- a/arch/mips/bcm63xx/dev-flash.c
16+++ b/arch/mips/bcm63xx/dev-flash.c
17@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
18 },
19 };
20
21+void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
22+{
23+ mtd_resources[0].start = start;
24+ mtd_resources[0].end = end;
25+}
26+
27 static int __init bcm63xx_detect_flash_type(void)
28 {
29 u32 val;
30@@ -173,12 +179,15 @@ int __init bcm63xx_flash_register(void)
31
32 switch (flash_type) {
33 case BCM63XX_FLASH_TYPE_PARALLEL:
34- /* read base address of boot chip select (0) */
35- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
36- val &= MPI_CSBASE_BASE_MASK;
37
38- mtd_resources[0].start = val;
39- mtd_resources[0].end = 0x1FFFFFFF;
40+ if (!mtd_resources[0].start) {
41+ /* read base address of boot chip select (0) */
42+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
43+ val &= MPI_CSBASE_BASE_MASK;
44+
45+ mtd_resources[0].start = val;
46+ mtd_resources[0].end = 0x1FFFFFFF;
47+ }
48
49 return platform_device_register(&mtd_dev);
50 case BCM63XX_FLASH_TYPE_SERIAL:
51--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
52+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
53@@ -10,6 +10,8 @@ enum {
54
55 void bcm63xx_flash_detect(void);
56
57+void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
58+
59 int __init bcm63xx_flash_register(void);
60
61 #endif /* __BCM63XX_FLASH_H */