blob: 9f09f9dacb8e82c9f9a65b2940183d09179e7ae3 [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From: Russell King <rmk+kernel@armlinux.org.uk>
2Bcc: linux@mail.armlinux.org.uk
3Cc: linux-i2c@vger.kernel.org
4Subject: [PATCH 04/17] i2c: pxa: re-arrange functions to flow better
5MIME-Version: 1.0
6Content-Disposition: inline
7Content-Transfer-Encoding: 8bit
8Content-Type: text/plain; charset="utf-8"
9
10Re-arrange the PXA I2C code to avoid forward declarations, and keep
11similar functionality (e.g. the non-IRQ mode support) together. This
12improves code readability.
13
14Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
15---
16 drivers/i2c/busses/i2c-pxa.c | 325 +++++++++++++++++------------------
17 1 file changed, 162 insertions(+), 163 deletions(-)
18
19--- a/drivers/i2c/busses/i2c-pxa.c
20+++ b/drivers/i2c/busses/i2c-pxa.c
21@@ -326,7 +326,6 @@ static void i2c_pxa_scream_blue_murder(s
22 #endif /* ifdef DEBUG / else */
23
24 static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
25-static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
26
27 static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
28 {
29@@ -697,34 +696,6 @@ static inline void i2c_pxa_stop_message(
30 writel(icr, _ICR(i2c));
31 }
32
33-static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
34-{
35- /* make timeout the same as for interrupt based functions */
36- long timeout = 2 * DEF_TIMEOUT;
37-
38- /*
39- * Wait for the bus to become free.
40- */
41- while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
42- udelay(1000);
43- show_state(i2c);
44- }
45-
46- if (timeout < 0) {
47- show_state(i2c);
48- dev_err(&i2c->adap.dev,
49- "i2c_pxa: timeout waiting for bus free\n");
50- return I2C_RETRY;
51- }
52-
53- /*
54- * Set master mode.
55- */
56- writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
57-
58- return 0;
59-}
60-
61 /*
62 * PXA I2C send master code
63 * 1. Load master code to IDBR and send it.
64@@ -753,140 +724,6 @@ static int i2c_pxa_send_mastercode(struc
65 return (timeout == 0) ? I2C_RETRY : 0;
66 }
67
68-static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
69- struct i2c_msg *msg, int num)
70-{
71- unsigned long timeout = 500000; /* 5 seconds */
72- int ret = 0;
73-
74- ret = i2c_pxa_pio_set_master(i2c);
75- if (ret)
76- goto out;
77-
78- i2c->msg = msg;
79- i2c->msg_num = num;
80- i2c->msg_idx = 0;
81- i2c->msg_ptr = 0;
82- i2c->irqlogidx = 0;
83-
84- i2c_pxa_start_message(i2c);
85-
86- while (i2c->msg_num > 0 && --timeout) {
87- i2c_pxa_handler(0, i2c);
88- udelay(10);
89- }
90-
91- i2c_pxa_stop_message(i2c);
92-
93- /*
94- * We place the return code in i2c->msg_idx.
95- */
96- ret = i2c->msg_idx;
97-
98-out:
99- if (timeout == 0) {
100- i2c_pxa_scream_blue_murder(i2c, "timeout");
101- ret = I2C_RETRY;
102- }
103-
104- return ret;
105-}
106-
107-/*
108- * We are protected by the adapter bus mutex.
109- */
110-static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
111-{
112- long timeout;
113- int ret;
114-
115- /*
116- * Wait for the bus to become free.
117- */
118- ret = i2c_pxa_wait_bus_not_busy(i2c);
119- if (ret) {
120- dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
121- goto out;
122- }
123-
124- /*
125- * Set master mode.
126- */
127- ret = i2c_pxa_set_master(i2c);
128- if (ret) {
129- dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
130- goto out;
131- }
132-
133- if (i2c->high_mode) {
134- ret = i2c_pxa_send_mastercode(i2c);
135- if (ret) {
136- dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
137- goto out;
138- }
139- }
140-
141- spin_lock_irq(&i2c->lock);
142-
143- i2c->msg = msg;
144- i2c->msg_num = num;
145- i2c->msg_idx = 0;
146- i2c->msg_ptr = 0;
147- i2c->irqlogidx = 0;
148-
149- i2c_pxa_start_message(i2c);
150-
151- spin_unlock_irq(&i2c->lock);
152-
153- /*
154- * The rest of the processing occurs in the interrupt handler.
155- */
156- timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
157- i2c_pxa_stop_message(i2c);
158-
159- /*
160- * We place the return code in i2c->msg_idx.
161- */
162- ret = i2c->msg_idx;
163-
164- if (!timeout && i2c->msg_num) {
165- i2c_pxa_scream_blue_murder(i2c, "timeout");
166- ret = I2C_RETRY;
167- }
168-
169- out:
170- return ret;
171-}
172-
173-static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
174- struct i2c_msg msgs[], int num)
175-{
176- struct pxa_i2c *i2c = adap->algo_data;
177- int ret, i;
178-
179- /* If the I2C controller is disabled we need to reset it
180- (probably due to a suspend/resume destroying state). We do
181- this here as we can then avoid worrying about resuming the
182- controller before its users. */
183- if (!(readl(_ICR(i2c)) & ICR_IUE))
184- i2c_pxa_reset(i2c);
185-
186- for (i = adap->retries; i >= 0; i--) {
187- ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
188- if (ret != I2C_RETRY)
189- goto out;
190-
191- if (i2c_debug)
192- dev_dbg(&adap->dev, "Retrying transmission\n");
193- udelay(100);
194- }
195- i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
196- ret = -EREMOTEIO;
197- out:
198- i2c_pxa_set_slave(i2c, ret);
199- return ret;
200-}
201-
202 /*
203 * i2c_pxa_master_complete - complete the message and wake up.
204 */
205@@ -1093,6 +930,71 @@ static irqreturn_t i2c_pxa_handler(int t
206 return IRQ_HANDLED;
207 }
208
209+/*
210+ * We are protected by the adapter bus mutex.
211+ */
212+static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
213+{
214+ long timeout;
215+ int ret;
216+
217+ /*
218+ * Wait for the bus to become free.
219+ */
220+ ret = i2c_pxa_wait_bus_not_busy(i2c);
221+ if (ret) {
222+ dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
223+ goto out;
224+ }
225+
226+ /*
227+ * Set master mode.
228+ */
229+ ret = i2c_pxa_set_master(i2c);
230+ if (ret) {
231+ dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
232+ goto out;
233+ }
234+
235+ if (i2c->high_mode) {
236+ ret = i2c_pxa_send_mastercode(i2c);
237+ if (ret) {
238+ dev_err(&i2c->adap.dev, "i2c_pxa_send_mastercode timeout\n");
239+ goto out;
240+ }
241+ }
242+
243+ spin_lock_irq(&i2c->lock);
244+
245+ i2c->msg = msg;
246+ i2c->msg_num = num;
247+ i2c->msg_idx = 0;
248+ i2c->msg_ptr = 0;
249+ i2c->irqlogidx = 0;
250+
251+ i2c_pxa_start_message(i2c);
252+
253+ spin_unlock_irq(&i2c->lock);
254+
255+ /*
256+ * The rest of the processing occurs in the interrupt handler.
257+ */
258+ timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
259+ i2c_pxa_stop_message(i2c);
260+
261+ /*
262+ * We place the return code in i2c->msg_idx.
263+ */
264+ ret = i2c->msg_idx;
265+
266+ if (!timeout && i2c->msg_num) {
267+ i2c_pxa_scream_blue_murder(i2c, "timeout");
268+ ret = I2C_RETRY;
269+ }
270+
271+ out:
272+ return ret;
273+}
274
275 static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
276 {
277@@ -1126,6 +1028,103 @@ static const struct i2c_algorithm i2c_px
278 .functionality = i2c_pxa_functionality,
279 };
280
281+/* Non-interrupt mode support */
282+static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
283+{
284+ /* make timeout the same as for interrupt based functions */
285+ long timeout = 2 * DEF_TIMEOUT;
286+
287+ /*
288+ * Wait for the bus to become free.
289+ */
290+ while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
291+ udelay(1000);
292+ show_state(i2c);
293+ }
294+
295+ if (timeout < 0) {
296+ show_state(i2c);
297+ dev_err(&i2c->adap.dev,
298+ "i2c_pxa: timeout waiting for bus free\n");
299+ return I2C_RETRY;
300+ }
301+
302+ /*
303+ * Set master mode.
304+ */
305+ writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
306+
307+ return 0;
308+}
309+
310+static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
311+ struct i2c_msg *msg, int num)
312+{
313+ unsigned long timeout = 500000; /* 5 seconds */
314+ int ret = 0;
315+
316+ ret = i2c_pxa_pio_set_master(i2c);
317+ if (ret)
318+ goto out;
319+
320+ i2c->msg = msg;
321+ i2c->msg_num = num;
322+ i2c->msg_idx = 0;
323+ i2c->msg_ptr = 0;
324+ i2c->irqlogidx = 0;
325+
326+ i2c_pxa_start_message(i2c);
327+
328+ while (i2c->msg_num > 0 && --timeout) {
329+ i2c_pxa_handler(0, i2c);
330+ udelay(10);
331+ }
332+
333+ i2c_pxa_stop_message(i2c);
334+
335+ /*
336+ * We place the return code in i2c->msg_idx.
337+ */
338+ ret = i2c->msg_idx;
339+
340+out:
341+ if (timeout == 0) {
342+ i2c_pxa_scream_blue_murder(i2c, "timeout");
343+ ret = I2C_RETRY;
344+ }
345+
346+ return ret;
347+}
348+
349+static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
350+ struct i2c_msg msgs[], int num)
351+{
352+ struct pxa_i2c *i2c = adap->algo_data;
353+ int ret, i;
354+
355+ /* If the I2C controller is disabled we need to reset it
356+ (probably due to a suspend/resume destroying state). We do
357+ this here as we can then avoid worrying about resuming the
358+ controller before its users. */
359+ if (!(readl(_ICR(i2c)) & ICR_IUE))
360+ i2c_pxa_reset(i2c);
361+
362+ for (i = adap->retries; i >= 0; i--) {
363+ ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
364+ if (ret != I2C_RETRY)
365+ goto out;
366+
367+ if (i2c_debug)
368+ dev_dbg(&adap->dev, "Retrying transmission\n");
369+ udelay(100);
370+ }
371+ i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
372+ ret = -EREMOTEIO;
373+ out:
374+ i2c_pxa_set_slave(i2c, ret);
375+ return ret;
376+}
377+
378 static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
379 .master_xfer = i2c_pxa_pio_xfer,
380 .functionality = i2c_pxa_functionality,