blob: 93ed19374796168b0f13c8d2d95f86b00bea811b [file] [log] [blame]
b.liue9582032025-04-17 19:18:16 +08001From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
2From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
3Date: Tue, 21 Apr 2020 00:18:08 +0200
4Subject: [PATCH] net: dsa: mt7530: Support EEE features
5MIME-Version: 1.0
6Content-Type: text/plain; charset=UTF-8
7Content-Transfer-Encoding: 8bit
8
9Signed-off-by: René van Dorst <opensource@vdorst.com>
10--- a/drivers/net/dsa/mt7530.c
11+++ b/drivers/net/dsa/mt7530.c
12@@ -1408,9 +1408,13 @@ static void mt7530_phylink_mac_config(st
13 switch (state->speed) {
14 case SPEED_1000:
15 mcr_new |= PMCR_FORCE_SPEED_1000;
16+ if (priv->eee_enable & BIT(port))
17+ mcr_new |= PMCR_FORCE_EEE1G;
18 break;
19 case SPEED_100:
20 mcr_new |= PMCR_FORCE_SPEED_100;
21+ if (priv->eee_enable & BIT(port))
22+ mcr_new |= PMCR_FORCE_EEE100;
23 break;
24 }
25 if (state->duplex == DUPLEX_FULL) {
26@@ -1546,6 +1550,54 @@ mt7530_phylink_mac_link_state(struct dsa
27 return 1;
28 }
29
30+static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
31+ struct ethtool_eee *e)
32+{
33+ struct mt7530_priv *priv = ds->priv;
34+ u32 eeecr, pmsr;
35+
36+ e->eee_enabled = !!(priv->eee_enable & BIT(port));
37+
38+ if (e->eee_enabled) {
39+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
40+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
41+ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF;
42+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
43+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
44+ } else {
45+ e->tx_lpi_enabled = 0;
46+ e->tx_lpi_timer = 0;
47+ e->eee_active = 0;
48+ }
49+
50+ return 0;
51+}
52+
53+static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
54+ struct ethtool_eee *e)
55+{
56+ struct mt7530_priv *priv = ds->priv;
57+ u32 eeecr;
58+
59+ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
60+ return -EINVAL;
61+
62+ if (e->eee_enabled) {
63+ priv->eee_enable |= BIT(port);
64+ //MT7530_PMEEECR_P
65+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
66+ eeecr &= 0xFFFF0000;
67+ if (!e->tx_lpi_enabled)
68+ eeecr |= LPI_MODE_EN;
69+ eeecr |= LPI_THRESH(e->tx_lpi_timer);
70+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
71+ } else {
72+ priv->eee_enable &= ~(BIT(port));
73+ }
74+
75+ return 0;
76+}
77+
78 static const struct dsa_switch_ops mt7530_switch_ops = {
79 .get_tag_protocol = mtk_get_tag_protocol,
80 .setup = mt7530_setup,
81@@ -1573,6 +1625,8 @@ static const struct dsa_switch_ops mt753
82 .phylink_mac_config = mt7530_phylink_mac_config,
83 .phylink_mac_link_down = mt7530_phylink_mac_link_down,
84 .phylink_mac_link_up = mt7530_phylink_mac_link_up,
85+ .get_mac_eee = mt7530_get_mac_eee,
86+ .set_mac_eee = mt7530_set_mac_eee,
87 };
88
89 static const struct of_device_id mt7530_of_match[] = {
90--- a/drivers/net/dsa/mt7530.h
91+++ b/drivers/net/dsa/mt7530.h
92@@ -212,6 +212,8 @@ enum mt7530_vlan_port_attr {
93 #define PMCR_RX_EN BIT(13)
94 #define PMCR_BACKOFF_EN BIT(9)
95 #define PMCR_BACKPR_EN BIT(8)
96+#define PMCR_FORCE_EEE1G BIT(7)
97+#define PMCR_FORCE_EEE100 BIT(6)
98 #define PMCR_TX_FC_EN BIT(5)
99 #define PMCR_RX_FC_EN BIT(4)
100 #define PMCR_FORCE_SPEED_1000 BIT(3)
101@@ -233,6 +235,12 @@ enum mt7530_vlan_port_attr {
102 #define PMSR_DPX BIT(1)
103 #define PMSR_LINK BIT(0)
104
105+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
106+#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24)
107+#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16)
108+#define LPI_THRESH(x) ((x & 0xFFF) << 4)
109+#define LPI_MODE_EN BIT(0)
110+
111 /* Register for MIB */
112 #define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
113 #define MT7530_MIB_CCR 0x4fe0
114@@ -471,6 +479,7 @@ struct mt7530_priv {
115 unsigned int p5_intf_sel;
116 u8 mirror_rx;
117 u8 mirror_tx;
118+ u8 eee_enable;
119
120 struct mt7530_port ports[MT7530_NUM_PORTS];
121 /* protect among processes for registers access*/