| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From 92aff696c8708ff5293eb000e98456e23afe1cb3 Mon Sep 17 00:00:00 2001 |
| 2 | From: Pankaj Bansal <pankaj.bansal@nxp.com> |
| 3 | Date: Mon, 22 Apr 2019 16:43:13 +0530 |
| 4 | Subject: [PATCH] arm64: dts: fsl: layerscape: fix warnings when compiling dts |
| 5 | files |
| 6 | |
| 7 | when compiling dts file using DTC_FLAG='-@', the device tree compiler |
| 8 | reports these warnings: |
| 9 | |
| 10 | Warning (alias_paths): /aliases: aliases property name must include |
| 11 | only lowercase and '-' |
| 12 | |
| 13 | Fixed the node aliases to silence these warnings. |
| 14 | |
| 15 | Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> |
| 16 | --- |
| 17 | arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 34 +++++++++++------------ |
| 18 | arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 28 +++++++++---------- |
| 19 | 2 files changed, 31 insertions(+), 31 deletions(-) |
| 20 | |
| 21 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts |
| 22 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts |
| 23 | @@ -3,7 +3,7 @@ |
| 24 | * Device Tree Include file for Freescale Layerscape-1043A family SoC. |
| 25 | * |
| 26 | * Copyright 2014-2015 Freescale Semiconductor, Inc. |
| 27 | - * Copyright 2018 NXP |
| 28 | + * Copyright 2018-2019 NXP |
| 29 | * |
| 30 | * Mingkai Hu <Mingkai.hu@freescale.com> |
| 31 | */ |
| 32 | @@ -24,22 +24,22 @@ |
| 33 | serial1 = &duart1; |
| 34 | serial2 = &duart2; |
| 35 | serial3 = &duart3; |
| 36 | - sgmii_riser_s1_p1 = &sgmii_phy_s1_p1; |
| 37 | - sgmii_riser_s2_p1 = &sgmii_phy_s2_p1; |
| 38 | - sgmii_riser_s3_p1 = &sgmii_phy_s3_p1; |
| 39 | - sgmii_riser_s4_p1 = &sgmii_phy_s4_p1; |
| 40 | - qsgmii_s1_p1 = &qsgmii_phy_s1_p1; |
| 41 | - qsgmii_s1_p2 = &qsgmii_phy_s1_p2; |
| 42 | - qsgmii_s1_p3 = &qsgmii_phy_s1_p3; |
| 43 | - qsgmii_s1_p4 = &qsgmii_phy_s1_p4; |
| 44 | - qsgmii_s2_p1 = &qsgmii_phy_s2_p1; |
| 45 | - qsgmii_s2_p2 = &qsgmii_phy_s2_p2; |
| 46 | - qsgmii_s2_p3 = &qsgmii_phy_s2_p3; |
| 47 | - qsgmii_s2_p4 = &qsgmii_phy_s2_p4; |
| 48 | - emi1_slot1 = &ls1043mdio_s1; |
| 49 | - emi1_slot2 = &ls1043mdio_s2; |
| 50 | - emi1_slot3 = &ls1043mdio_s3; |
| 51 | - emi1_slot4 = &ls1043mdio_s4; |
| 52 | + sgmii-riser-s1-p1 = &sgmii_phy_s1_p1; |
| 53 | + sgmii-riser-s2-p1 = &sgmii_phy_s2_p1; |
| 54 | + sgmii-riser-s3-p1 = &sgmii_phy_s3_p1; |
| 55 | + sgmii-riser-s4-p1 = &sgmii_phy_s4_p1; |
| 56 | + qsgmii-s1-p1 = &qsgmii_phy_s1_p1; |
| 57 | + qsgmii-s1-p2 = &qsgmii_phy_s1_p2; |
| 58 | + qsgmii-s1-p3 = &qsgmii_phy_s1_p3; |
| 59 | + qsgmii-s1-p4 = &qsgmii_phy_s1_p4; |
| 60 | + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; |
| 61 | + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; |
| 62 | + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; |
| 63 | + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; |
| 64 | + emi1-slot1 = &ls1043mdio_s1; |
| 65 | + emi1-slot2 = &ls1043mdio_s2; |
| 66 | + emi1-slot3 = &ls1043mdio_s3; |
| 67 | + emi1-slot4 = &ls1043mdio_s4; |
| 68 | }; |
| 69 | |
| 70 | chosen { |
| 71 | --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts |
| 72 | +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts |
| 73 | @@ -3,7 +3,7 @@ |
| 74 | * Device Tree Include file for Freescale Layerscape-1046A family SoC. |
| 75 | * |
| 76 | * Copyright 2016 Freescale Semiconductor, Inc. |
| 77 | - * Copyright 2018 NXP |
| 78 | + * Copyright 2018-2019 NXP |
| 79 | * |
| 80 | * Shaohui Xie <Shaohui.Xie@nxp.com> |
| 81 | */ |
| 82 | @@ -26,19 +26,19 @@ |
| 83 | serial2 = &duart2; |
| 84 | serial3 = &duart3; |
| 85 | |
| 86 | - emi1_slot1 = &ls1046mdio_s1; |
| 87 | - emi1_slot2 = &ls1046mdio_s2; |
| 88 | - emi1_slot4 = &ls1046mdio_s4; |
| 89 | - |
| 90 | - sgmii_s1_p1 = &sgmii_phy_s1_p1; |
| 91 | - sgmii_s1_p2 = &sgmii_phy_s1_p2; |
| 92 | - sgmii_s1_p3 = &sgmii_phy_s1_p3; |
| 93 | - sgmii_s1_p4 = &sgmii_phy_s1_p4; |
| 94 | - sgmii_s4_p1 = &sgmii_phy_s4_p1; |
| 95 | - qsgmii_s2_p1 = &qsgmii_phy_s2_p1; |
| 96 | - qsgmii_s2_p2 = &qsgmii_phy_s2_p2; |
| 97 | - qsgmii_s2_p3 = &qsgmii_phy_s2_p3; |
| 98 | - qsgmii_s2_p4 = &qsgmii_phy_s2_p4; |
| 99 | + emi1-slot1 = &ls1046mdio_s1; |
| 100 | + emi1-slot2 = &ls1046mdio_s2; |
| 101 | + emi1-slot4 = &ls1046mdio_s4; |
| 102 | + |
| 103 | + sgmii-s1-p1 = &sgmii_phy_s1_p1; |
| 104 | + sgmii-s1-p2 = &sgmii_phy_s1_p2; |
| 105 | + sgmii-s1-p3 = &sgmii_phy_s1_p3; |
| 106 | + sgmii-s1-p4 = &sgmii_phy_s1_p4; |
| 107 | + sgmii-s4-p1 = &sgmii_phy_s4_p1; |
| 108 | + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; |
| 109 | + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; |
| 110 | + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; |
| 111 | + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; |
| 112 | }; |
| 113 | |
| 114 | chosen { |