b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From 08861b67c94a28e3a1bbcfb04a141ab0eafa5dac Mon Sep 17 00:00:00 2001 |
| 2 | From: Calvin Johnson <calvin.johnson@nxp.com> |
| 3 | Date: Sat, 16 Sep 2017 07:05:49 +0530 |
| 4 | Subject: [PATCH] net: fsl_ppfe: dts binding for ppfe |
| 5 | |
| 6 | Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> |
| 7 | Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com> |
| 8 | --- |
| 9 | .../devicetree/bindings/net/fsl_ppfe/pfe.txt | 173 +++++++++++++++++++++ |
| 10 | 1 file changed, 173 insertions(+) |
| 11 | create mode 100644 Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt |
| 12 | |
| 13 | --- /dev/null |
| 14 | +++ b/Documentation/devicetree/bindings/net/fsl_ppfe/pfe.txt |
| 15 | @@ -0,0 +1,173 @@ |
| 16 | +============================================================================= |
| 17 | +NXP Programmable Packet Forwarding Engine Device Bindings |
| 18 | + |
| 19 | +CONTENTS |
| 20 | + - PFE Node |
| 21 | + - Ethernet Node |
| 22 | + |
| 23 | +============================================================================= |
| 24 | +PFE Node |
| 25 | + |
| 26 | +DESCRIPTION |
| 27 | + |
| 28 | +PFE Node has all the properties associated with Packet Forwarding Engine block. |
| 29 | + |
| 30 | +PROPERTIES |
| 31 | + |
| 32 | +- compatible |
| 33 | + Usage: required |
| 34 | + Value type: <stringlist> |
| 35 | + Definition: Must include "fsl,pfe" |
| 36 | + |
| 37 | +- reg |
| 38 | + Usage: required |
| 39 | + Value type: <prop-encoded-array> |
| 40 | + Definition: A standard property. |
| 41 | + Specifies the offset of the following registers: |
| 42 | + - PFE configuration registers |
| 43 | + - DDR memory used by PFE |
| 44 | + |
| 45 | +- fsl,pfe-num-interfaces |
| 46 | + Usage: required |
| 47 | + Value type: <u32> |
| 48 | + Definition: Must be present. Value can be either one or two. |
| 49 | + |
| 50 | +- interrupts |
| 51 | + Usage: required |
| 52 | + Value type: <prop-encoded-array> |
| 53 | + Definition: Three interrupts are specified in this property. |
| 54 | + - HIF interrupt |
| 55 | + - HIF NO COPY interrupt |
| 56 | + - Wake On LAN interrupt |
| 57 | + |
| 58 | +- interrupt-names |
| 59 | + Usage: required |
| 60 | + Value type: <stringlist> |
| 61 | + Definition: Following strings are defined for the 3 interrupts. |
| 62 | + "pfe_hif" - HIF interrupt |
| 63 | + "pfe_hif_nocpy" - HIF NO COPY interrupt |
| 64 | + "pfe_wol" - Wake On LAN interrupt |
| 65 | + |
| 66 | +- memory-region |
| 67 | + Usage: required |
| 68 | + Value type: <phandle> |
| 69 | + Definition: phandle to a node describing reserved memory used by pfe. |
| 70 | + Refer:- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
| 71 | + |
| 72 | +- fsl,pfe-scfg |
| 73 | + Usage: required |
| 74 | + Value type: <phandle> |
| 75 | + Definition: phandle for scfg. |
| 76 | + |
| 77 | +- fsl,rcpm-wakeup |
| 78 | + Usage: required |
| 79 | + Value type: <phandle> |
| 80 | + Definition: phandle for rcpm. |
| 81 | + |
| 82 | +- clocks |
| 83 | + Usage: required |
| 84 | + Value type: <phandle> |
| 85 | + Definition: phandle for clockgen. |
| 86 | + |
| 87 | +- clock-names |
| 88 | + Usage: required |
| 89 | + Value type: <string> |
| 90 | + Definition: phandle for clock name. |
| 91 | + |
| 92 | +EXAMPLE |
| 93 | + |
| 94 | +pfe: pfe@04000000 { |
| 95 | + compatible = "fsl,pfe"; |
| 96 | + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */ |
| 97 | + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */ |
| 98 | + reg-names = "pfe", "pfe-ddr"; |
| 99 | + fsl,pfe-num-interfaces = <0x2>; |
| 100 | + interrupts = <0 172 0x4>, /* HIF interrupt */ |
| 101 | + <0 173 0x4>, /*HIF_NOCPY interrupt */ |
| 102 | + <0 174 0x4>; /* WoL interrupt */ |
| 103 | + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol"; |
| 104 | + memory-region = <&pfe_reserved>; |
| 105 | + fsl,pfe-scfg = <&scfg 0>; |
| 106 | + fsl,rcpm-wakeup = <&rcpm 0xf0000020>; |
| 107 | + clocks = <&clockgen 4 0>; |
| 108 | + clock-names = "pfe"; |
| 109 | + |
| 110 | + status = "okay"; |
| 111 | + pfe_mac0: ethernet@0 { |
| 112 | + }; |
| 113 | + |
| 114 | + pfe_mac1: ethernet@1 { |
| 115 | + }; |
| 116 | +}; |
| 117 | + |
| 118 | +============================================================================= |
| 119 | +Ethernet Node |
| 120 | + |
| 121 | +DESCRIPTION |
| 122 | + |
| 123 | +Ethernet Node has all the properties associated with PFE used by platforms to |
| 124 | +connect to PHY: |
| 125 | + |
| 126 | +PROPERTIES |
| 127 | + |
| 128 | +- compatible |
| 129 | + Usage: required |
| 130 | + Value type: <stringlist> |
| 131 | + Definition: Must include "fsl,pfe-gemac-port" |
| 132 | + |
| 133 | +- reg |
| 134 | + Usage: required |
| 135 | + Value type: <prop-encoded-array> |
| 136 | + Definition: A standard property. |
| 137 | + Specifies the gemacid of the interface. |
| 138 | + |
| 139 | +- fsl,gemac-bus-id |
| 140 | + Usage: required |
| 141 | + Value type: <u32> |
| 142 | + Definition: Must be present. Value should be the id of the bus |
| 143 | + connected to gemac. |
| 144 | + |
| 145 | +- fsl,gemac-phy-id |
| 146 | + Usage: required |
| 147 | + Value type: <u32> |
| 148 | + Definition: Must be present. Value should be the id of the phy |
| 149 | + connected to gemac. |
| 150 | + |
| 151 | +- fsl,mdio-mux-val |
| 152 | + Usage: required |
| 153 | + Value type: <u32> |
| 154 | + Definition: Must be present. Value can be either 0 or 2 or 3. |
| 155 | + This value is used to configure the mux to enable mdio. |
| 156 | + |
| 157 | +- phy-mode |
| 158 | + Usage: required |
| 159 | + Value type: <string> |
| 160 | + Definition: Must include "sgmii" |
| 161 | + |
| 162 | +- fsl,pfe-phy-if-flags |
| 163 | + Usage: required |
| 164 | + Value type: <u32> |
| 165 | + Definition: Must be present. Value should be 0 by default. |
| 166 | + If there is not phy connected, this need to be 1. |
| 167 | + |
| 168 | +- mdio |
| 169 | + optional subnode that specifies the mdio bus. This has reg |
| 170 | + property which is used to enable/disable the mdio bus. |
| 171 | + |
| 172 | +EXAMPLE |
| 173 | + |
| 174 | +ethernet@0 { |
| 175 | + compatible = "fsl,pfe-gemac-port"; |
| 176 | + #address-cells = <1>; |
| 177 | + #size-cells = <0>; |
| 178 | + reg = <0x0>; /* GEM_ID */ |
| 179 | + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ |
| 180 | + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ |
| 181 | + fsl,mdio-mux-val = <0x0>; |
| 182 | + phy-mode = "sgmii"; |
| 183 | + fsl,pfe-phy-if-flags = <0x0>; |
| 184 | + |
| 185 | + mdio@0 { |
| 186 | + reg = <0x1>; /* enabled/disabled */ |
| 187 | + }; |
| 188 | +}; |