b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From e54e051c0adbe86116ab81c09a208f3a62c84f92 Mon Sep 17 00:00:00 2001 |
| 2 | From: Fugang Duan <fugang.duan@nxp.com> |
| 3 | Date: Wed, 5 Jun 2019 18:38:51 +0800 |
| 4 | Subject: [PATCH] net: phy: at803x: add vddio-1v8 and eee disable support |
| 5 | |
| 6 | Add new property "at803x,vddio-1p8v" and "at803x,eee-disabled" |
| 7 | support. |
| 8 | |
| 9 | Signed-off-by: Fugang Duan <fugang.duan@nxp.com> |
| 10 | [ Aisheng: fix small merge conflict ] |
| 11 | Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> |
| 12 | [rebase] |
| 13 | Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> |
| 14 | --- |
| 15 | drivers/net/phy/at803x.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++++ |
| 16 | 1 file changed, 64 insertions(+) |
| 17 | |
| 18 | --- a/drivers/net/phy/at803x.c |
| 19 | +++ b/drivers/net/phy/at803x.c |
| 20 | @@ -44,8 +44,13 @@ |
| 21 | #define AT803X_LOC_MAC_ADDR_0_15_OFFSET 0x804C |
| 22 | #define AT803X_LOC_MAC_ADDR_16_31_OFFSET 0x804B |
| 23 | #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A |
| 24 | +#define AT803X_SMARTEEE_CTL3_OFFSET 0x805D |
| 25 | +#define AT803X_MMD_ACCESS_CONTROL 0x0D |
| 26 | +#define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E |
| 27 | +#define AT803X_FUNC_DATA 0x4003 |
| 28 | #define AT803X_REG_CHIP_CONFIG 0x1f |
| 29 | #define AT803X_BT_BX_REG_SEL 0x8000 |
| 30 | +#define AT803X_SMARTEEE_DISABLED_VAL 0x1000 |
| 31 | #define AT803X_SGMII_ANEG_EN 0x1000 |
| 32 | |
| 33 | #define AT803X_DEBUG_ADDR 0x1D |
| 34 | @@ -65,6 +70,9 @@ |
| 35 | |
| 36 | #define AT803X_LPI_EN BIT(8) |
| 37 | |
| 38 | +#define AT803X_DEBUG_REG_31 0x1f |
| 39 | +#define AT803X_VDDIO_1P8V_EN 0x8 |
| 40 | + |
| 41 | #define ATH8030_PHY_ID 0x004dd076 |
| 42 | #define ATH8031_PHY_ID 0x004dd074 |
| 43 | #define ATH8032_PHY_ID 0x004dd023 |
| 44 | @@ -72,12 +80,16 @@ |
| 45 | #define AT803X_PHY_ID_MASK 0xffffffef |
| 46 | #define AT8032_PHY_ID_MASK 0xffffffff |
| 47 | |
| 48 | +#define AT803X_EEE_FEATURE_DISABLE (1 << 1) |
| 49 | +#define AT803X_VDDIO_1P8V (1 << 2) |
| 50 | + |
| 51 | MODULE_DESCRIPTION("Atheros 803x PHY driver"); |
| 52 | MODULE_AUTHOR("Matus Ujhelyi"); |
| 53 | MODULE_LICENSE("GPL"); |
| 54 | |
| 55 | struct at803x_priv { |
| 56 | bool phy_reset:1; |
| 57 | + u32 quirks; |
| 58 | }; |
| 59 | |
| 60 | struct at803x_context { |
| 61 | @@ -141,6 +153,39 @@ static int at803x_disable_tx_delay(struc |
| 62 | AT803X_DEBUG_TX_CLK_DLY_EN, 0); |
| 63 | } |
| 64 | |
| 65 | +static inline int at803x_set_vddio_1p8v(struct phy_device *phydev) |
| 66 | +{ |
| 67 | + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_31, 0, |
| 68 | + AT803X_VDDIO_1P8V_EN); |
| 69 | +} |
| 70 | + |
| 71 | +static int at803x_disable_eee(struct phy_device *phydev) |
| 72 | +{ |
| 73 | + int ret; |
| 74 | + |
| 75 | + ret = phy_write(phydev, AT803X_MMD_ACCESS_CONTROL, |
| 76 | + AT803X_DEVICE_ADDR); |
| 77 | + if (ret < 0) |
| 78 | + return ret; |
| 79 | + |
| 80 | + ret = phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA, |
| 81 | + AT803X_SMARTEEE_CTL3_OFFSET); |
| 82 | + if (ret < 0) |
| 83 | + return ret; |
| 84 | + |
| 85 | + ret = phy_write(phydev, AT803X_MMD_ACCESS_CONTROL, |
| 86 | + AT803X_FUNC_DATA); |
| 87 | + if (ret < 0) |
| 88 | + return ret; |
| 89 | + |
| 90 | + ret = phy_write(phydev, AT803X_MMD_ACCESS_CONTROL_DATA, |
| 91 | + AT803X_SMARTEEE_DISABLED_VAL); |
| 92 | + if (ret < 0) |
| 93 | + return ret; |
| 94 | + |
| 95 | + return 0; |
| 96 | +} |
| 97 | + |
| 98 | /* save relevant PHY registers to private copy */ |
| 99 | static void at803x_context_save(struct phy_device *phydev, |
| 100 | struct at803x_context *context) |
| 101 | @@ -254,6 +299,12 @@ static int at803x_probe(struct phy_devic |
| 102 | if (!priv) |
| 103 | return -ENOMEM; |
| 104 | |
| 105 | + if (of_property_read_bool(dev->of_node, "at803x,eee-disabled")) |
| 106 | + priv->quirks |= AT803X_EEE_FEATURE_DISABLE; |
| 107 | + |
| 108 | + if (of_property_read_bool(dev->of_node, "at803x,vddio-1p8v")) |
| 109 | + priv->quirks |= AT803X_VDDIO_1P8V; |
| 110 | + |
| 111 | phydev->priv = priv; |
| 112 | |
| 113 | return 0; |
| 114 | @@ -275,6 +326,7 @@ static void at803x_enable_smart_eee(stru |
| 115 | static int at803x_config_init(struct phy_device *phydev) |
| 116 | { |
| 117 | int ret; |
| 118 | + struct at803x_priv *priv = phydev->priv; |
| 119 | u32 v; |
| 120 | |
| 121 | if (phydev->drv->phy_id == ATH8031_PHY_ID && |
| 122 | @@ -323,6 +375,18 @@ static int at803x_config_init(struct phy |
| 123 | else |
| 124 | ret = at803x_disable_tx_delay(phydev); |
| 125 | |
| 126 | + if (priv->quirks & AT803X_VDDIO_1P8V) { |
| 127 | + ret = at803x_set_vddio_1p8v(phydev); |
| 128 | + if (ret < 0) |
| 129 | + return ret; |
| 130 | + } |
| 131 | + |
| 132 | + if (priv->quirks & AT803X_EEE_FEATURE_DISABLE) { |
| 133 | + ret = at803x_disable_eee(phydev); |
| 134 | + if (ret < 0) |
| 135 | + return ret; |
| 136 | + } |
| 137 | + |
| 138 | return ret; |
| 139 | } |
| 140 | |