| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | From 84b1defe99a15b96d32f4c2fecb2c8e9149f696c Mon Sep 17 00:00:00 2001 |
| 2 | From: Shengjiu Wang <shengjiu.wang@nxp.com> |
| 3 | Date: Wed, 15 Aug 2018 09:53:07 +0800 |
| 4 | Subject: [PATCH] MLK-18947: ASoC: fsl_sai: fix volatile function |
| 5 | |
| 6 | The FSL_SAI_VERID and FSL_SAI_PARAM only available |
| 7 | when reg_offset is 8 |
| 8 | |
| 9 | Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> |
| 10 | (cherry picked from commit 0a0695672dc7ecf07a7642ff6f99f0b9d3a26b32) |
| 11 | --- |
| 12 | sound/soc/fsl/fsl_sai.c | 6 ++++-- |
| 13 | 1 file changed, 4 insertions(+), 2 deletions(-) |
| 14 | |
| 15 | --- a/sound/soc/fsl/fsl_sai.c |
| 16 | +++ b/sound/soc/fsl/fsl_sai.c |
| 17 | @@ -1162,9 +1162,11 @@ static bool fsl_sai_volatile_reg(struct |
| 18 | if (reg == FSL_SAI_TCSR(offset) || reg == FSL_SAI_RCSR(offset)) |
| 19 | return true; |
| 20 | |
| 21 | + if (sai->soc->reg_offset == 8 && (reg == FSL_SAI_VERID || |
| 22 | + reg == FSL_SAI_PARAM)) |
| 23 | + return true; |
| 24 | + |
| 25 | switch (reg) { |
| 26 | - case FSL_SAI_VERID: |
| 27 | - case FSL_SAI_PARAM: |
| 28 | case FSL_SAI_TFR0: |
| 29 | case FSL_SAI_TFR1: |
| 30 | case FSL_SAI_TFR2: |