| b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | /* |
| 2 | * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards |
| 3 | * |
| 4 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> |
| 5 | * |
| 6 | * The cache manipulation routine has been taken from the U-Boot project. |
| 7 | * (C) Copyright 2003 |
| 8 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License version 2 as published |
| 12 | * by the Free Software Foundation. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include "cache.h" |
| 17 | #include "cacheops.h" |
| 18 | #include "config.h" |
| 19 | |
| 20 | #define cache_op(op,addr) \ |
| 21 | __asm__ __volatile__( \ |
| 22 | " .set push \n" \ |
| 23 | " .set noreorder \n" \ |
| 24 | " .set mips3\n\t \n" \ |
| 25 | " cache %0, %1 \n" \ |
| 26 | " .set pop \n" \ |
| 27 | : \ |
| 28 | : "i" (op), "R" (*(unsigned char *)(addr))) |
| 29 | |
| 30 | void flush_cache(unsigned long start_addr, unsigned long size) |
| 31 | { |
| 32 | unsigned long lsize = CONFIG_CACHELINE_SIZE; |
| 33 | unsigned long addr = start_addr & ~(lsize - 1); |
| 34 | unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); |
| 35 | |
| 36 | while (1) { |
| 37 | cache_op(Hit_Writeback_Inv_D, addr); |
| 38 | cache_op(Hit_Invalidate_I, addr); |
| 39 | if (addr == aend) |
| 40 | break; |
| 41 | addr += lsize; |
| 42 | } |
| 43 | } |