b.liu | e958203 | 2025-04-17 19:18:16 +0800 | [diff] [blame^] | 1 | --- a/arch/mips/ralink/mt7621.c |
| 2 | +++ b/arch/mips/ralink/mt7621.c |
| 3 | @@ -58,7 +58,9 @@ |
| 4 | #define MT7621_GPIO_MODE_SDHCI_SHIFT 18 |
| 5 | #define MT7621_GPIO_MODE_SDHCI_GPIO 1 |
| 6 | |
| 7 | -static void *detect_magic __initdata = detect_memory_region; |
| 8 | +#define MT7621_MEM_TEST_PATTERN 0xaa5555aa |
| 9 | + |
| 10 | +static u32 detect_magic __initdata; |
| 11 | |
| 12 | static struct rt2880_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) }; |
| 13 | static struct rt2880_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) }; |
| 14 | @@ -144,26 +146,34 @@ static struct clk *__init mt7621_add_sys |
| 15 | return clk; |
| 16 | } |
| 17 | |
| 18 | +static bool __init mt7621_addr_wraparound_test(phys_addr_t size) |
| 19 | +{ |
| 20 | + void *dm = (void *)KSEG1ADDR(&detect_magic); |
| 21 | + if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE) |
| 22 | + return true; |
| 23 | + __raw_writel(MT7621_MEM_TEST_PATTERN, dm); |
| 24 | + if (__raw_readl(dm) != __raw_readl(dm + size)) |
| 25 | + return false; |
| 26 | + __raw_writel(!MT7621_MEM_TEST_PATTERN, dm); |
| 27 | + return __raw_readl(dm) == __raw_readl(dm + size); |
| 28 | +} |
| 29 | + |
| 30 | void __init mt7621_memory_detect(void) |
| 31 | { |
| 32 | - void *dm = &detect_magic; |
| 33 | phys_addr_t size; |
| 34 | |
| 35 | - for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) { |
| 36 | - if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic))) |
| 37 | - break; |
| 38 | + for (size = 32 * SZ_1M; size <= 256 * SZ_1M; size <<= 1) { |
| 39 | + if (mt7621_addr_wraparound_test(size)) { |
| 40 | + add_memory_region(MT7621_LOWMEM_BASE, size, BOOT_MEM_RAM); |
| 41 | + return; |
| 42 | + } |
| 43 | } |
| 44 | |
| 45 | - if ((size == 256 * SZ_1M) && |
| 46 | - (CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) && |
| 47 | - __builtin_memcmp(dm, dm + size, sizeof(detect_magic))) { |
| 48 | - add_memory_region(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE, |
| 49 | - BOOT_MEM_RAM); |
| 50 | - add_memory_region(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE, |
| 51 | - BOOT_MEM_RAM); |
| 52 | - } else { |
| 53 | - add_memory_region(MT7621_LOWMEM_BASE, size, BOOT_MEM_RAM); |
| 54 | - } |
| 55 | + /* addr doesn't wrap around at dm + 256M, assume 512M memory. */ |
| 56 | + add_memory_region(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE, |
| 57 | + BOOT_MEM_RAM); |
| 58 | + add_memory_region(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE, |
| 59 | + BOOT_MEM_RAM); |
| 60 | } |
| 61 | |
| 62 | void __init ralink_clk_init(void) |